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foss-fpga-tools
/
prjxray
/
147eafe55e67db40c70003f007f20faf065e49a3
/
.
/
minitests
/
litex
/
uart_ddr
/
arty
/
src.yosys
/
synth.ys
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read_verilog
../
generated
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top
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v
synth_xilinx
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edif top
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edif
