Merge pull request #2094 from antmicro/umarcor/shields
readme: update shield syntax (badges/shields#8671)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 3ec89c6..9e1ad2c 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -36,8 +36,6 @@
$<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}/third_party/yaml-cpp/include>
)
-# Set the CXX standard and compile time for our code only.
-set(CMAKE_CXX_STANDARD 14)
add_compile_options(-Wall -Werror)
add_subdirectory(lib)
diff --git a/fuzzers/035a-iob18-odelay/Makefile b/fuzzers/035a-iob18-odelay/Makefile
new file mode 100644
index 0000000..a837745
--- /dev/null
+++ b/fuzzers/035a-iob18-odelay/Makefile
@@ -0,0 +1,29 @@
+# Copyright (C) 2017-2023 The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+N := 5
+include ../fuzzer.mk
+
+database: build/segbits_riob18.db
+
+build/segbits_riob18.rdb: $(SPECIMENS_OK)
+ ${XRAY_SEGMATCH} -m 1 -M 1 -o build/segbits_riob18.rdb $$(find -name segdata_*.txt)
+
+build/segbits_riob18.db: build/segbits_riob18.rdb
+ ${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@
+ ${XRAY_MASKMERGE} build/mask_riob18.db $$(find -name segdata_*.txt)
+
+pushdb:
+ ${XRAY_MERGEDB} rioi build/segbits_riob18.db
+ ${XRAY_MERGEDB} rioi_tbytesrc build/segbits_riob18.db
+ ${XRAY_MERGEDB} rioi_tbyteterm build/segbits_riob18.db
+ ${XRAY_MERGEDB} mask_rioi build/mask_riob18.db
+ ${XRAY_MERGEDB} mask_rioi_tbytesrc build/mask_riob18.db
+ ${XRAY_MERGEDB} mask_rioi_tbyteterm build/mask_riob18.db
+
+.PHONY: database pushdb
+
diff --git a/fuzzers/035a-iob18-odelay/bits.dbf b/fuzzers/035a-iob18-odelay/bits.dbf
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/fuzzers/035a-iob18-odelay/bits.dbf
diff --git a/fuzzers/035a-iob18-odelay/generate.py b/fuzzers/035a-iob18-odelay/generate.py
new file mode 100644
index 0000000..58e6d1f
--- /dev/null
+++ b/fuzzers/035a-iob18-odelay/generate.py
@@ -0,0 +1,79 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2017-2023 The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+import json
+
+from prjxray.segmaker import Segmaker, add_site_group_zero
+from prjxray import verilog
+
+
+def bitfilter(frame, word):
+ return frame >= 27
+
+def main():
+ segmk = Segmaker("design.bits", verbose=True)
+
+ # Load tags
+ with open("params.json", "r") as fp:
+ data = json.load(fp)
+
+ odelay_types = ["FIXED", "VARIABLE", "VAR_LOAD"]
+ delay_srcs = ["ODATAIN"]
+
+ # Output tags
+ for params in data:
+ if params['ODELAY_BYPASS']:
+ prims = params['ODELAY_NOT_IN_USE'].split(" ")
+ segmk.add_site_tag(prims[0], 'IN_USE', False)
+ segmk.add_site_tag(prims[1], 'IN_USE', False)
+ continue
+ segmk.add_site_tag(params['ODELAY_IN_USE'], 'IN_USE', True)
+ segmk.add_site_tag(params['ODELAY_NOT_IN_USE'], 'IN_USE', False)
+
+ loc = verilog.unquote(params["LOC"])
+
+ # Delay type
+ # VAR_LOAD and VAR_LOAD_PIPE are the same
+ value = verilog.unquote(params["ODELAY_TYPE"])
+ add_site_group_zero(
+ segmk, loc, "ODELAY_TYPE_", odelay_types, "FIXED", value)
+
+ # Delay value
+ value = int(params["ODELAY_VALUE"])
+ for i in range(5):
+ segmk.add_site_tag(
+ loc, "ODELAY_VALUE[%01d]" % i, ((value >> i) & 1) != 0)
+ segmk.add_site_tag(
+ loc, "ZODELAY_VALUE[%01d]" % i, ((value >> i) & 1) == 0)
+
+ value = verilog.unquote(params["CINVCTRL_SEL"])
+ segmk.add_site_tag(loc, "CINVCTRL_SEL", int(value == "TRUE"))
+
+ value = verilog.unquote(params["PIPE_SEL"])
+ segmk.add_site_tag(loc, "PIPE_SEL", int(value == "TRUE"))
+
+ if "IS_C_INVERTED" in params and verilog.unquote(params["CINVCTRL_SEL"]) != "TRUE":
+ segmk.add_site_tag(
+ loc, "IS_C_INVERTED", int(params["IS_C_INVERTED"]))
+ segmk.add_site_tag(loc, "ZINV_C", 1 ^ int(params["IS_C_INVERTED"]))
+
+ value = verilog.unquote(params["HIGH_PERFORMANCE_MODE"])
+ segmk.add_site_tag(
+ loc, "HIGH_PERFORMANCE_MODE", int(value == "TRUE"))
+
+ segmk.add_site_tag(
+ loc, "ZINV_ODATAIN", 1 ^ int(params["IS_ODATAIN_INVERTED"]))
+
+ segmk.compile(bitfilter=bitfilter)
+ segmk.write()
+
+
+if __name__ == "__main__":
+ main()
diff --git a/fuzzers/035a-iob18-odelay/generate.tcl b/fuzzers/035a-iob18-odelay/generate.tcl
new file mode 100644
index 0000000..0ab7b32
--- /dev/null
+++ b/fuzzers/035a-iob18-odelay/generate.tcl
@@ -0,0 +1,31 @@
+# Copyright (C) 2017-2023 The Project X-Ray Authors
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+create_project -force -part $::env(XRAY_PART) design design
+read_verilog top.v
+synth_design -top top
+
+set_property CFGBVS GND [current_design]
+set_property CONFIG_VOLTAGE 1.8 [current_design]
+set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
+set_param tcl.collectionResultDisplayLimit 0
+
+set_property IS_ENABLED 0 [get_drc_checks {NSTD-1}]
+set_property IS_ENABLED 0 [get_drc_checks {UCIO-1}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-79}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-81}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-84}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-85}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-87}]
+set_property IS_ENABLED 0 [get_drc_checks {REQP-85}]
+set_property IS_ENABLED 0 [get_drc_checks {AVAL-28}]
+
+place_design
+route_design
+
+write_checkpoint -force design.dcp
+write_bitstream -force design.bit
diff --git a/fuzzers/035a-iob18-odelay/top.py b/fuzzers/035a-iob18-odelay/top.py
new file mode 100644
index 0000000..7e3db78
--- /dev/null
+++ b/fuzzers/035a-iob18-odelay/top.py
@@ -0,0 +1,234 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2017-2023 The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+
+import os, random
+random.seed(int(os.getenv("SEED"), 16))
+
+import sys
+import json
+
+from prjxray import util
+from prjxray.db import Database
+
+# =============================================================================
+
+
+def gen_sites():
+ db = Database(util.get_db_root(), util.get_part())
+ grid = db.grid()
+
+ tile_list = []
+ for tile_name in sorted(grid.tiles()):
+ if "IOB18" not in tile_name or "SING" in tile_name:
+ continue
+ tile_list.append(tile_name)
+
+ get_xy = util.create_xy_fun('RIOB18_')
+ tile_list.sort(key=get_xy)
+
+ for iob_tile_name in tile_list:
+ iob_gridinfo = grid.gridinfo_at_loc(
+ grid.loc_of_tilename(iob_tile_name))
+
+ # Find IOI tile adjacent to IOB
+ for suffix in ["IOI", "IOI_TBYTESRC", "IOI_TBYTETERM"]:
+ try:
+ ioi_tile_name = iob_tile_name.replace("IOB18", suffix)
+ ioi_gridinfo = grid.gridinfo_at_loc(
+ grid.loc_of_tilename(ioi_tile_name))
+ break
+ except KeyError:
+ pass
+
+ iob18s = [k for k, v in iob_gridinfo.sites.items() if v == "IOB18S"][0]
+ iob18m = [k for k, v in iob_gridinfo.sites.items() if v == "IOB18M"][0]
+ odelay_s = iob18s.replace("IOB", "ODELAY")
+ odelay_m = iob18m.replace("IOB", "ODELAY")
+
+ yield iob18m, odelay_m, iob18s, odelay_s
+
+
+def run():
+
+ # Get all [LR]IOI3 tiles
+ tiles = list(gen_sites())
+
+ # Header
+ print("// Tile count: %d" % len(tiles))
+ print("// Seed: '%s'" % os.getenv("SEED"))
+
+ ninputs = 0
+ do_idx = []
+ for i, sites in enumerate(tiles):
+ if random.randint(0, 1):
+ do_idx.append(ninputs)
+ ninputs += 1
+ else:
+ do_idx.append(None)
+
+ print(
+ '''
+module top (
+ (* CLOCK_BUFFER_TYPE = "NONE" *)
+ input wire clk,
+ output wire [{N}:0] do
+);
+
+wire clk_buf = clk;
+
+wire [{N}:0] do_buf;
+ '''.format(N=ninputs - 1))
+
+ # LOCes IOBs
+ data = []
+ for i, (sites, obuf_idx) in enumerate(zip(tiles, do_idx)):
+
+ if random.randint(0, 1):
+ iob_inuse = sites[0]
+ iob_other = sites[2]
+ odelay_inuse = sites[1]
+ odelay_other = sites[3]
+ else:
+ iob_inuse = sites[2]
+ iob_other = sites[0]
+ odelay_inuse = sites[3]
+ odelay_other = sites[1]
+
+ use_obuf = obuf_idx is not None
+
+ if not use_obuf:
+ continue
+
+ params = {
+ "LOC":
+ "\"" + odelay_inuse + "\"",
+ "ODELAY_TYPE":
+ "\"" + random.choice(
+ ["FIXED", "VARIABLE", "VAR_LOAD"]) + "\"",
+ "ODELAY_VALUE":
+ random.randint(0, 31),
+ "HIGH_PERFORMANCE_MODE":
+ "\"" + random.choice(["TRUE", "FALSE"]) + "\"",
+ "CINVCTRL_SEL":
+ "\"" + random.choice(["TRUE", "FALSE"]) + "\"",
+ "PIPE_SEL":
+ "\"" + random.choice(["TRUE", "FALSE"]) + "\"",
+ "IS_C_INVERTED":
+ random.randint(0, 1),
+ "IS_ODATAIN_INVERTED":
+ random.randint(0, 1),
+ }
+
+ if params["ODELAY_TYPE"] != "\"VAR_LOAD_PIPE\"":
+ params["PIPE_SEL"] = "\"FALSE\""
+
+ # The datasheet says that for these two modes the delay is set to 0
+ if params["ODELAY_TYPE"] == "\"VAR_LOAD\"":
+ params["ODELAY_VALUE"] = 0
+ if params["ODELAY_TYPE"] == "\"VAR_LOAD_PIPE\"":
+ params["ODELAY_VALUE"] = 0
+
+ if params["ODELAY_TYPE"] == "\"FIXED\"":
+ params["IS_C_INVERTED"] = 0
+
+ param_str = ",".join(".%s(%s)" % (k, v) for k, v in params.items())
+
+ if random.randint(0, 5) == 0:
+ print('')
+ print('(* LOC="%s", KEEP, DONT_TOUCH *)' % iob_inuse)
+ print(
+ 'OBUF obuf_%03d (.I(%d), .O(do[%3d]));' %
+ (obuf_idx, random.randint(0, 1), obuf_idx))
+ params['ODELAY_BYPASS'] = True
+ params["ODELAY_NOT_IN_USE"] = odelay_inuse + " " + odelay_other
+ else:
+ print('')
+ print('(* LOC="%s", KEEP, DONT_TOUCH *)' % iob_inuse)
+ print(
+ 'OBUF obuf_%03d (.I(do_buf[%3d]), .O(do[%3d]));' %
+ (obuf_idx, obuf_idx, obuf_idx))
+ print(
+ 'mod #(%s) mod_%03d (.clk(clk_buf), .O(do_buf[%3d]));' %
+ (param_str, i, obuf_idx))
+ params['ODELAY_BYPASS'] = False
+ params["ODELAY_IN_USE"] = odelay_inuse
+ params["ODELAY_NOT_IN_USE"] = odelay_other
+
+ data.append(params)
+
+ # Store params
+ with open("params.json", "w") as fp:
+ json.dump(data, fp, sort_keys=True, indent=1)
+
+ print(
+ '''
+// IDELAYCTRL
+(* KEEP, DONT_TOUCH *)
+IDELAYCTRL idelayctrl();
+
+endmodule
+
+(* KEEP, DONT_TOUCH *)
+module mod(
+ input wire clk,
+ output wire O
+);
+
+parameter LOC = "";
+parameter ODELAY_TYPE = "FIXED";
+parameter ODELAY_VALUE = 0;
+parameter DELAY_SRC = "ODATAIN";
+parameter HIGH_PERFORMANCE_MODE = "TRUE";
+parameter SIGNAL_PATTERN = "DATA";
+parameter CINVCTRL_SEL = "FALSE";
+parameter PIPE_SEL = "FALSE";
+parameter IS_C_INVERTED = 0;
+parameter IS_ODATAIN_INVERTED = 0;
+
+wire x;
+wire lut;
+
+(* KEEP, DONT_TOUCH *)
+LUT2 l( .O(lut) );
+
+// ODELAY
+(* LOC=LOC, KEEP, DONT_TOUCH *)
+ODELAYE2 #(
+ .ODELAY_TYPE(ODELAY_TYPE),
+ .ODELAY_VALUE(ODELAY_VALUE),
+ .DELAY_SRC(DELAY_SRC),
+ .HIGH_PERFORMANCE_MODE(HIGH_PERFORMANCE_MODE),
+ .SIGNAL_PATTERN(SIGNAL_PATTERN),
+ .CINVCTRL_SEL(CINVCTRL_SEL),
+ .PIPE_SEL(PIPE_SEL),
+ .IS_C_INVERTED(IS_C_INVERTED),
+ .IS_ODATAIN_INVERTED(IS_ODATAIN_INVERTED)
+)
+odelay
+(
+ .C(clk),
+ .REGRST(),
+ .LD(),
+ .CE(),
+ .INC(),
+ .CINVCTRL(),
+ .CNTVALUEIN(),
+ .ODATAIN(lut),
+ .LDPIPEEN(),
+ .DATAOUT(O),
+ .CNTVALUEOUT()
+);
+
+endmodule
+ ''')
+
+
+run()
diff --git a/fuzzers/Makefile b/fuzzers/Makefile
index 94a1094..dde3c34 100644
--- a/fuzzers/Makefile
+++ b/fuzzers/Makefile
@@ -84,6 +84,11 @@
endef
+ifeq ($(XRAY_DATABASE),kintex7)
+HAS_HIGH_PERFORMANCE_BANKS=1
+else
+HAS_HIGH_PERFORMANCE_BANKS=0
+endif
$(eval $(call fuzzer,000-init-db,,part))
ifneq ($(FUZZONLY),Y)
@@ -113,7 +118,7 @@
$(eval $(call fuzzer,028-fifo-config,005-tilegrid,all))
$(eval $(call fuzzer,029-bram-fifo-config,005-tilegrid,all))
$(eval $(call fuzzer,030-iob,005-tilegrid,all))
-ifeq ($(XRAY_DATABASE),kintex7)
+ifeq ($(HAS_HIGH_PERFORMANCE_BANKS),1)
$(eval $(call fuzzer,030-iob18,005-tilegrid,all))
endif
$(eval $(call fuzzer,031-cmt-mmcm,005-tilegrid,all))
@@ -126,16 +131,17 @@
endif
$(eval $(call fuzzer,035-iob-ilogic,005-tilegrid,all))
$(eval $(call fuzzer,035a-iob-idelay,005-tilegrid,all))
-ifeq ($(XRAY_DATABASE),kintex7)
+ifeq ($(HAS_HIGH_PERFORMANCE_BANKS),1)
$(eval $(call fuzzer,035a-iob18-idelay,005-tilegrid,all))
+$(eval $(call fuzzer,035a-iob18-odelay,005-tilegrid,all))
endif
$(eval $(call fuzzer,035b-iob-iserdes,005-tilegrid,all))
$(eval $(call fuzzer,036-iob-ologic,005-tilegrid,all))
-ifeq ($(XRAY_DATABASE),kintex7)
+ifeq ($(HAS_HIGH_PERFORMANCE_BANKS),1)
$(eval $(call fuzzer,036-iob18-ologic,005-tilegrid,all))
endif
$(eval $(call fuzzer,037-iob-pips,005-tilegrid 035b-iob-iserdes,all))
-ifeq ($(XRAY_DATABASE),kintex7)
+ifeq ($(HAS_HIGH_PERFORMANCE_BANKS),1)
$(eval $(call fuzzer,037-iob18-pips,005-tilegrid 035b-iob-iserdes,all))
endif
$(eval $(call fuzzer,038-cfg,005-tilegrid,all))
@@ -148,7 +154,7 @@
$(eval $(call fuzzer,045-hclk-cmt-pips,005-tilegrid,all))
$(eval $(call fuzzer,046-clk-bufg-muxed-pips,005-tilegrid,all))
$(eval $(call fuzzer,047-hclk-ioi-pips,005-tilegrid,all))
-ifeq ($(XRAY_DATABASE),kintex7)
+ifeq ($(HAS_HIGH_PERFORMANCE_BANKS),1)
$(eval $(call fuzzer,047-hclk-ioi18-pips,005-tilegrid,all))
endif
$(eval $(call fuzzer,047a-hclk-idelayctrl-pips,047-hclk-ioi-pips,all))
diff --git a/prjxray/segmaker.py b/prjxray/segmaker.py
index c362bef..6689d6f 100644
--- a/prjxray/segmaker.py
+++ b/prjxray/segmaker.py
@@ -329,6 +329,7 @@
'RAMB18': name_bram18,
'IOB': name_y0y1,
'IDELAY': name_y0y1,
+ 'ODELAY': name_y0y1,
'ILOGIC': name_y0y1,
'OLOGIC': name_y0y1,
'IBUFDS_GTE2': name_y0y1,
@@ -391,6 +392,13 @@
if 'GTP_INT_INTERFACE' in tile_type_norm:
tile_type_norm = 'GTP_INT_INTERFACE'
+ if tile_type_norm in ['LIOI', 'RIOI']:
+ tile_type_norm = 'IOI'
+ if tile_type_norm in ['LIOI_TBYTESRC', 'RIOI_TBYTESRC']:
+ tile_type_norm = 'IOI'
+ if tile_type_norm in ['LIOI_TBYTETERM', 'RIOI_TBYTETERM']:
+ tile_type_norm = 'IOI'
+
# ignore dummy tiles (ex: VBRK)
if len(tiledata['bits']) == 0:
if self.verbose:
diff --git a/third_party/abseil-cpp b/third_party/abseil-cpp
index 4eef161..42a3c03 160000
--- a/third_party/abseil-cpp
+++ b/third_party/abseil-cpp
@@ -1 +1 @@
-Subproject commit 4eef16170014f75f4291ae335a271900f89eaedf
+Subproject commit 42a3c030c958e6e099162b746ada04792b3a1c67
diff --git a/third_party/cctz b/third_party/cctz
index 83ffd88..4eda743 160000
--- a/third_party/cctz
+++ b/third_party/cctz
@@ -1 +1 @@
-Subproject commit 83ffd88d7c9a48d1dc61f04cb649cd52966d2fff
+Subproject commit 4eda7435413ec88be31ce2313c11f1b7a8832b9c
diff --git a/third_party/googletest b/third_party/googletest
index ec25eea..057b4e9 160000
--- a/third_party/googletest
+++ b/third_party/googletest
@@ -1 +1 @@
-Subproject commit ec25eea8f8237cf86c30703f59747e42f34b6f75
+Subproject commit 057b4e904fd754135dc19ff557c14036fd316425
diff --git a/third_party/sanitizers-cmake b/third_party/sanitizers-cmake
index a6748f4..c3dc841 160000
--- a/third_party/sanitizers-cmake
+++ b/third_party/sanitizers-cmake
@@ -1 +1 @@
-Subproject commit a6748f4f51273d86312e3d27ebe5277c9b1ff870
+Subproject commit c3dc841af4dbf44669e65b82cb68a575864326bd
diff --git a/third_party/yaml-cpp b/third_party/yaml-cpp
index 1b50109..987a604 160000
--- a/third_party/yaml-cpp
+++ b/third_party/yaml-cpp
@@ -1 +1 @@
-Subproject commit 1b50109f7bea60bd382d8ea7befce3d2bd67da5f
+Subproject commit 987a60425611bfd02a90bd247d630483bceaaeee
diff --git a/third_party/yosys b/third_party/yosys
index 611f71c..53c0a6b 160000
--- a/third_party/yosys
+++ b/third_party/yosys
@@ -1 +1 @@
-Subproject commit 611f71c67020eb501cedd24b2b10751fc1188f5e
+Subproject commit 53c0a6b780199dc56348916acf7c00e30f65e1ec
