|  | # Y0 | 
|  | 27_35 27_36 27_37,BRAM.RAMB18_Y0.READ_WIDTH_A_1 | 
|  | 27_43 27_44 27_45,BRAM.RAMB18_Y0.READ_WIDTH_B_1 | 
|  | 27_51 27_52 27_53,BRAM.RAMB18_Y0.WRITE_WIDTH_A_1 | 
|  | 27_59 27_60 27_61,BRAM.RAMB18_Y0.WRITE_WIDTH_B_1 | 
|  | 27_96,BRAM.RAMB18_Y0.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE | 
|  | 27_124,BRAM.RAMB18_Y0.RSTREG_PRIORITY_A_RSTREG | 
|  | 27_125,BRAM.RAMB18_Y0.RSTREG_PRIORITY_B_RSTREG | 
|  |  | 
|  | # Y1 | 
|  | 27_285 27_284 27_283,BRAM.RAMB18_Y1.READ_WIDTH_A_1 | 
|  | 27_277 27_276 27_275,BRAM.RAMB18_Y1.READ_WIDTH_B_1 | 
|  | 27_269 27_268 27_267,BRAM.RAMB18_Y1.WRITE_WIDTH_A_1 | 
|  | 27_261 27_260 27_259,BRAM.RAMB18_Y1.WRITE_WIDTH_B_1 | 
|  | 27_224,BRAM.RAMB18_Y1.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE | 
|  | 27_196,BRAM.RAMB18_Y1.RSTREG_PRIORITY_A_RSTREG | 
|  | 27_195,BRAM.RAMB18_Y1.RSTREG_PRIORITY_B_RSTREG | 
|  |  |