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foss-fpga-tools
/
prjxray
/
5649423a514174044a1b949d15fe0edf8bf23dab
/
.
/
minitests
/
fixedpnr
/
top_fdre.v
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module
top
(
input clk
,
ce
,
sr
,
d
,
output q
);
(*
LOC
=
"SLICE_X16Y100"
,
BEL
=
"AFF"
,
DONT_TOUCH
*)
FDRE ff
(
.
C
(
clk
),
.
CE
(
ce
),
.
R
(
sr
),
.
D
(
d
),
.
Q
(
q
)
);
endmodule