| # Loosely based on |
| # ./utils/bits2fasm.py --db-root database/artix7 --canonical utils/test_data/lut_int/design.bits |
| |
| # LUT |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[00] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[08] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[10] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[11] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[13] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[14] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[15] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[41] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[43] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[44] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[46] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[47] |
| CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[63] |
| |
| # din bus |
| # din[0] |
| INT_L_X10Y102.IMUX_L1.EE2END0 |
| # din[1] |
| INT_L_X10Y102.IMUX_L2.EE2END1 |
| # din[2] |
| INT_L_X10Y102.IMUX_L4.EE2END2 |
| # din[3] |
| INT_L_X10Y102.IMUX_L7.EE2END3 |
| # din[4] |
| INT_L_X10Y102.IMUX_L8.EL1END0 |
| # din[5] |
| INT_L_X10Y102.IMUX_L11.EL1END1 |
| |
| # dout[0] |
| INT_L_X10Y102.WW2BEG0.LOGIC_OUTS_L12 |
| |
