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foss-fpga-tools
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prjxray
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78c8f6b4ce2d85c78b9f86027c55adbde837f15a
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.
/
minitests
/
partial_reconfig_flow
/
harness_synthesize.tcl
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read_verilog harness
.
v
synth_design -top top -part
$::
env(XRAY_PART)
write_checkpoint -force harness_synth
.
dcp
