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foss-fpga-tools
/
prjxray
/
7e6c79e7e8f05d4d1c79d2e83ab7399af252a070
/
.
/
minitests
/
litex
/
uart_ddr
/
arty
/
src.yosys
tree: ddacd9cdeb1ddc5eeaae4e2e7a31b393ba1e8fb2
mem.init
⇨
../generated/mem.init
mem_1.init
⇨
../generated/mem_1.init
Makefile
synth.ys
top.tcl