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foss-fpga-tools
/
prjxray
/
7e6c79e7e8f05d4d1c79d2e83ab7399af252a070
/
.
/
minitests
/
litex
/
uart_ddr
/
arty
/
src.yosys
/
synth.ys
blob: 3344c98db2bfa4db0cf9f216ea1717c5c5e8090c [
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read_verilog
../
generated
/
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synth_xilinx
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edif top
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edif
