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foss-fpga-tools
/
prjxray
/
93ced10d4c8f2df5e2f8532245164278b0b1766d
/
.
/
minitests
/
fixedpnr
/
top_ldce.v
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module
top
(
input clk
,
ce
,
sr
,
d
,
output q
);
(*
LOC
=
"SLICE_X16Y100"
,
BEL
=
"AFF"
,
DONT_TOUCH
*)
//Keep inverter off
LDCE_1 ff
(
.
G
(
clk
),
.
GE
(
ce
),
.
CLR
(
sr
),
.
D
(
d
),
.
Q
(
q
)
);
endmodule