lib/test_data/configuration_test.yaml

!<xilinx/xc7series/part>
idcode: 0x362c093
configuration_ranges:
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 0
      minor: 42
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 1
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 1
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 2
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 2
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 3
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 3
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 4
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 4
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 5
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 5
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 6
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 6
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 7
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 7
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 8
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 8
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 9
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 9
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 10
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 10
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 11
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 11
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 12
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 12
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 13
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 13
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 14
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 14
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 15
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 15
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 16
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 16
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 17
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 17
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 18
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 18
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 19
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 19
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 20
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 20
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 21
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 21
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 22
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 22
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 23
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 23
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 24
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 24
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 25
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 25
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 26
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 26
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 27
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 27
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 28
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 28
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 29
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 29
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 30
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 30
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 31
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 31
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 32
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 32
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 33
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 33
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 34
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 34
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 35
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 35
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 36
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 36
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 37
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 37
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 38
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 38
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 39
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 39
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 40
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 40
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 41
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 41
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 42
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 42
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 43
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 0
      column: 43
      minor: 42
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 0
      minor: 42
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 1
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 1
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 2
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 2
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 3
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 3
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 4
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 4
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 5
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 5
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 6
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 6
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 7
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 7
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 8
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 8
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 9
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 9
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 10
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 10
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 11
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 11
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 12
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 12
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 13
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 13
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 14
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 14
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 15
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 15
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 16
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 16
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 17
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 17
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 18
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 18
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 19
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 19
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 20
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 20
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 21
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 21
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 22
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 22
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 23
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 23
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 24
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 24
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 25
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 25
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 26
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 26
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 27
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 27
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 28
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 28
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 29
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 29
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 30
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 30
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 31
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 31
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 32
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 32
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 33
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 33
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 34
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 34
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 35
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 35
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 36
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 36
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 37
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: top
      row: 1
      column: 37
      minor: 32
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 0
      minor: 42
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 1
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 1
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 2
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 2
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 3
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 3
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 4
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 4
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 5
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 5
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 6
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 6
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 7
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 7
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 8
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 8
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 9
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 9
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 10
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 10
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 11
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 11
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 12
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 12
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 13
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 13
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 14
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 14
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 15
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 15
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 16
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 16
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 17
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 17
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 18
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 18
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 19
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 19
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 20
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 20
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 21
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 21
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 22
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 22
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 23
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 23
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 24
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 24
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 25
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 25
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 26
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 26
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 27
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 27
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 28
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 28
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 29
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 29
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 30
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 30
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 31
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 31
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 32
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 32
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 33
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 33
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 34
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 34
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 35
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 35
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 36
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 36
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 37
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 37
      minor: 28
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 38
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 38
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 39
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 39
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 40
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 40
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 41
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 41
      minor: 36
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 42
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 42
      minor: 30
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 43
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: CLB_IO_CLK
      row_half: bottom
      row: 0
      column: 43
      minor: 42
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: top
      row: 0
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: top
      row: 0
      column: 3
      minor: 0
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: top
      row: 1
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: top
      row: 1
      column: 2
      minor: 0
  - !<xilinx/xc7series/configuration_frame_range>
    begin: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: bottom
      row: 0
      column: 0
      minor: 0
    end: !<xilinx/xc7series/configuration_frame_address>
      block_type: BLOCK_RAM
      row_half: bottom
      row: 0
      column: 3
      minor: 0