| IOI3.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 IOI3.ILOGIC_Y0.ISERDES.MEMORY_DDR.W.DDR.W4 IOI3.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 IOI3.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 IOI3.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 |
| |
| IOI3.ILOGIC_Y0.ISERDES.MODE.MASTER IOI3.ILOGIC_Y0.ISERDES.MODE.SLAVE |
| |
| IOI3.ILOGIC_Y0.ISERDES.NUM_CE.N1 IOI3.ILOGIC_Y0.ISERDES.NUM_CE.N2 |
| |
| IOI3.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 IOI3.ILOGIC_Y1.ISERDES.MEMORY_DDR.W.DDR.W4 IOI3.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 IOI3.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 IOI3.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 |
| |
| IOI3.ILOGIC_Y1.ISERDES.MODE.MASTER IOI3.ILOGIC_Y1.ISERDES.MODE.SLAVE |
| |
| IOI3.ILOGIC_Y1.ISERDES.NUM_CE.N1 IOI3.ILOGIC_Y1.ISERDES.NUM_CE.N2 |
