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foss-fpga-tools
/
prjxray
/
e139b98acae32a0460a659dcd85d83ef735fa601
/
.
/
minitests
/
partial_reconfig_flow
/
harness.tcl
blob: 14be2e3ca334c28c427ff95d295d7e7801616f0d [
file
]
read_verilog top
.
v
read_verilog roi_base
.
v
synth_design -top top -part
$::
env(XRAY_PART)
write_checkpoint -force harness
.
dcp
