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foss-fpga-tools
/
prjxray
/
f108805a0fcf58d5d3d3ec6fa38ee0770c457f6d
/
.
/
minitests
/
partial_reconfig_flow
/
roi_synthesize.tcl
blob: 009429ca8d9346a3cda599e2af88e2b95b71ca5e [
file
]
read_verilog
[
lindex
$
argv
0
]
synth_design -mode out_of_context -top roi -part
$::
env(XRAY_PART)
write_checkpoint -force
[
lindex
$
argv
1
]
