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foss-fpga-tools
/
prjxray
/
f6ad2ff437b4f9a1f17fa85108fbab3f3ebeeeed
/
.
/
fuzzers
/
007-timing
/
bel
/
top.v
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module
top
(
input di
,
output
do
);
assign
do
=
di
;
endmodule
