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foss-fpga-tools
/
python-symbiflow-v2x
/
0164e7d2b6cec78ce8a86c0b454425f8e3f2b494
/
.
/
tests
/
net_attr
/
child
/
child.sim.v
blob: e09db94c424e8a1a25a016a58679dfb0f28c5062 [
file
]
module
CHILD
(
input wire I
,
output wire O
);
endmodule
