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foss-fpga-tools
/
python-symbiflow-v2x
/
037d50d09362cdcec5a109e8509a743f787f0e90
/
.
/
tests
/
net_attr
/
child
/
child.sim.v
blob: e09db94c424e8a1a25a016a58679dfb0f28c5062 [
file
]
module
CHILD
(
input wire I
,
output wire O
);
endmodule