Added preservation of interconnect mux inputs Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
diff --git a/tests/vtr/lutff-pair/golden.pb_type.xml b/tests/vtr/lutff-pair/golden.pb_type.xml index 2d667bf..ea403db 100644 --- a/tests/vtr/lutff-pair/golden.pb_type.xml +++ b/tests/vtr/lutff-pair/golden.pb_type.xml
@@ -39,16 +39,16 @@ <port from="lut" name="I[3]" type="output"/> </direct> <mux name="mux"> - <port from="lut" name="O" type="input"> - <metadata> - <meta name="fasm_mux">L</meta> - </metadata> - </port> <port from="ff" name="Q" type="input"> <metadata> <meta name="fasm_mux">F</meta> </metadata> </port> + <port from="lut" name="O" type="input"> + <metadata> + <meta name="fasm_mux">L</meta> + </metadata> + </port> <port name="O" type="output"/> <metadata> <meta name="type">bel</meta>
diff --git a/v2x/vlog_to_pbtype.py b/v2x/vlog_to_pbtype.py index 8c4f8c7..e0a0e66 100755 --- a/v2x/vlog_to_pbtype.py +++ b/v2x/vlog_to_pbtype.py
@@ -268,10 +268,14 @@ ) -> ET.Element: mux_xml = ET.SubElement(ic_xml, "mux", {"name": mux_name}) - for mux_input, driver in mux_inputs.items(): + + keys = sorted(list(mux_inputs.keys())) + for mux_input, driver in [(k, mux_inputs[k],) for k in keys]: create_port(mux_xml, driver, "input", metadata={'fasm_mux': mux_input}) + assert len(mux_outputs) == 1, mux_outputs - for mux_pin, sinks in mux_outputs.items(): + keys = sorted(list(mux_outputs.keys())) + for mux_pin, sinks in [(k, mux_outputs[k],) for k in keys]: assert len(sinks) == 1, sinks for sink_pin, path_attr in sinks: create_port(mux_xml, sink_pin, "output")