Changed markdown to rst

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>

tests/io/README.rst

diff --git a/tests/io/README.md b/tests/io/README.rst
similarity index 88%
rename from tests/io/README.md
rename to tests/io/README.rst
index 1ec2529..eeccf55 100644
--- a/tests/io/README.md
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@@ -1,4 +1,5 @@
-# Tests for modelling I/O primitives
+Tests for modelling I/O primitives
+++++++++++++++++++++++++++++++++++
 
 In VPR top-level I/O pins are represented using `.input` and `.output` BLIF models that are implemented by leaf pb_types. In order to model those using verilog you need to assing the specific `CLASS` attribute so the V2X would know that it has to use either `.input` or `.output` BLIF model for a cell.