Merge pull request #16 from antmicro/add-xml-init

v2x/vlog_to_model.py

diff --git a/v2x/vlog_to_model.py b/v2x/vlog_to_model.py
index 6e6fca8..0a0a7dc 100755
--- a/v2x/vlog_to_model.py
+++ b/v2x/vlog_to_model.py
@@ -27,7 +27,7 @@
 from .yosys import run
 from .yosys.json import YosysJSON
 
-from .xml import xmlinc
+from .xmlinc import xmlinc
 
 
 def is_clock_assoc(infiles, module, clk, port, direction):

v2x/vlog_to_pbtype.py

diff --git a/v2x/vlog_to_pbtype.py b/v2x/vlog_to_pbtype.py
index f1f54b4..66f100e 100755
--- a/v2x/vlog_to_pbtype.py
+++ b/v2x/vlog_to_pbtype.py
@@ -69,7 +69,7 @@
 from .yosys import run
 from .yosys.json import YosysJSON
 
-from .xml import xmlinc  # noqa: E402
+from .xmlinc import xmlinc  # noqa: E402
 
 
 def normalize_pb_name(pb_name):

v2x/xmlinc/__init__.py

diff --git a/v2x/xmlinc/__init__.py b/v2x/xmlinc/__init__.py
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/v2x/xmlinc/__init__.py

v2x/xmlinc/xmlinc.py

diff --git a/v2x/xml/xmlinc.py b/v2x/xmlinc/xmlinc.py
similarity index 100%
rename from v2x/xml/xmlinc.py
rename to v2x/xmlinc/xmlinc.py