Merge pull request #12 from mithro/docs

docs: Adding some initial documentation.
diff --git a/.readthedocs.yml b/.readthedocs.yml
new file mode 100644
index 0000000..93b8e44
--- /dev/null
+++ b/.readthedocs.yml
@@ -0,0 +1,16 @@
+# .readthedocs.yml
+# Read the Docs configuration file
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+# Required
+version: 2
+
+# Build documentation in the docs/ directory with Sphinx
+sphinx:
+  configuration: docs/conf.py
+
+formats:
+ - htmlzip
+
+conda:
+  environment: docs/environment.yml
diff --git a/MANIFEST.in b/MANIFEST.in
index 0d2d920..b9318a3 100644
--- a/MANIFEST.in
+++ b/MANIFEST.in
@@ -1,3 +1,7 @@
+exclude .readthedocs.yml
+exclude tox.ini
+exclude *.swp
+
 # Include the README
 include *.md
 
@@ -6,4 +10,18 @@
 
 include *.yapf
 include *.txt
+
 recursive-include v2x *.py
+
+
+# Docs
+recursive-include docs *.py
+recursive-include docs *.rst
+recursive-include docs *.txt
+recursive-include docs *.yml
+recursive-include docs Makefile
+prune docs/_*
+prune docs/env
+
+# Tests
+graft tests
diff --git a/docs/.gitignore b/docs/.gitignore
new file mode 100644
index 0000000..c97efb9
--- /dev/null
+++ b/docs/.gitignore
@@ -0,0 +1,5 @@
+env
+_build
+tests/**/*.md
+tests/**/*.svg
+tests/**/*.png
diff --git a/docs/Makefile b/docs/Makefile
new file mode 100644
index 0000000..64f9ba2
--- /dev/null
+++ b/docs/Makefile
@@ -0,0 +1,67 @@
+# Minimal makefile for Sphinx documentation
+#
+
+MAKEDIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+# You can set these variables from the command line.
+SPHINXOPTS      =
+SPHINXBUILD     = [ -e env/bin/activate ] && source env/bin/activate; sphinx-build
+SPHINXAUTOBUILD = [ -e env/bin/activate ] && source env/bin/activate; sphinx-autobuild
+SPHINXPROJ      = SymbiFlowV2X
+SOURCEDIR       = .
+BUILDDIR        = _build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+livehtml:
+	@$(SPHINXAUTOBUILD) -b html --ignore \*.swp --ignore \*~ $(SPHINXOPTS) "$(SOURCEDIR)" "$(BUILDDIR)/html"
+
+.PHONY: help livehtml Makefile
+
+
+env/Miniconda3-latest-Linux-x86_64.sh:
+	mkdir env
+	wget https://repo.anaconda.com/miniconda/Miniconda3-latest-Linux-x86_64.sh -O env/Miniconda3-latest-Linux-x86_64.sh
+	chmod a+x env/Miniconda3-latest-Linux-x86_64.sh
+
+env:
+	rm -rf env
+	make env/Miniconda3-latest-Linux-x86_64.sh
+	./env/Miniconda3-latest-Linux-x86_64.sh -p $(PWD)/env -b -f
+	source env/bin/activate; conda config --system --add envs_dirs $(PWD)/env/envs
+	source env/bin/activate; conda config --system --add pkgs_dirs $(PWD)/env/pkgs
+	source env/bin/activate; conda env update --name base --file ./environment.yml
+
+.PHONY: env
+
+# Update fuzzer / minitest markdown links.
+tests-links:
+	@mkdir -p $(MAKEDIR)/tests
+	@cd $(MAKEDIR)/tests && find -name '*.md' -delete && find -type d -empty -delete
+	@cd $(MAKEDIR)/tests && \
+		for I in $$(cd ../../tests/ ; find -name '*.md' | sort); do \
+			F=$$(dirname $$I); D=$$(dirname $$F); N=$$(basename $$F); \
+			S=../../tests/$$I; O=$$D/$$N.md; \
+			if [ ! -d $$D ]; then \
+				mkdir -p $$D; \
+			fi; \
+			ln -sf $$(realpath $$S --relative-to=$$D) $$O; \
+		done
+	@cd $(MAKEDIR)/tests && \
+		for I in $$(cd ../../tests/ ; find -name '*.svg' -o -name '*.png' | sort); do \
+			F=$$(dirname $$I); D=$$(dirname $$F); N=$$(basename $$I); \
+			S=../../tests/$$I; O=$$D/$$N; \
+			ln -sf $$(realpath $$S --relative-to=$$D) $$O; \
+		done
+
+links: tests-links
+	@true
+
+.PHONY: tests-links links
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile links
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
diff --git a/tests/fig28-lutff-pair/ff/golden.pb_type.xml b/docs/_static/.keepme
similarity index 100%
copy from tests/fig28-lutff-pair/ff/golden.pb_type.xml
copy to docs/_static/.keepme
diff --git a/docs/conf.py b/docs/conf.py
new file mode 100644
index 0000000..e7b7def
--- /dev/null
+++ b/docs/conf.py
@@ -0,0 +1,263 @@
+# -*- coding: utf-8 -*-
+#
+# SymbiFlow V2X documentation build configuration file, created by
+# sphinx-quickstart on Mon Feb  5 11:04:37 2018.
+#
+# This file is execfile()d with the current directory set to its
+# containing dir.
+#
+# Note that not all possible configuration values are present in this
+# autogenerated file.
+#
+# All configuration values have a default; values that are commented out
+# serve to show the default.
+
+import re
+
+# Markdown support
+import recommonmark  # noqa
+
+# If extensions (or modules to document with autodoc) are in another directory,
+# add these directories to sys.path here. If the directory is relative to the
+# documentation root, use os.path.abspath to make it absolute, like shown here.
+#
+import os
+import sys
+sys.path.insert(0, os.path.abspath('.'))
+from markdown_code_symlinks import LinkParser, MarkdownSymlinksDomain  # noqa
+
+# -- General configuration ------------------------------------------------
+
+# If your documentation needs a minimal Sphinx version, state it here.
+#
+# needs_sphinx = '1.0'
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = [
+    'sphinx.ext.autodoc',
+    'sphinx.ext.autosummary',
+    'sphinx.ext.doctest',
+    'sphinx.ext.imgmath',
+    'sphinx.ext.napoleon',
+    'sphinx.ext.todo',
+    'sphinx_markdown_tables',
+    'symbolator_sphinx',
+    'sphinxcontrib_verilog_diagrams',
+]
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+# The suffix(es) of source filenames.
+# You can specify multiple suffix as a list of string:
+source_suffix = ['.rst', '.md']
+source_parsers = {
+    '.md': 'markdown_code_symlinks.LinkParser',
+}
+
+# The master toctree document.
+master_doc = 'index'
+
+# General information about the project.
+project = u'SymbiFlow Verilog to XML (V2X)'
+copyright = u'2018, SymbiFlow Team'
+author = u'SymbiFlow Team'
+
+# Enable github links when not on readthedocs
+on_rtd = os.environ.get('READTHEDOCS', None) == 'True'
+if not on_rtd:
+    html_context = {
+        "display_github": True,  # Integrate GitHub
+        "github_user": "symbiflow",  # Username
+        "github_repo": "python-symbiflow-v2x",  # Repo name
+        "github_version": "master",  # Version
+        "conf_py_path": "/doc/",
+    }
+else:
+    docs_dir = os.path.abspath(os.path.dirname(__file__))
+    print("Docs dir is:", docs_dir)
+    import subprocess
+    subprocess.call('git fetch origin --unshallow', cwd=docs_dir, shell=True)
+    subprocess.check_call('git fetch origin --tags', cwd=docs_dir, shell=True)
+    subprocess.check_call('make links', cwd=docs_dir, shell=True)
+
+# The version info for the project you're documenting, acts as replacement for
+# |version| and |release|, also used in various other places throughout the
+# built documents.
+#
+# The full version, including alpha/beta/rc tags.
+release = re.sub('^v', '', os.popen('git describe ').read().strip())
+# The short X.Y version.
+version = release
+
+# The language for content autogenerated by Sphinx. Refer to documentation
+# for a list of supported languages.
+#
+# This is also used if you do content translation via gettext catalogs.
+# Usually you set "language" from the command line for these cases.
+language = None
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+# This patterns also effect to html_static_path and html_extra_path
+exclude_patterns = ['_build', 'env', 'Thumbs.db', '.DS_Store']
+
+# The name of the Pygments (syntax highlighting) style to use.
+pygments_style = 'default'
+
+# If true, `todo` and `todoList` produce output, else they produce nothing.
+todo_include_todos = True
+
+# -- Options for HTML output ----------------------------------------------
+
+# The theme to use for HTML and HTML Help pages.  See the documentation for
+# a list of builtin themes.
+#
+html_theme = 'sphinx_materialdesign_theme'
+
+# Theme options are theme-specific and customize the look and feel of a theme
+# further.  For a list of options available for each theme, see the
+# documentation.
+#
+html_theme_options = {
+    # Specify a list of menu in Header.
+    # Tuples forms:
+    #  ('Name', 'external url or path of pages in the document',
+    #   boolean, 'icon name')
+    #
+    # Third argument:
+    # True indicates an external link.
+    # False indicates path of pages in the document.
+    #
+    # Fourth argument:
+    # Specify the icon name.
+    # For details see link.
+    # https://material.io/icons/
+    'header_links': [
+        ('Home', 'index', False, 'home'),
+        ("GitHub", "https://github.com/SymbiFlow/python-symbiflow-v2x",
+         True, 'link'),
+    ],
+
+    # Customize css colors.
+    # For details see link.
+    # https://getmdl.io/customize/index.html
+    #
+    # Values: amber, blue, brown, cyan deep_orange, deep_purple, green, grey,
+    #         indigo, light_blue, light_green, lime, orange, pink, purple, red,
+    #         teal, yellow
+    # (Default: indigo)
+    'primary_color': 'deep_purple',
+    # Values: Same as primary_color. (Default: pink)
+    'accent_color': 'purple',
+
+    # Customize layout.
+    # For details see link.
+    # https://getmdl.io/components/index.html#layout-section
+    'fixed_drawer': True,
+    'fixed_header': True,
+    'header_waterfall': True,
+    'header_scroll': False,
+
+    # Render title in header.
+    # Values: True, False (Default: False)
+    'show_header_title': False,
+    # Render title in drawer.
+    # Values: True, False (Default: True)
+    'show_drawer_title': True,
+    # Render footer.
+    # Values: True, False (Default: True)
+    'show_footer': True
+}
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+html_static_path = ['_static']
+
+# Custom sidebar templates, must be a dictionary that maps document names
+# to template names.
+#
+# This is required for the alabaster theme
+# refs: http://alabaster.readthedocs.io/en/latest/installation.html#sidebars
+html_sidebars = {
+    '**': [
+        'relations.html',  # needs 'show_related': True theme option to display
+        'searchbox.html',
+    ]
+}
+
+# -- Options for HTMLHelp output ------------------------------------------
+
+# Output file base name for HTML help builder.
+htmlhelp_basename = 'symbiflow-v2x'
+
+# -- Options for LaTeX output ---------------------------------------------
+
+latex_elements = {
+    # The paper size ('letterpaper' or 'a4paper').
+    #
+    # 'papersize': 'letterpaper',
+
+    # The font size ('10pt', '11pt' or '12pt').
+    #
+    # 'pointsize': '10pt',
+
+    # Additional stuff for the LaTeX preamble.
+    #
+    # 'preamble': '',
+
+    # Latex figure (float) alignment
+    #
+    # 'figure_align': 'htbp',
+}
+
+# Grouping the document tree into LaTeX files. List of tuples
+# (source start file, target name, title,
+#  author, documentclass [howto, manual, or own class]).
+latex_documents = [
+    (
+        master_doc, 'SymbiFlowV2X.tex', u'SymbiFlow V2X Documentation',
+        u'SymbiFlow Team', 'manual'),
+]
+
+# -- Options for manual page output ---------------------------------------
+
+# One entry per manual page. List of tuples
+# (source start file, name, description, authors, manual section).
+man_pages = [
+    (master_doc, 'symbiflow-v2x', u'SymbiFlow V2X Documentation', [author], 1)
+]
+
+# -- Options for Texinfo output -------------------------------------------
+
+# Grouping the document tree into Texinfo files. List of tuples
+# (source start file, target name, title, author,
+#  dir menu entry, description, category)
+texinfo_documents = [
+    (
+        master_doc, 'SymbiFlowV2X', u'SymbiFlow V2X Documentation', author,
+        'SymbiFlowV2X', 'One line description of project.', 'Miscellaneous'),
+]
+
+# Example configuration for intersphinx: refer to the Python standard library.
+intersphinx_mapping = {'https://docs.python.org/': None}
+
+
+def setup(app):
+    github_code_repo = 'https://github.com/SymbiFlow/python-symbiflow-v2x/'
+    github_code_branch = 'blob/master/'
+
+    docs_root_dir = os.path.realpath(os.path.dirname(__file__))
+    code_root_dir = os.path.realpath(os.path.join(docs_root_dir, ".."))
+
+    MarkdownSymlinksDomain.init_domain(
+        github_code_repo, github_code_branch, docs_root_dir, code_root_dir)
+    MarkdownSymlinksDomain.find_links()
+    app.add_domain(MarkdownSymlinksDomain)
+    app.add_config_value(
+        'recommonmark_config', {
+            'github_code_repo': github_code_repo,
+        }, True)
diff --git a/docs/environment.yml b/docs/environment.yml
new file mode 100644
index 0000000..e1b271c
--- /dev/null
+++ b/docs/environment.yml
@@ -0,0 +1,15 @@
+name: v2x-docs
+channels:
+- SymbiFlow
+- conda-forge
+- defaults
+dependencies:
+- python=3.7
+- pip
+- pycairo
+- pango
+- pygobject
+- yosys
+- netlistsvg
+- pip:                            # Packages installed from PyPI
+  - -r file:requirements.txt
diff --git a/docs/index.rst b/docs/index.rst
new file mode 100644
index 0000000..802792a
--- /dev/null
+++ b/docs/index.rst
@@ -0,0 +1,22 @@
+.. SymbiFlow V2X documentation master file
+
+Welcome to SymbiFlow Verilog to XML
+=========================================
+
+`SymbiFlow Verilog to XML`_ `V2X`_ .
+
+.. _SymbiFlow Verilog to XML: https://github.com/SymbiFlow/python-symbiflow-v2x
+.. _V2X: http://symbiflow-v2x.readthedocs.io/
+
+.. toctree::
+   :maxdepth: 2
+   :glob:
+
+   tests/vtr-examples.rst
+   tests/dsp.rst
+
+.. toctree::
+   :maxdepth: 3
+   :glob:
+
+   tests/clocks.rst
diff --git a/docs/requirements.txt b/docs/requirements.txt
new file mode 100644
index 0000000..24bda82
--- /dev/null
+++ b/docs/requirements.txt
@@ -0,0 +1,22 @@
+sphinx_materialdesign_theme
+
+docutils
+sphinx
+sphinx-autobuild
+
+breathe
+recommonmark
+sphinx-markdown-tables
+sphinxcontrib-napoleon
+
+# Markdown cross-reference solver library
+git+https://github.com/SymbiFlow/sphinxcontrib-markdown-symlinks.git#egg=markdown_code_symlinks
+
+# Verilog diagrams using Yosys + netlistsvg
+git+https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams.git#egg=sphinxcontrib-verilog-diagrams
+
+# Module diagrams
+symbolator
+
+pycairo
+# vext.gi
diff --git a/docs/tests/clocks.rst b/docs/tests/clocks.rst
new file mode 100644
index 0000000..68e741b
--- /dev/null
+++ b/docs/tests/clocks.rst
@@ -0,0 +1,40 @@
+.. Clock Example Tests
+
+Clock Examples
+==============
+
+Autodetection clock from flipflop
+---------------------------------
+
+.. toctree::
+
+   clocks/dff_one_clock.md
+   clocks/dff_two_clocks.md
+
+.. include:: ../../tests/clocks/dff_comb_one_clock/README.rst
+
+Manual Input Clock
+------------------
+
+.. toctree::
+
+   clocks/input_attr_clock.md
+   clocks/input_named_clk.md
+   clocks/input_named_rdclk.md
+
+Manual Output Clock
+-------------------
+
+.. toctree::
+
+   clocks/output_attr_clock.md
+   clocks/output_named_clk.md
+   clocks/output_named_rdclk.md
+
+Multiple Clocks
+---------------
+
+.. toctree::
+
+   clocks/multiple_inputs_named_clk.md
+   clocks/multiple_outputs_named_clk.md
diff --git a/docs/tests/dsp.rst b/docs/tests/dsp.rst
new file mode 100644
index 0000000..6fb30c7
--- /dev/null
+++ b/docs/tests/dsp.rst
@@ -0,0 +1,14 @@
+.. DSP Based Example Tests
+
+DSP Examples
+============
+
+.. toctree::
+
+   dsp/dsp_combinational.md
+   dsp/dsp_in_registered.md
+   dsp/dsp_out_registered.md
+   dsp/dsp_inout_registered.md
+   dsp/dsp_inout_registered_dualclk.md
+   dsp/dsp_partial_registered.md
+   dsp/dsp_modes.md
diff --git a/docs/tests/vtr-examples.rst b/docs/tests/vtr-examples.rst
new file mode 100644
index 0000000..33e94d9
--- /dev/null
+++ b/docs/tests/vtr-examples.rst
@@ -0,0 +1,13 @@
+.. Examples from the Verilog to Routing documentation / tutorials.
+
+Verilog to Routing Examples
+===========================
+
+Primitive Block Timing Modeling Tutorial
+----------------------------------------
+
+.. toctree::
+
+  vtr/lutff-pair.md
+  vtr/full-adder.md
+  vtr/dff.md
diff --git a/tests/carry/README.md b/tests/carry/README.md
index 54c81a8..75bfe5a 100644
--- a/tests/carry/README.md
+++ b/tests/carry/README.md
@@ -1,4 +1,4 @@
-## CARRY tests
+# `carry` tests
 
 This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 The tests use model defined in CBLOCK tests.
diff --git a/tests/carry/cblock/README.md b/tests/carry/cblock/README.md
index ea82a59..032f831 100644
--- a/tests/carry/cblock/README.md
+++ b/tests/carry/cblock/README.md
@@ -1,4 +1,4 @@
-## CARRY tests
+# `carry` - `cblock` tests
 
 This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 Those tests should check the following features:
@@ -17,6 +17,6 @@
 
  - [ ] carry chains inference - carry chains defined on wires with `carry` attribute should be propagated to pb\_type xml file
 
-## Timings
+## Timing
 
- - [ ] all the timings defined in Verilog should be propagated to result pb\_type file
+ - [ ] all the timing defined in Verilog should be propagated to result pb\_type file
diff --git a/tests/clocks/README.md b/tests/clocks/README.md
index 752921f..e762b25 100644
--- a/tests/clocks/README.md
+++ b/tests/clocks/README.md
@@ -1,4 +1,4 @@
-## Clock detection tests
+# `clocks` tests
 
 This directory contains test for the clock detection functionality for the
 `v2x_to_model.py` tool.
diff --git a/tests/clocks/dff_comb_one_clock/README.rst b/tests/clocks/dff_comb_one_clock/README.rst
new file mode 100644
index 0000000..d1bcf97
--- /dev/null
+++ b/tests/clocks/dff_comb_one_clock/README.rst
@@ -0,0 +1,9 @@
+D-Flipflop with combinational logic
++++++++++++++++++++++++++++++++++++
+
+`input wire a` should be detected as a clock because it drives the flip flop.
+
+.. symbolator:: ../../tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v
+
+.. literalinclude:: ../../tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v
+   :language: verilog
diff --git a/tests/dsp/dsp_combinational/README.md b/tests/dsp/dsp_combinational/README.md
new file mode 100644
index 0000000..f565755
--- /dev/null
+++ b/tests/dsp/dsp_combinational/README.md
@@ -0,0 +1,11 @@
+# `dsp_combinational` test
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+
diff --git a/tests/dsp_combinational/dsp_combinational.sim.v b/tests/dsp/dsp_combinational/dsp_combinational.sim.v
similarity index 100%
rename from tests/dsp_combinational/dsp_combinational.sim.v
rename to tests/dsp/dsp_combinational/dsp_combinational.sim.v
diff --git a/tests/dsp_combinational/golden.model.xml b/tests/dsp/dsp_combinational/golden.model.xml
similarity index 100%
rename from tests/dsp_combinational/golden.model.xml
rename to tests/dsp/dsp_combinational/golden.model.xml
diff --git a/tests/dsp_combinational/golden.pb_type.xml b/tests/dsp/dsp_combinational/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_combinational/golden.pb_type.xml
rename to tests/dsp/dsp_combinational/golden.pb_type.xml
diff --git a/tests/dsp/dsp_in_registered/README.md b/tests/dsp/dsp_in_registered/README.md
new file mode 100644
index 0000000..c40ab3f
--- /dev/null
+++ b/tests/dsp/dsp_in_registered/README.md
@@ -0,0 +1,18 @@
+# `dsp_in_registered` test
+
+Test for "DSP style" block with all inputs registered.
+
+The tests use model from [`fig42-dff`](FIXME) and
+[`dsp_combinational`](../dsp_combinational/README.md) tests.
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+ - [ ] `pack_pattern` defined on wire connections with `pack` attribute
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
diff --git a/tests/dsp_in_registered/dsp_in_registered.sim.v b/tests/dsp/dsp_in_registered/dsp_in_registered.sim.v
similarity index 100%
rename from tests/dsp_in_registered/dsp_in_registered.sim.v
rename to tests/dsp/dsp_in_registered/dsp_in_registered.sim.v
diff --git a/tests/dsp_in_registered/golden.model.xml b/tests/dsp/dsp_in_registered/golden.model.xml
similarity index 100%
rename from tests/dsp_in_registered/golden.model.xml
rename to tests/dsp/dsp_in_registered/golden.model.xml
diff --git a/tests/dsp_in_registered/golden.pb_type.xml b/tests/dsp/dsp_in_registered/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_in_registered/golden.pb_type.xml
rename to tests/dsp/dsp_in_registered/golden.pb_type.xml
diff --git a/tests/dsp/dsp_inout_registered/README.md b/tests/dsp/dsp_inout_registered/README.md
new file mode 100644
index 0000000..b66befe
--- /dev/null
+++ b/tests/dsp/dsp_inout_registered/README.md
@@ -0,0 +1,20 @@
+# `dsp_inout_registered` test
+
+Test for "DSP style" block with both input and output is registered (using a
+single clock).
+
+The tests use model from [`fig42-dff`](FIXME) and
+[`dsp_combinational`](../dsp_combinational/README.md) tests.
+
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+ - [ ] `pack_pattern` defined on wire connections with `pack` attribute
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
diff --git a/tests/dsp_inout_registered/dsp_inout_registered.sim.v b/tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v
similarity index 100%
rename from tests/dsp_inout_registered/dsp_inout_registered.sim.v
rename to tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v
diff --git a/tests/dsp_inout_registered/golden.model.xml b/tests/dsp/dsp_inout_registered/golden.model.xml
similarity index 100%
rename from tests/dsp_inout_registered/golden.model.xml
rename to tests/dsp/dsp_inout_registered/golden.model.xml
diff --git a/tests/dsp_inout_registered/golden.pb_type.xml b/tests/dsp/dsp_inout_registered/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_inout_registered/golden.pb_type.xml
rename to tests/dsp/dsp_inout_registered/golden.pb_type.xml
diff --git a/tests/dsp/dsp_inout_registered_dualclk/README.md b/tests/dsp/dsp_inout_registered_dualclk/README.md
new file mode 100644
index 0000000..f5baa0e
--- /dev/null
+++ b/tests/dsp/dsp_inout_registered_dualclk/README.md
@@ -0,0 +1,19 @@
+# `dsp_inout_registered_dualclk` test
+
+Test for "DSP style" block with both input and output is registered using
+separate clocks.
+
+The tests use model from [`fig42-dff`](FIXME) and
+[`dsp_combinational`](../dsp_combinational/README.md) tests.
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+ - [ ] `pack_pattern` defined on wire connections with `pack` attribute
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
diff --git a/tests/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v b/tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v
similarity index 100%
rename from tests/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v
rename to tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v
diff --git a/tests/dsp_inout_registered_dualclk/golden.model.xml b/tests/dsp/dsp_inout_registered_dualclk/golden.model.xml
similarity index 100%
rename from tests/dsp_inout_registered_dualclk/golden.model.xml
rename to tests/dsp/dsp_inout_registered_dualclk/golden.model.xml
diff --git a/tests/dsp_inout_registered_dualclk/golden.pb_type.xml b/tests/dsp/dsp_inout_registered_dualclk/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_inout_registered_dualclk/golden.pb_type.xml
rename to tests/dsp/dsp_inout_registered_dualclk/golden.pb_type.xml
diff --git a/tests/dsp/dsp_modes/README.md b/tests/dsp/dsp_modes/README.md
new file mode 100644
index 0000000..d0e25c7
--- /dev/null
+++ b/tests/dsp/dsp_modes/README.md
@@ -0,0 +1,39 @@
+# `dsp_modes` test
+
+Test for "DSP style" block with multiple different modes.
+
+The modes possible are;
+
+ * Combinational only
+   (IE [`dsp_combinational`](../dsp_combinational/README.md)).
+
+ * Register on one input
+   (IE [`dsp_partial_registered`](../dsp_partial_registered/README.md)).
+
+ * Register on all inputs
+   (IE [`dsp_in_registered`](../dsp_in_registered/README.md)).
+
+ * Register on outputs
+   (IE [`dsp_out_registered`](../dsp_out_registered/README.md)).
+
+ * Register on both inputs and outputs (with same clock)
+   (IE [`dsp_inout_registered`](../dsp_inout_registered/README.md)).
+
+ * Register on both inputs and outputs (with independent clocks)
+   (IE [`dsp_inout_registered_dualclk`](../dsp_inout_registered_dualclk/README.md)).
+
+ * Register on both inputs and outputs (with independent clocks)
+   (IE [`dsp_inout_registered_dualclk`](../dsp_inout_registered_dualclk/README.md)).
+
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
+## Modes generation
+
+ - [ ] all the modes from list defined with `MODES` attribute
+ - [ ] mode setting is included in `pb_type` generation (correct part of logic is used)
+ - [ ] modes connections are generated correctly
diff --git a/tests/dsp_modes/dsp_modes.sim.v b/tests/dsp/dsp_modes/dsp_modes.sim.v
similarity index 100%
rename from tests/dsp_modes/dsp_modes.sim.v
rename to tests/dsp/dsp_modes/dsp_modes.sim.v
diff --git a/tests/dsp_modes/golden.model.xml b/tests/dsp/dsp_modes/golden.model.xml
similarity index 100%
rename from tests/dsp_modes/golden.model.xml
rename to tests/dsp/dsp_modes/golden.model.xml
diff --git a/tests/dsp_modes/golden.pb_type.xml b/tests/dsp/dsp_modes/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_modes/golden.pb_type.xml
rename to tests/dsp/dsp_modes/golden.pb_type.xml
diff --git a/tests/dsp/dsp_out_registered/README.md b/tests/dsp/dsp_out_registered/README.md
new file mode 100644
index 0000000..27c46e2
--- /dev/null
+++ b/tests/dsp/dsp_out_registered/README.md
@@ -0,0 +1,19 @@
+# `dsp_out_registered` test
+
+Test for "DSP style" block with outputs registered.
+
+The tests use model from [`fig42-dff`](FIXME) and
+[`dsp_combinational`](../dsp_combinational/README.md) tests.
+
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+ - [ ] `pack_pattern` defined on wire connections with `pack` attribute
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
diff --git a/tests/dsp_out_registered/dsp_out_registered.sim.v b/tests/dsp/dsp_out_registered/dsp_out_registered.sim.v
similarity index 100%
rename from tests/dsp_out_registered/dsp_out_registered.sim.v
rename to tests/dsp/dsp_out_registered/dsp_out_registered.sim.v
diff --git a/tests/dsp_out_registered/golden.model.xml b/tests/dsp/dsp_out_registered/golden.model.xml
similarity index 100%
rename from tests/dsp_out_registered/golden.model.xml
rename to tests/dsp/dsp_out_registered/golden.model.xml
diff --git a/tests/dsp_out_registered/golden.pb_type.xml b/tests/dsp/dsp_out_registered/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_out_registered/golden.pb_type.xml
rename to tests/dsp/dsp_out_registered/golden.pb_type.xml
diff --git a/tests/dsp/dsp_partial_registered/README.md b/tests/dsp/dsp_partial_registered/README.md
new file mode 100644
index 0000000..7fd5d26
--- /dev/null
+++ b/tests/dsp/dsp_partial_registered/README.md
@@ -0,0 +1,18 @@
+# `dsp_partial_registered` test
+
+Test for "DSP style" block with one input registered.
+
+The tests use model from [`fig42-dff`](FIXME) and
+[`dsp_combinational`](../dsp_combinational/README.md) tests.
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+ - [ ] `pack_pattern` defined on wire connections with `pack` attribute
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
diff --git a/tests/dsp_partial_registered/dsp_partial_registered.sim.v b/tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v
similarity index 100%
rename from tests/dsp_partial_registered/dsp_partial_registered.sim.v
rename to tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v
diff --git a/tests/dsp_partial_registered/golden.model.xml b/tests/dsp/dsp_partial_registered/golden.model.xml
similarity index 100%
rename from tests/dsp_partial_registered/golden.model.xml
rename to tests/dsp/dsp_partial_registered/golden.model.xml
diff --git a/tests/dsp_partial_registered/golden.pb_type.xml b/tests/dsp/dsp_partial_registered/golden.pb_type.xml
similarity index 100%
rename from tests/dsp_partial_registered/golden.pb_type.xml
rename to tests/dsp/dsp_partial_registered/golden.pb_type.xml
diff --git a/tests/dsp_combinational/README.md b/tests/dsp_combinational/README.md
deleted file mode 100644
index d83bc78..0000000
--- a/tests/dsp_combinational/README.md
+++ /dev/null
@@ -1,16 +0,0 @@
-## dsp\_combinational tests
-
-This directory contains test for the blackbox detection for the
-`v2x_to_model.py` and `v2x_to_pb_type` tools.
-
-Model from this test is used by other dsp tests
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
-
diff --git a/tests/dsp_in_registered/README.md b/tests/dsp_in_registered/README.md
deleted file mode 100644
index 15da4a4..0000000
--- a/tests/dsp_in_registered/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## dsp\_in\_registered tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use model from fig42-dff and dps\_combinational tests.
-Those tests should check the following features:
-
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
- - [ ] pack\_pattern defined on wire connections with `pack` attribute
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
diff --git a/tests/dsp_inout_registered/README.md b/tests/dsp_inout_registered/README.md
deleted file mode 100644
index 950806c..0000000
--- a/tests/dsp_inout_registered/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## dsp\_inout\_registered tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use model from fig42-dff and dps\_combinational tests.
-Those tests should check the following features:
-
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
- - [ ] pack\_pattern defined on wire connections with `pack` attribute
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
diff --git a/tests/dsp_inout_registered_dualclk/README.md b/tests/dsp_inout_registered_dualclk/README.md
deleted file mode 100644
index 39fc8a9..0000000
--- a/tests/dsp_inout_registered_dualclk/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## dsp\_inout\_registered\_dualclk tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use model from fig42-dff and dps\_combinational tests.
-Those tests should check the following features:
-
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
- - [ ] pack\_pattern defined on wire connections with `pack` attribute
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
diff --git a/tests/dsp_modes/README.md b/tests/dsp_modes/README.md
deleted file mode 100644
index 728a5c4..0000000
--- a/tests/dsp_modes/README.md
+++ /dev/null
@@ -1,17 +0,0 @@
-## dsp\_modes tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use models from other DSP test.
-Those tests should check the following features:
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
-## Modes generation
-
- - [ ] all the modes from list defined with `MODES` attribute
- - [ ] mode setting is included in pb\_type generation (correct part of logic is used)
- - [ ] modes connections are generated correctly
diff --git a/tests/dsp_out_registered/README.md b/tests/dsp_out_registered/README.md
deleted file mode 100644
index 59b24f7..0000000
--- a/tests/dsp_out_registered/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## dsp\_out\_registered tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use model from fig42-dff and dps\_combinational tests.
-Those tests should check the following features:
-
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
- - [ ] pack\_pattern defined on wire connections with `pack` attribute
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
diff --git a/tests/dsp_partial_registered/README.md b/tests/dsp_partial_registered/README.md
deleted file mode 100644
index 373bbf9..0000000
--- a/tests/dsp_partial_registered/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## dsp\_partial\_registered tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use model from fig42-dff and dps\_combinational tests.
-Those tests should check the following features:
-
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
- - [ ] pack\_pattern defined on wire connections with `pack` attribute
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
diff --git a/tests/fig28-lutff-pair/README.md b/tests/fig28-lutff-pair/README.md
deleted file mode 100644
index 765f972..0000000
--- a/tests/fig28-lutff-pair/README.md
+++ /dev/null
@@ -1,15 +0,0 @@
-## PAIR tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-The tests use models defined in ff, lut and omux tests.
-Those tests should check the following features:
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
-## Carry chain inference
-
- - [ ] pack\_pattern inference - pack\_patterns defined on wires with `pack` attributes should be propagated to pb\_type xmls
diff --git a/tests/fig28-lutff-pair/lut/README.md b/tests/fig28-lutff-pair/lut/README.md
deleted file mode 100644
index fc2da7b..0000000
--- a/tests/fig28-lutff-pair/lut/README.md
+++ /dev/null
@@ -1,18 +0,0 @@
-## LUT tests
-
-This directory contains test for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-Those tests should check the following features:
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
- - [ ] all dependency models and pb\_types are included in the output files
-
-## Carry chain inference
-
- - [ ] pack\_pattern inference - pack\_patterns defined on wires with `pack` attributes should be propagated to pb\_type xmls
-
-## Timings
-
- - [ ] timings defined for wires with `DELAY_MATRIX` attribute should be propagated to pb\_type xml
diff --git a/tests/fig41-full-adder/README.md b/tests/fig41-full-adder/README.md
deleted file mode 100644
index 2af60b0..0000000
--- a/tests/fig41-full-adder/README.md
+++ /dev/null
@@ -1,17 +0,0 @@
-## Adder tests
-
-This directory contains test for the blackbox detection for the
-`v2x_to_model.py` and `v2x_to_pb_type` tools.
-
-## Detection of combinational connections
-
- - [ ] output has combinational connection with input
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
-
-## Timings
-
- - [ ] all the timings defined for wires with attributes should be included in pb\_type xml
diff --git a/tests/fig42-dff/README.md b/tests/fig42-dff/README.md
deleted file mode 100644
index d3e6290..0000000
--- a/tests/fig42-dff/README.md
+++ /dev/null
@@ -1,17 +0,0 @@
-## DFF tests
-
-This directory contains tests for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
-
-## Clock associations inference
-
- - [ ] automatic inference is signal is associated with any clock and include the info in the model
- - [ ] automatic clock detection (signals named `clk` are considered as clocks)
-
-## Blackbox detection
-
- - [ ] model of the leaf pb\_type is generated
- - [ ] leaf pb\_type xml is generated
-
-## Timings
-
- - [ ] all the timings defined for wires with attributes should be included in pb\_type xml
diff --git a/tests/logicbox/README.md b/tests/logicbox/README.md
index fb085d6..8c99e7f 100644
--- a/tests/logicbox/README.md
+++ b/tests/logicbox/README.md
@@ -1,4 +1,4 @@
-## DFF tests
+# Logicbox test
 
 This directory contains tests for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 
diff --git a/tests/multiple_instance/README.md b/tests/multiple_instance/README.md
index 40e9777..c340c8a 100644
--- a/tests/multiple_instance/README.md
+++ b/tests/multiple_instance/README.md
@@ -1,4 +1,4 @@
-## Multiple instance tests
+# Multiple Instance test
 
 This directory contains tests for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 
diff --git a/tests/muxes/README.md b/tests/muxes/README.md
index ad84528..836db79 100644
--- a/tests/muxes/README.md
+++ b/tests/muxes/README.md
@@ -1,4 +1,4 @@
-## Routing muxes tests
+# Routing Mux tests
 
 This directory contains tests for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 
diff --git a/tests/simple_pll/README.md b/tests/simple_pll/README.md
index 3459bfa..a0c1399 100644
--- a/tests/simple_pll/README.md
+++ b/tests/simple_pll/README.md
@@ -1,4 +1,4 @@
-## PLL tests
+# Simple PLL test
 
 This directory contains tests for the `v2x_to_model.py` and `v2x_to_pb_type` tools.
 
diff --git a/tests/vtr/dff/README.md b/tests/vtr/dff/README.md
new file mode 100644
index 0000000..c4c2fe3
--- /dev/null
+++ b/tests/vtr/dff/README.md
@@ -0,0 +1,28 @@
+# Classical D-Flip-Flop test
+
+An example of the classical D-Flip-Flop.
+
+This is shown in `Figure 43 - DFF` of the
+["Sequential block (no internal paths)"](https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling/#sequential-block-no-internal-paths)
+section in the
+[Primitive Block Timing Modeling Tutorial](https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling/#)
+of the
+[Verilog to Routing documentation](https://docs.verilogtorouting.org)
+and reproduced below;
+
+> ![Figure 43 from Verilog to Routing Documentation](dff.svg)
+> *Fig. 43 DFF*
+
+## Clock associations inference
+
+ - [ ] automatic inference is signal is associated with any clock and include the info in the model
+ - [ ] automatic clock detection (signals named `clk` are considered as clocks)
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+
+## Timings
+
+ - [ ] all the timings defined for wires with attributes should be included in `pb_type` XML
diff --git a/tests/fig42-dff/dff.sim.v b/tests/vtr/dff/dff.sim.v
similarity index 100%
rename from tests/fig42-dff/dff.sim.v
rename to tests/vtr/dff/dff.sim.v
diff --git a/tests/vtr/dff/dff.svg b/tests/vtr/dff/dff.svg
new file mode 100644
index 0000000..f7bea2e
--- /dev/null
+++ b/tests/vtr/dff/dff.svg
@@ -0,0 +1,727 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+
+<svg
+   xmlns:dc="http://purl.org/dc/elements/1.1/"
+   xmlns:cc="http://creativecommons.org/ns#"
+   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+   xmlns:svg="http://www.w3.org/2000/svg"
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+   width="109.97209"
+   height="73.527405"
+   id="svg2"
+   version="1.1"
+   inkscape:version="0.48.4 r9939"
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diff --git a/tests/fig42-dff/golden.model.xml b/tests/vtr/dff/golden.model.xml
similarity index 100%
rename from tests/fig42-dff/golden.model.xml
rename to tests/vtr/dff/golden.model.xml
diff --git a/tests/vtr/full-adder/README.md b/tests/vtr/full-adder/README.md
new file mode 100644
index 0000000..08f302d
--- /dev/null
+++ b/tests/vtr/full-adder/README.md
@@ -0,0 +1,27 @@
+# Full Adder Example
+
+An example of the classical combinational ["full adder"](https://en.wikipedia.org/wiki/Adder_(electronics)#Full_adder) circuit.
+
+This is shown in `Figure 41 - Full Adder` of the
+["Combinational block"](https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling/#combinational-block)
+section in the
+[Primitive Block Timing Modeling Tutorial](https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling/#)
+of the
+[Verilog to Routing documentation](https://docs.verilogtorouting.org)
+and reproduced below;
+
+> ![Figure 41 from Verilog to Routing Documentation](full-adder.svg)
+> *Fig. 41 Full Adder*
+
+## Detection of combinational connections
+
+ - [ ] output has combinational connection with input
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+
+## Timings
+
+ - [ ] all the timings defined for wires with attributes should be included in `pb_type` XML
diff --git a/tests/fig41-full-adder/adder.sdf b/tests/vtr/full-adder/adder.sdf
similarity index 100%
rename from tests/fig41-full-adder/adder.sdf
rename to tests/vtr/full-adder/adder.sdf
diff --git a/tests/fig41-full-adder/adder.sim.v b/tests/vtr/full-adder/adder.sim.v
similarity index 100%
rename from tests/fig41-full-adder/adder.sim.v
rename to tests/vtr/full-adder/adder.sim.v
diff --git a/tests/vtr/full-adder/full-adder.svg b/tests/vtr/full-adder/full-adder.svg
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index 0000000..9c72867
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diff --git a/tests/fig41-full-adder/golden.model.xml b/tests/vtr/full-adder/golden.model.xml
similarity index 100%
rename from tests/fig41-full-adder/golden.model.xml
rename to tests/vtr/full-adder/golden.model.xml
diff --git a/tests/fig41-full-adder/golden.pb_type.xml b/tests/vtr/full-adder/golden.pb_type.xml
similarity index 100%
rename from tests/fig41-full-adder/golden.pb_type.xml
rename to tests/vtr/full-adder/golden.pb_type.xml
diff --git a/tests/vtr/lutff-pair/README.md b/tests/vtr/lutff-pair/README.md
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@@ -0,0 +1,20 @@
+# LUT with FlipFlop Example
+
+An example of the classical LUT with FlipFlop pair.
+
+This is shown in `Figure 28` of the
+[Architecture Reference section of the Verilog to Routing Documentation](https://docs.verilogtorouting.org/en/latest/arch/reference)
+and reproduced below;
+
+> ![Figure 28 from Verilog to Routing Documentation](lutff-pair.png)
+> *Fig. 28 Pack Pattern Example.*
+
+## Blackbox detection
+
+ - [ ] model of the leaf `pb_type` is generated
+ - [ ] leaf `pb_type` XML is generated
+ - [ ] all dependency models and `pb_type`s are included in the output files
+
+## Carry chain inference
+
+ - [ ] `pack_pattern` inference - `pack_pattern`s defined on wires with `pack` attributes should be propagated to `pb_type` XMLs
diff --git a/tests/fig28-lutff-pair/ff/ff.sim.v b/tests/vtr/lutff-pair/ff/ff.sim.v
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rename from tests/fig28-lutff-pair/ff/ff.sim.v
rename to tests/vtr/lutff-pair/ff/ff.sim.v
diff --git a/tests/fig28-lutff-pair/ff/golden.model.xml b/tests/vtr/lutff-pair/ff/golden.model.xml
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rename from tests/fig28-lutff-pair/ff/golden.model.xml
rename to tests/vtr/lutff-pair/ff/golden.model.xml
diff --git a/tests/fig28-lutff-pair/ff/golden.pb_type.xml b/tests/vtr/lutff-pair/ff/golden.pb_type.xml
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rename from tests/fig28-lutff-pair/ff/golden.pb_type.xml
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diff --git a/tests/fig28-lutff-pair/golden.model.xml b/tests/vtr/lutff-pair/golden.model.xml
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diff --git a/tests/fig28-lutff-pair/golden.pb_type.xml b/tests/vtr/lutff-pair/golden.pb_type.xml
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diff --git a/tests/fig28-lutff-pair/lut/golden.model.xml b/tests/vtr/lutff-pair/lut/golden.model.xml
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rename from tests/fig28-lutff-pair/lut/golden.model.xml
rename to tests/vtr/lutff-pair/lut/golden.model.xml
diff --git a/tests/fig28-lutff-pair/lut/golden.pb_type.xml b/tests/vtr/lutff-pair/lut/golden.pb_type.xml
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rename from tests/fig28-lutff-pair/lut/golden.pb_type.xml
rename to tests/vtr/lutff-pair/lut/golden.pb_type.xml
diff --git a/tests/fig28-lutff-pair/lut/lut4.sim.v b/tests/vtr/lutff-pair/lut/lut4.sim.v
similarity index 100%
rename from tests/fig28-lutff-pair/lut/lut4.sim.v
rename to tests/vtr/lutff-pair/lut/lut4.sim.v
diff --git a/tests/vtr/lutff-pair/lutff-pair.png b/tests/vtr/lutff-pair/lutff-pair.png
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diff --git a/tests/fig28-lutff-pair/pair.sim.v b/tests/vtr/lutff-pair/pair.sim.v
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rename from tests/fig28-lutff-pair/pair.sim.v
rename to tests/vtr/lutff-pair/pair.sim.v