| Examples | |
| ============ | |
| Here we have examples on how v2x converts a Verilog module to its corresponding model.xml and pb_type.xml files. These examples are taken from the `v2x test cases <https://github.com/SymbiFlow/python-symbiflow-v2x/tree/master/tests>`_. | |
| .. toctree:: | |
| examples/clocks.rst | |
| examples/dsp.rst | |
| examples/vtr-examples.rst |