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foss-fpga-tools
/
python-symbiflow-v2x
/
d5c5d7f2e86057cd480cfa2ecedd1c469c6cc4d9
/
.
/
tests
/
internal_conn
/
child
/
child.sim.v
blob: e6aee4423c156254deee152bc5c5ee2aac829006 [
file
]
(*
blackbox
*)
module
CHILD
(
input wire I
,
output wire O
);
endmodule