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foss-fpga-tools
/
python-symbiflow-v2x
/
da38e1b84587ba69a7c232ebead60703a0453f2e
/
.
/
tests
/
net_attr
/
child
/
child.sim.v
blob: ec0bbf037a5526c0a292aa99a1d98a08e239916b [
file
]
(*
whitebox
*)
module
CHILD
(
input wire I
,
output wire O
);
endmodule