tests: vlog: dsp_in_registered: update sim.v

Signed-off-by: Karol Gugala <kgugala@antmicro.com>

tests/dsp_in_registered/dsp_in_registered.sim.v

diff --git a/tests/dsp_in_registered/dsp_in_registered.sim.v b/tests/dsp_in_registered/dsp_in_registered.sim.v
index 253a5e3..4e9e864 100644
--- a/tests/dsp_in_registered/dsp_in_registered.sim.v
+++ b/tests/dsp_in_registered/dsp_in_registered.sim.v
@@ -12,16 +12,19 @@
 	output wire [DATA_WIDTH-1:0] out;
 
 	/* Input registers */
+	(* pack="DFF2DSP" *)
 	wire [DATA_WIDTH/2-1:0] q_a;
+	(* pack="DFF2DSP" *)
 	wire [DATA_WIDTH/2-1:0] q_b;
+	(* pack="DFF2DSP" *)
 	wire q_m;
 
 	genvar i;
-	for (i=0; i<DATA_WIDTH/2; i=i+1) begin: dffs_gen
-		DFF q_a_ff(.d(a[i]), .q(q_a[i]), .clk(clk));
-		DFF q_b_ff(.d(b[i]), .q(q_b[i]), .clk(clk));
+	for (i=0; i<DATA_WIDTH/2; i=i+1) begin
+		DFF q_a_ff(.D(a[i]), .Q(q_a[i]), .CLK(clk));
+		DFF q_b_ff(.D(b[i]), .Q(q_b[i]), .CLK(clk));
 	end
-	DFF m_ff(.d(m), .q(q_m), .clk(clk));
+	DFF m_ff(.D(m), .Q(q_m), .CLK(clk));
 
 	/* Combinational Logic */
 	DSP_COMBINATIONAL comb (.a(q_a), .b(q_b), .m(q_m), .out(out));