blob: 83bdcf588f66cb3d48e724c1c99f7cc53a93ab21 [file]
mux_gen(
NAME creg_mux
COMMENT "DSP48E1 CREG mux"
DATA_WIDTH 48
INPUTS BYPASS,REG
MUX_NAME CREG_MUX
SPLIT_INPUTS 1
TYPE routing
WIDTH 2
)