blob: 8a2cd16804c7b9f0fd6b3972ceb052efae54a45d [file] [log] [blame] [edit]
<!-- set: ai sw=1 ts=1 sta et -->
<architecture xmlns:xi="http://www.w3.org/2001/XInclude">
<models><!-- model.xml file will be included here --></models>
<complexblocklist>
<!-- input buffer -->
<pb_type name="IBUF">
<output name="I" num_pins="1" />
<pb_type name="PIN" blif_model=".input" num_pb="1">
<output name="inpad" num_pins="1" />
</pb_type>
<interconnect>
<direct name="P" input="PIN.inpad" output="IBUF.I" />
</interconnect>
<pinlocations pattern="custom">
<loc side="right" xoffset="0" yoffset="0">IBUF.I</loc>
</pinlocations>
</pb_type>
<!-- output buffer -->
<pb_type name="OBUF">
<input name="O" num_pins="1" />
<pb_type name="PIN" blif_model=".output" num_pb="1">
<input name="outpad" num_pins="1" />
</pb_type>
<interconnect>
<direct name="P" input="OBUF.O" output="PIN.outpad" />
</interconnect>
<pinlocations pattern="custom">
<loc side="left" xoffset="0" yoffset="0">OBUF.O</loc>
</pinlocations>
</pb_type>
<!-- pb_type.xml file will be included here -->
</complexblocklist>
<layout><!-- layout will be auto generated here --></layout>
<device>
<sizing R_minW_nmos="6065.520020" R_minW_pmos="18138.500000" />
<area grid_logic_tile_area="14813.392"/>
<connection_block input_switch_name="mux"/>
<switch_block type="wilton" fs="3"/>
<chan_width_distr>
<x distr="uniform" peak="1.000000"/>
<y distr="uniform" peak="1.000000"/>
</chan_width_distr>
<default_fc in_type="frac" in_val="1.0" out_type="frac" out_val="1.0"/>
</device>
<switchlist>
<switch type="mux" name="mux" R="551" Cin=".77e-15" Cout="4e-15" Tdel="58e-12" mux_trans_size="2.630740" buf_size="27.645901"/>
</switchlist>
<segmentlist>
<segment name="local" length="1" freq="1.000000" type="unidir" Rmetal="101" Cmetal="22.5e-15">
<sb type="pattern">1 1</sb>
<cb type="pattern">1</cb>
<mux name="mux"/>
</segment>
</segmentlist>
</architecture>