xilinx/xc7/tests/multixdc_counter/arty_1.xdc

# sw[7:0] corresponds to {BTN3-0, SW3-0} in arty
set_property LOC A8  [get_ports {sw[0]}]
set_property LOC C11 [get_ports {sw[1]}]
set_property LOC C10 [get_ports {sw[2]}]
set_property LOC A10 [get_ports {sw[3]}]
set_property LOC D9  [get_ports {sw[4]}]
set_property LOC C9  [get_ports {sw[5]}]
set_property LOC B9  [get_ports {sw[6]}]
set_property LOC B8  [get_ports {sw[7]}]