blob: 63667755aceb15873b15a1f9d8de1693df1c7acf [file] [log] [blame] [edit]
add_file_target(FILE dsp.xdc)
add_file_target(FILE top.v SCANNER_TYPE verilog)
add_fpga_target(
NAME dsp
BOARD arty-full
SOURCES top.v
INPUT_XDC_FILES dsp.xdc
EXPLICIT_ADD_FILE_TARGET
)
add_vivado_target(
NAME dsp_vivado
PARENT_NAME dsp
)