Sign in
◑
Theme
foss-fpga-tools
/
symbiflow-docs
/
ce992c2ca398c7838c8bb98e5f8f364cd9cdecbc
/
.
/
f4pga
/
wrappers
/
tcl
/
ice40.nextpnr.f4pga.tcl
blob: 66c35c44dec4df86e09cd1941a8449b2eec85830 [
file
]
yosys -import
synth_ice40 -nocarry
opt_expr -undriven
opt_clean
attrmap -remove hdlname
setundef -zero -params
write_json
$::
env(OUT_JSON)
#write_verilog $::env(OUT_SYNTH_V)