Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
1b0062119887da734c600d091a65c037f5fafa7d
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sat_tempinduct.ys
blob: f434d5943f2067b6ef874696c5aeec29c8254c76 [
file
] [
log
] [
blame
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log sat
-
prove x
1
-
tempinduct middle
