Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
Surelog
/
24b1c6d5d1c71459ed0a09056e0f352c125383ac
/
.
/
src
/
Testcases
/
YosysTests
/
backends
/
scripts
/
write_edif_top.ys
blob: bd118a363aa55de37dce1c20c0c69d43776b1187 [
file
]
read_verilog
../
top
.
v
proc
write_edif
-
top top edif
.
edif
write_verilog synth
.
v