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foss-fpga-tools
/
third_party
/
Surelog
/
24b1c6d5d1c71459ed0a09056e0f352c125383ac
/
.
/
src
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sim_vcd.ys
blob: 35e8380b389906225804e4160ca0f55d7d8c31d8 [
file
]
read_verilog
-
sv
../
top
.
v
proc
tee
-
o result
.
log sim
-
vcd vcd
.
vcd top
