Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
2b38692156ff2742b1c4c94d3b93df97f2145e0c
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
dffsr2dff.ys
blob: 544ae1341b8023786523ce44dcc762a3bc36a849 [
file
] [
log
] [
blame
]
read_verilog
../
top
.
v
proc
dffsr2dff
techmap
dffsr2dff
design
-
reset
read_verilog
../
top
.
v
synth
-
top top
dffsr2dff
flatten
opt
opt_rmdff
dffsr2dff
write_verilog synth
.
v
