Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
2b38692156ff2742b1c4c94d3b93df97f2145e0c
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
submod_no_hier.ys
blob: c404ad975441827349868362c470fb09e63e09f7 [
file
]
read_verilog
../
top
.
v
proc
submod
synth
-
top top
write_verilog synth
.
v
