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foss-fpga-tools
/
third_party
/
Surelog
/
36b4216d1db413803a993ffb92cda5b2bcc4912b
/
.
/
SVIncCompil
/
Testcases
/
YosysTestSuite
/
lut
/
map_xor.v
blob: 708a05789a3363e98fdb271c9e160da35715cbca [
file
]
module
top
(...);
input a
,
b
;
output y
;
assign y
=
a
^
b
;
endmodule