Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
36edd2bd845c2e56e36b75d2696ae7a98914e2a8
/
.
/
SVIncCompil
/
Testcases
/
UtdSV
/
inc-2.v
blob: 52d76def97b9ecac9a73b62c979e146c63d9bf42 [
file
] [
log
] [
blame
]
`include "inc-1.h"
module a_module(
input [`
BUS_WIDTH
]
bus
);
endmodule
