SVIncCompil/Testcases/Custom_FIR_DMA/Custom_FIR_DMA.log

********************************************
*  SURELOG System Verilog Compiler/Linter  *
********************************************

[INFO :CM0023] Creating log file ./slpp_unit/surelog.log.

[INFO :CM0024] Executing with 4 threads.

[INFO :CM0020] Separate compilation-unit mode is on.

[INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv".

[INFO :PP0122] Preprocessing source file "altpllpll.v".

[INFO :PP0122] Preprocessing source file "altpllpll_bb.v".

[INFO :PP0122] Preprocessing source file "cpu_jtag_debug_module_sysclk.v".

[INFO :PP0122] Preprocessing source file "cpu_jtag_debug_module_tck.v".

[INFO :PP0122] Preprocessing source file "cpu_jtag_debug_module_wrapper.v".

[INFO :PP0122] Preprocessing source file "cpu_mult_cell.v".

[INFO :PP0122] Preprocessing source file "cpu_oci_test_bench.v".

[INFO :PP0122] Preprocessing source file "cpu_test_bench.v".

[INFO :PP0122] Preprocessing source file "custom_dma.v".

[INFO :PP0123] Preprocessing include file "c:/altera/91sp2/quartus/eda/sim_lib/altera_mf.v".

[ERROR:PP0101] custom_dma.v:20466 Cannot open include file "c:/altera/91sp2/quartus/eda/sim_lib/altera_mf.v".

[INFO :PP0123] Preprocessing include file "c:/altera/91sp2/quartus/eda/sim_lib/220model.v".

[ERROR:PP0101] custom_dma.v:20467 Cannot open include file "c:/altera/91sp2/quartus/eda/sim_lib/220model.v".

[INFO :PP0123] Preprocessing include file "c:/altera/91sp2/quartus/eda/sim_lib/sgate.v".

[ERROR:PP0101] custom_dma.v:20468 Cannot open include file "c:/altera/91sp2/quartus/eda/sim_lib/sgate.v".

[INFO :PP0123] Preprocessing include file "c:/altera/91sp2/quartus/eda/sim_lib/stratixii_atoms.v".

[ERROR:PP0101] custom_dma.v:20469 Cannot open include file "c:/altera/91sp2/quartus/eda/sim_lib/stratixii_atoms.v".

[INFO :PP0123] Preprocessing include file "ddr_sdram_auk_ddr_dqs_group.v".

[INFO :PP0123] Preprocessing include file "ddr_sdram_auk_ddr_clk_gen.v".

[INFO :PP0123] Preprocessing include file "ddr_sdram_auk_ddr_datapath.v".

[INFO :PP0123] Preprocessing include file "ddr_sdram.vo".

[ERROR:PP0101] custom_dma.v:20473 Cannot open include file "ddr_sdram.vo".

[INFO :PP0123] Preprocessing include file "fir_dma.vo".

[ERROR:PP0101] custom_dma.v:20474 Cannot open include file "fir_dma.vo".

[INFO :PP0123] Preprocessing include file "pll.v".

[INFO :PP0123] Preprocessing include file "altpllpll.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_2.v".

[INFO :PP0123] Preprocessing include file "sysid.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_5.v".

[INFO :PP0123] Preprocessing include file "jtag_uart.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_0.v".

[INFO :PP0123] Preprocessing include file "pipeline_bridge.v".

[INFO :PP0123] Preprocessing include file "ddr_sdram_test_component.v".

[INFO :PP0123] Preprocessing include file "cpu_test_bench.v".

[INFO :PP0123] Preprocessing include file "cpu_mult_cell.v".

[INFO :PP0123] Preprocessing include file "cpu_oci_test_bench.v".

[INFO :PP0123] Preprocessing include file "cpu_jtag_debug_module_tck.v".

[INFO :PP0123] Preprocessing include file "cpu_jtag_debug_module_sysclk.v".

[INFO :PP0123] Preprocessing include file "cpu_jtag_debug_module_wrapper.v".

[INFO :PP0123] Preprocessing include file "cpu.vo".

[ERROR:PP0101] custom_dma.v:20490 Cannot open include file "cpu.vo".

[INFO :PP0123] Preprocessing include file "custom_dma_clock_0.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_1.v".

[INFO :PP0123] Preprocessing include file "timestamp_timer.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_3.v".

[INFO :PP0123] Preprocessing include file "custom_dma_burst_4.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_0.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_1.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_2.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_3.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_4.v".

[INFO :PP0122] Preprocessing source file "custom_dma_burst_5.v".

[INFO :PP0122] Preprocessing source file "custom_dma_clock_0.v".

[INFO :PP0122] Preprocessing source file "ddr_pll_stratixii.v".

[INFO :PP0122] Preprocessing source file "ddr_pll_stratixii_bb.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_auk_ddr_clk_gen.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_auk_ddr_datapath.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_auk_ddr_dll.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_auk_ddr_dqs_group.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_auk_ddr_sdram.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_bb.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_example_driver.v".

[INFO :PP0122] Preprocessing source file "ddr_sdram_test_component.v".

[INFO :PP0122] Preprocessing source file "fir_dma.v".

[INFO :PP0122] Preprocessing source file "jtag_uart.v".

[INFO :PP0122] Preprocessing source file "pipeline_bridge.v".

[INFO :PP0122] Preprocessing source file "pll.v".

[INFO :PP0122] Preprocessing source file "sysid.v".

[INFO :PP0122] Preprocessing source file "timestamp_timer.v".

[INFO :PP0122] Preprocessing source file "dma/burst_write_master.v".

[INFO :PP0122] Preprocessing source file "dma/custom_FIR.v".

[INFO :PP0123] Preprocessing include file "dma/coefs.h".

[INFO :PP0122] Preprocessing source file "dma/latency_aware_read_master.v".

[INFO :PP0122] Preprocessing source file "dma/pipelined_read_burst_write_dma.v".

[INFO :PP0122] Preprocessing source file "dma/slave.v".

[INFO :PP0122] Preprocessing source file "dma/transform_block.v".

[INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv".

[INFO :PA0201] Parsing source file "altpllpll.v".

[INFO :PA0201] Parsing source file "altpllpll_bb.v".

[INFO :PA0201] Parsing source file "cpu_jtag_debug_module_sysclk.v".

[INFO :PA0201] Parsing source file "cpu_jtag_debug_module_tck.v".

[INFO :PA0201] Parsing source file "cpu_jtag_debug_module_wrapper.v".

[INFO :PA0201] Parsing source file "cpu_mult_cell.v".

[INFO :PA0201] Parsing source file "cpu_oci_test_bench.v".

[INFO :PA0201] Parsing source file "cpu_test_bench.v".

[INFO :PA0201] Parsing source file "custom_dma.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_0.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_1.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_2.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_3.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_4.v".

[INFO :PA0201] Parsing source file "custom_dma_burst_5.v".

[INFO :PA0201] Parsing source file "custom_dma_clock_0.v".

[INFO :PA0201] Parsing source file "ddr_pll_stratixii.v".

[INFO :PA0201] Parsing source file "ddr_pll_stratixii_bb.v".

[INFO :PA0201] Parsing source file "ddr_sdram.v".

[INFO :PA0201] Parsing source file "ddr_sdram_auk_ddr_clk_gen.v".

[INFO :PA0201] Parsing source file "ddr_sdram_auk_ddr_datapath.v".

[INFO :PA0201] Parsing source file "ddr_sdram_auk_ddr_dll.v".

[INFO :PA0201] Parsing source file "ddr_sdram_auk_ddr_dqs_group.v".

[INFO :PA0201] Parsing source file "ddr_sdram_auk_ddr_sdram.v".

[INFO :PA0201] Parsing source file "ddr_sdram_bb.v".

[INFO :PA0201] Parsing source file "ddr_sdram_example_driver.v".

[INFO :PA0201] Parsing source file "ddr_sdram_test_component.v".

[INFO :PA0201] Parsing source file "fir_dma.v".

[INFO :PA0201] Parsing source file "jtag_uart.v".

[INFO :PA0201] Parsing source file "pipeline_bridge.v".

[INFO :PA0201] Parsing source file "pll.v".

[INFO :PA0201] Parsing source file "sysid.v".

[INFO :PA0201] Parsing source file "timestamp_timer.v".

[INFO :PA0201] Parsing source file "dma/burst_write_master.v".

[INFO :PA0201] Parsing source file "dma/custom_FIR.v".

[INFO :PA0201] Parsing source file "dma/latency_aware_read_master.v".

[INFO :PA0201] Parsing source file "dma/pipelined_read_burst_write_dma.v".

[INFO :PA0201] Parsing source file "dma/slave.v".

[INFO :PA0201] Parsing source file "dma/transform_block.v".

[WARNI:PA0205] altpllpll_bb.v:34 No timescale set for "altpllpll".

[WARNI:PA0205] cpu_jtag_debug_module_sysclk.v:18 No timescale set for "cpu_jtag_debug_module_sysclk".

[WARNI:PA0205] cpu_jtag_debug_module_tck.v:18 No timescale set for "cpu_jtag_debug_module_tck".

[WARNI:PA0205] cpu_jtag_debug_module_wrapper.v:18 No timescale set for "cpu_jtag_debug_module_wrapper".

[WARNI:PA0205] cpu_mult_cell.v:18 No timescale set for "cpu_mult_cell".

[WARNI:PA0205] cpu_oci_test_bench.v:18 No timescale set for "cpu_oci_test_bench".

[WARNI:PA0205] cpu_test_bench.v:18 No timescale set for "cpu_test_bench".

[WARNI:PA0205] ddr_pll_stratixii_bb.v:34 No timescale set for "ddr_pll_stratixii".

[WARNI:PA0205] ddr_sdram.v:32 No timescale set for "ddr_sdram".

[WARNI:PA0205] fir_dma.v:6 No timescale set for "fir_dma".

[WARNI:PA0205] dma/burst_write_master.v:35 No timescale set for "burst_write_master".

[WARNI:PA0205] dma/custom_FIR.v:40 No timescale set for "custom_FIR".

[WARNI:PA0205] dma/latency_aware_read_master.v:33 No timescale set for "latency_aware_read_master".

[WARNI:PA0205] dma/pipelined_read_burst_write_dma.v:87 No timescale set for "pipelined_read_burst_write_dma".

[WARNI:PA0205] dma/slave.v:25 No timescale set for "slave".

[WARNI:PA0205] dma/transform_block.v:45 No timescale set for "transform_block".

[INFO :CP0300] Compilation...

[INFO :CP0303] altpllpll.v:39 Compile module "work@altpllpll".

[INFO :CP0303] dma/burst_write_master.v:35 Compile module "work@burst_write_master".

[INFO :CP0303] custom_dma.v:924 Compile module "work@burstcount_fifo_for_custom_dma_burst_0_upstream_module".

[INFO :CP0303] custom_dma.v:2257 Compile module "work@burstcount_fifo_for_custom_dma_burst_1_upstream_module".

[INFO :CP0303] custom_dma.v:3551 Compile module "work@burstcount_fifo_for_custom_dma_burst_2_upstream_module".

[INFO :CP0303] custom_dma.v:4888 Compile module "work@burstcount_fifo_for_custom_dma_burst_3_upstream_module".

[INFO :CP0303] custom_dma.v:7094 Compile module "work@burstcount_fifo_for_custom_dma_burst_4_upstream_module".

[INFO :CP0303] custom_dma.v:10475 Compile module "work@burstcount_fifo_for_ddr_sdram_s1_module".

[INFO :CP0303] custom_dma.v:342 Compile module "work@cpu_data_master_arbitrator".

[INFO :CP0303] custom_dma.v:701 Compile module "work@cpu_instruction_master_arbitrator".

[INFO :CP0303] custom_dma.v:26 Compile module "work@cpu_jtag_debug_module_arbitrator".

[INFO :CP0303] cpu_jtag_debug_module_sysclk.v:18 Compile module "work@cpu_jtag_debug_module_sysclk".

[INFO :CP0303] cpu_jtag_debug_module_tck.v:18 Compile module "work@cpu_jtag_debug_module_tck".

[INFO :CP0303] cpu_jtag_debug_module_wrapper.v:18 Compile module "work@cpu_jtag_debug_module_wrapper".

[INFO :CP0303] cpu_mult_cell.v:18 Compile module "work@cpu_mult_cell".

[INFO :CP0303] cpu_oci_test_bench.v:18 Compile module "work@cpu_oci_test_bench".

[INFO :CP0303] cpu_test_bench.v:18 Compile module "work@cpu_test_bench".

[INFO :CP0303] dma/custom_FIR.v:40 Compile module "work@custom_FIR".

[INFO :CP0303] custom_dma.v:18076 Compile module "work@custom_dma".

[INFO :CP0303] custom_dma_burst_0.v:52 Compile module "work@custom_dma_burst_0".

[INFO :CP0303] custom_dma.v:1981 Compile module "work@custom_dma_burst_0_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:1544 Compile module "work@custom_dma_burst_0_upstream_arbitrator".

[INFO :CP0303] custom_dma_burst_1.v:52 Compile module "work@custom_dma_burst_1".

[INFO :CP0303] custom_dma.v:3271 Compile module "work@custom_dma_burst_1_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:2877 Compile module "work@custom_dma_burst_1_upstream_arbitrator".

[INFO :CP0303] custom_dma_burst_2.v:52 Compile module "work@custom_dma_burst_2".

[INFO :CP0303] custom_dma.v:4608 Compile module "work@custom_dma_burst_2_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:4171 Compile module "work@custom_dma_burst_2_upstream_arbitrator".

[INFO :CP0303] custom_dma_burst_3.v:52 Compile module "work@custom_dma_burst_3".

[INFO :CP0303] custom_dma.v:6814 Compile module "work@custom_dma_burst_3_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:6420 Compile module "work@custom_dma_burst_3_upstream_arbitrator".

[INFO :CP0303] custom_dma_burst_4.v:52 Compile module "work@custom_dma_burst_4".

[INFO :CP0303] custom_dma.v:9063 Compile module "work@custom_dma_burst_4_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:8626 Compile module "work@custom_dma_burst_4_upstream_arbitrator".

[INFO :CP0303] custom_dma_burst_5.v:52 Compile module "work@custom_dma_burst_5".

[INFO :CP0303] custom_dma.v:9673 Compile module "work@custom_dma_burst_5_downstream_arbitrator".

[INFO :CP0303] custom_dma.v:9343 Compile module "work@custom_dma_burst_5_upstream_arbitrator".

[INFO :CP0303] custom_dma_clock_0.v:417 Compile module "work@custom_dma_clock_0".

[INFO :CP0303] custom_dma_clock_0.v:365 Compile module "work@custom_dma_clock_0_bit_pipe".

[INFO :CP0303] custom_dma_clock_0.v:21 Compile module "work@custom_dma_clock_0_edge_to_pulse".

[INFO :CP0303] custom_dma.v:9953 Compile module "work@custom_dma_clock_0_in_arbitrator".

[INFO :CP0303] custom_dma_clock_0.v:199 Compile module "work@custom_dma_clock_0_master_FSM".

[INFO :CP0303] custom_dma.v:10272 Compile module "work@custom_dma_clock_0_out_arbitrator".

[INFO :CP0303] custom_dma_clock_0.v:58 Compile module "work@custom_dma_clock_0_slave_FSM".

[INFO :CP0303] custom_dma.v:18031 Compile module "work@custom_dma_reset_external_clk_domain_synch_module".

[INFO :CP0303] custom_dma.v:17986 Compile module "work@custom_dma_reset_system_clk_domain_synch_module".

[INFO :CP0303] ddr_pll_stratixii.v:39 Compile module "work@ddr_pll_stratixii".

[INFO :CP0303] ddr_sdram.v:32 Compile module "work@ddr_sdram".

[INFO :CP0303] ddr_sdram_auk_ddr_clk_gen.v:26 Compile module "work@ddr_sdram_auk_ddr_clk_gen".

[INFO :CP0303] ddr_sdram_auk_ddr_datapath.v:21 Compile module "work@ddr_sdram_auk_ddr_datapath".

[INFO :CP0303] ddr_sdram_auk_ddr_dll.v:21 Compile module "work@ddr_sdram_auk_ddr_dll".

[INFO :CP0303] ddr_sdram_auk_ddr_dqs_group.v:37 Compile module "work@ddr_sdram_auk_ddr_dqs_group".

[INFO :CP0303] ddr_sdram_auk_ddr_sdram.v:21 Compile module "work@ddr_sdram_auk_ddr_sdram".

[INFO :CP0303] ddr_sdram_example_driver.v:21 Compile module "work@ddr_sdram_example_driver".

[INFO :CP0303] custom_dma.v:13235 Compile module "work@ddr_sdram_s1_arbitrator".

[INFO :CP0303] ddr_sdram_test_component.v:110 Compile module "work@ddr_sdram_test_component".

[INFO :CP0303] ddr_sdram_test_component.v:21 Compile module "work@ddr_sdram_test_component_ram_module".

[INFO :CP0303] custom_dma.v:20335 Compile module "work@ext_ssram".

[INFO :CP0303] custom_dma.v:14019 Compile module "work@ext_ssram_bus_avalon_slave_arbitrator".

[INFO :CP0303] custom_dma.v:14615 Compile module "work@ext_ssram_bus_bridge_arbitrator".

[INFO :CP0303] custom_dma.v:19919 Compile module "work@ext_ssram_lane0_module".

[INFO :CP0303] custom_dma.v:20023 Compile module "work@ext_ssram_lane1_module".

[INFO :CP0303] custom_dma.v:20127 Compile module "work@ext_ssram_lane2_module".

[INFO :CP0303] custom_dma.v:20231 Compile module "work@ext_ssram_lane3_module".

[INFO :CP0303] fir_dma.v:6 Compile module "work@fir_dma".

[INFO :CP0303] custom_dma.v:14628 Compile module "work@fir_dma_control_arbitrator".

[INFO :CP0303] custom_dma.v:14952 Compile module "work@fir_dma_read_master_arbitrator".

[INFO :CP0303] custom_dma.v:15151 Compile module "work@fir_dma_write_master_arbitrator".

[INFO :CP0303] jtag_uart.v:520 Compile module "work@jtag_uart".

[INFO :CP0303] custom_dma.v:15341 Compile module "work@jtag_uart_avalon_jtag_slave_arbitrator".

[INFO :CP0303] jtag_uart.v:202 Compile module "work@jtag_uart_drom_module".

[INFO :CP0303] jtag_uart.v:21 Compile module "work@jtag_uart_log_module".

[INFO :CP0303] jtag_uart.v:436 Compile module "work@jtag_uart_scfifo_r".

[INFO :CP0303] jtag_uart.v:120 Compile module "work@jtag_uart_scfifo_w".

[INFO :CP0303] jtag_uart.v:351 Compile module "work@jtag_uart_sim_scfifo_r".

[INFO :CP0303] jtag_uart.v:65 Compile module "work@jtag_uart_sim_scfifo_w".

[INFO :CP0303] dma/latency_aware_read_master.v:33 Compile module "work@latency_aware_read_master".

[INFO :CP0303] pipeline_bridge.v:639 Compile module "work@pipeline_bridge".

[INFO :CP0303] custom_dma.v:17137 Compile module "work@pipeline_bridge_bridge_arbitrator".

[INFO :CP0303] pipeline_bridge.v:21 Compile module "work@pipeline_bridge_downstream_adapter".

[INFO :CP0303] custom_dma.v:16742 Compile module "work@pipeline_bridge_m1_arbitrator".

[INFO :CP0303] custom_dma.v:16133 Compile module "work@pipeline_bridge_s1_arbitrator".

[INFO :CP0303] pipeline_bridge.v:222 Compile module "work@pipeline_bridge_upstream_adapter".

[INFO :CP0303] pipeline_bridge.v:367 Compile module "work@pipeline_bridge_waitrequest_adapter".

[INFO :CP0303] dma/pipelined_read_burst_write_dma.v:87 Compile module "work@pipelined_read_burst_write_dma".

[INFO :CP0303] pll.v:21 Compile module "work@pll".

[INFO :CP0303] custom_dma.v:17150 Compile module "work@pll_s1_arbitrator".

[INFO :CP0303] custom_dma.v:1234 Compile module "work@rdv_fifo_for_cpu_data_master_to_custom_dma_burst_0_upstream_module".

[INFO :CP0303] custom_dma.v:3861 Compile module "work@rdv_fifo_for_cpu_data_master_to_custom_dma_burst_2_upstream_module".

[INFO :CP0303] custom_dma.v:7860 Compile module "work@rdv_fifo_for_cpu_data_master_to_custom_dma_burst_4_upstream_module".

[INFO :CP0303] custom_dma.v:2567 Compile module "work@rdv_fifo_for_cpu_instruction_master_to_custom_dma_burst_1_upstream_module".

[INFO :CP0303] custom_dma.v:5654 Compile module "work@rdv_fifo_for_cpu_instruction_master_to_custom_dma_burst_3_upstream_module".

[INFO :CP0303] custom_dma.v:15665 Compile module "work@rdv_fifo_for_custom_dma_burst_1_downstream_to_pipeline_bridge_s1_module".

[INFO :CP0303] custom_dma.v:15899 Compile module "work@rdv_fifo_for_custom_dma_burst_2_downstream_to_pipeline_bridge_s1_module".

[INFO :CP0303] custom_dma.v:11165 Compile module "work@rdv_fifo_for_custom_dma_burst_3_downstream_to_ddr_sdram_s1_module".

[INFO :CP0303] custom_dma.v:11855 Compile module "work@rdv_fifo_for_custom_dma_burst_4_downstream_to_ddr_sdram_s1_module".

[INFO :CP0303] custom_dma.v:12545 Compile module "work@rdv_fifo_for_custom_dma_burst_5_downstream_to_ddr_sdram_s1_module".

[INFO :CP0303] dma/slave.v:25 Compile module "work@slave".

[INFO :CP0303] sysid.v:21 Compile module "work@sysid".

[INFO :CP0303] custom_dma.v:17430 Compile module "work@sysid_control_slave_arbitrator".

[INFO :CP0303] custom_dma.v:20498 Compile module "work@test_bench".

[INFO :CP0303] timestamp_timer.v:21 Compile module "work@timestamp_timer".

[INFO :CP0303] custom_dma.v:17692 Compile module "work@timestamp_timer_s1_arbitrator".

[INFO :CP0303] dma/transform_block.v:45 Compile module "work@transform_block".

[INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox".

[INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process".

[INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore".

[NOTE :CP0309] altpllpll.v:41 Implicit port type (wire) for "c0",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:935 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:2268 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:3562 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:4899 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:7105 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:10486 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:381 Implicit port type (wire) for "cpu_data_master_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:726 Implicit port type (wire) for "cpu_instruction_master_address_to_slave",
there are 3 more instances of this message.

[NOTE :CP0309] custom_dma.v:43 Implicit port type (wire) for "cpu_jtag_debug_module_address",
there are 13 more instances of this message.

[NOTE :CP0309] cpu_jtag_debug_module_sysclk.v:28 Implicit port type (wire) for "take_action_break_a",
there are 12 more instances of this message.

[NOTE :CP0309] cpu_jtag_debug_module_tck.v:49 Implicit port type (wire) for "jrst_n",
there are 2 more instances of this message.

[NOTE :CP0309] cpu_jtag_debug_module_wrapper.v:42 Implicit port type (wire) for "jdo",
there are 15 more instances of this message.

[NOTE :CP0309] cpu_mult_cell.v:30 Implicit port type (wire) for "A_mul_cell_result".

[NOTE :CP0309] cpu_test_bench.v:67 Implicit port type (wire) for "A_wr_data_filtered",
there are 6 more instances of this message.

[NOTE :CP0309] custom_dma.v:18080 Implicit port type (wire) for "sdram_write_clk",
there are 22 more instances of this message.

[NOTE :CP0309] custom_dma_burst_0.v:78 Implicit port type (wire) for "upstream_readdata",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:1999 Implicit port type (wire) for "custom_dma_burst_0_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:1563 Implicit port type (wire) for "cpu_data_master_granted_custom_dma_burst_0_upstream",
there are 14 more instances of this message.

[NOTE :CP0309] custom_dma_burst_1.v:77 Implicit port type (wire) for "upstream_readdata",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:3291 Implicit port type (wire) for "custom_dma_burst_1_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:2891 Implicit port type (wire) for "cpu_instruction_master_granted_custom_dma_burst_1_upstream",
there are 12 more instances of this message.

[NOTE :CP0309] custom_dma_burst_2.v:78 Implicit port type (wire) for "upstream_readdata",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:4628 Implicit port type (wire) for "custom_dma_burst_2_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:4190 Implicit port type (wire) for "cpu_data_master_granted_custom_dma_burst_2_upstream",
there are 14 more instances of this message.

[NOTE :CP0309] custom_dma_burst_3.v:77 Implicit port type (wire) for "upstream_readdata",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:6834 Implicit port type (wire) for "custom_dma_burst_3_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:6434 Implicit port type (wire) for "cpu_instruction_master_granted_custom_dma_burst_3_upstream",
there are 12 more instances of this message.

[NOTE :CP0309] custom_dma_burst_4.v:78 Implicit port type (wire) for "upstream_readdata",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:9083 Implicit port type (wire) for "custom_dma_burst_4_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:8645 Implicit port type (wire) for "cpu_data_master_granted_custom_dma_burst_4_upstream",
there are 14 more instances of this message.

[NOTE :CP0309] custom_dma_burst_5.v:69 Implicit port type (wire) for "downstream_address",
there are 10 more instances of this message.

[NOTE :CP0309] custom_dma.v:9693 Implicit port type (wire) for "custom_dma_burst_5_downstream_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:9357 Implicit port type (wire) for "custom_dma_burst_5_upstream_address",
there are 13 more instances of this message.

[NOTE :CP0309] custom_dma_clock_0.v:437 Implicit port type (wire) for "master_read",
there are 3 more instances of this message.

[NOTE :CP0309] custom_dma_clock_0.v:28 Implicit port type (wire) for "data_out".

[NOTE :CP0309] custom_dma.v:9970 Implicit port type (wire) for "custom_dma_clock_0_in_address",
there are 13 more instances of this message.

[NOTE :CP0309] custom_dma.v:10289 Implicit port type (wire) for "custom_dma_clock_0_out_address_to_slave",
there are 3 more instances of this message.

[NOTE :CP0309] ddr_pll_stratixii.v:42 Implicit port type (wire) for "c0",
there are 4 more instances of this message.

[NOTE :CP0309] ddr_sdram.v:45 Implicit port type (wire) for "local_ready",
there are 15 more instances of this message.

[NOTE :CP0309] ddr_sdram_auk_ddr_clk_gen.v:32 Implicit port type (wire) for "clk_to_sdram",
there are 1 more instances of this message.

[NOTE :CP0309] ddr_sdram_auk_ddr_datapath.v:39 Implicit port type (wire) for "clk_to_sdram",
there are 5 more instances of this message.

[NOTE :CP0309] ddr_sdram_auk_ddr_dll.v:30 Implicit port type (wire) for "delayctrlout",
there are 1 more instances of this message.

[NOTE :CP0309] ddr_sdram_auk_ddr_dqs_group.v:55 Implicit port type (wire) for "control_rdata",
there are 3 more instances of this message.

[NOTE :CP0309] ddr_sdram_auk_ddr_sdram.v:58 Implicit port type (wire) for "clk_to_sdram",
there are 20 more instances of this message.

[NOTE :CP0309] ddr_sdram_example_driver.v:30 Implicit port type (wire) for "local_bank_addr",
there are 10 more instances of this message.

[NOTE :CP0309] custom_dma.v:13268 Implicit port type (wire) for "custom_dma_burst_3_downstream_granted_ddr_sdram_s1",
there are 24 more instances of this message.

[NOTE :CP0309] ddr_sdram_test_component.v:123 Implicit port type (wire) for "ddr_dq",
there are 1 more instances of this message.

[NOTE :CP0309] ddr_sdram_test_component.v:31 Implicit port type (wire) for "q".

[NOTE :CP0309] custom_dma.v:20347 Implicit port type (wire) for "data".

[NOTE :CP0309] custom_dma.v:14040 Implicit port type (wire) for "custom_dma_burst_0_downstream_granted_ext_ssram_s1",
there are 8 more instances of this message.

[NOTE :CP0309] custom_dma.v:19931 Implicit port type (wire) for "q".

[NOTE :CP0309] custom_dma.v:20035 Implicit port type (wire) for "q".

[NOTE :CP0309] custom_dma.v:20139 Implicit port type (wire) for "q".

[NOTE :CP0309] custom_dma.v:20243 Implicit port type (wire) for "q".

[NOTE :CP0309] custom_dma.v:14645 Implicit port type (wire) for "fir_dma_control_address",
there are 11 more instances of this message.

[NOTE :CP0309] custom_dma.v:14967 Implicit port type (wire) for "fir_dma_read_master_address_to_slave",
there are 3 more instances of this message.

[NOTE :CP0309] custom_dma.v:15167 Implicit port type (wire) for "fir_dma_write_master_address_to_slave",
there are 1 more instances of this message.

[NOTE :CP0309] jtag_uart.v:531 Implicit port type (wire) for "av_irq",
there are 1 more instances of this message.

[NOTE :CP0309] custom_dma.v:15360 Implicit port type (wire) for "jtag_uart_avalon_jtag_slave_address",
there are 14 more instances of this message.

[NOTE :CP0309] jtag_uart.v:210 Implicit port type (wire) for "num_bytes",
there are 2 more instances of this message.

[NOTE :CP0309] jtag_uart.v:446 Implicit port type (wire) for "fifo_EF",
there are 3 more instances of this message.

[NOTE :CP0309] jtag_uart.v:129 Implicit port type (wire) for "fifo_FF",
there are 3 more instances of this message.

[NOTE :CP0309] jtag_uart.v:358 Implicit port type (wire) for "fifo_EF",
there are 3 more instances of this message.

[NOTE :CP0309] jtag_uart.v:72 Implicit port type (wire) for "fifo_FF",
there are 3 more instances of this message.

[NOTE :CP0309] pipeline_bridge.v:660 Implicit port type (wire) for "m1_address",
there are 11 more instances of this message.

[NOTE :CP0309] pipeline_bridge.v:53 Implicit port type (wire) for "s1_endofpacket",
there are 3 more instances of this message.

[NOTE :CP0309] custom_dma.v:16794 Implicit port type (wire) for "pipeline_bridge_m1_address_to_slave",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:16163 Implicit port type (wire) for "custom_dma_burst_1_downstream_granted_pipeline_bridge_s1",
there are 24 more instances of this message.

[NOTE :CP0309] pipeline_bridge.v:246 Implicit port type (wire) for "m1_address",
there are 11 more instances of this message.

[NOTE :CP0309] pipeline_bridge.v:389 Implicit port type (wire) for "m1_address",
there are 13 more instances of this message.

[NOTE :CP0309] pll.v:32 Implicit port type (wire) for "c0",
there are 4 more instances of this message.

[NOTE :CP0309] custom_dma.v:17163 Implicit port type (wire) for "custom_dma_clock_0_out_granted_pll_s1",
there are 11 more instances of this message.

[NOTE :CP0309] custom_dma.v:1245 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:3872 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:7871 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:2578 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:5665 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:15676 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:15910 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:11176 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:11866 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] custom_dma.v:12556 Implicit port type (wire) for "data_out",
there are 2 more instances of this message.

[NOTE :CP0309] sysid.v:26 Implicit port type (wire) for "readdata".

[NOTE :CP0309] custom_dma.v:17444 Implicit port type (wire) for "pipeline_bridge_m1_granted_sysid_control_slave",
there are 5 more instances of this message.

[NOTE :CP0309] timestamp_timer.v:31 Implicit port type (wire) for "irq".

[NOTE :CP0309] custom_dma.v:17708 Implicit port type (wire) for "pipeline_bridge_m1_granted_timestamp_timer_s1",
there are 10 more instances of this message.

[INFO :EL0526] Design Elaboration...

[NOTE :EL0503] cpu_jtag_debug_module_wrapper.v:18 Top level module "work@cpu_jtag_debug_module_wrapper".

[NOTE :EL0503] cpu_mult_cell.v:18 Top level module "work@cpu_mult_cell".

[NOTE :EL0503] cpu_oci_test_bench.v:18 Top level module "work@cpu_oci_test_bench".

[NOTE :EL0503] cpu_test_bench.v:18 Top level module "work@cpu_test_bench".

[NOTE :EL0503] custom_dma.v:14615 Top level module "work@ext_ssram_bus_bridge_arbitrator".

[NOTE :EL0503] custom_dma.v:17137 Top level module "work@pipeline_bridge_bridge_arbitrator".

[NOTE :EL0503] custom_dma.v:20498 Top level module "work@test_bench".

[NOTE :EL0503] ddr_pll_stratixii.v:39 Top level module "work@ddr_pll_stratixii".

[NOTE :EL0503] ddr_sdram_auk_ddr_dll.v:21 Top level module "work@ddr_sdram_auk_ddr_dll".

[NOTE :EL0503] ddr_sdram_example_driver.v:21 Top level module "work@ddr_sdram_example_driver".

[WARNI:EL0505] altpllpll_bb.v:34 Multiply defined module "work@altpllpll",
               altpllpll.v:39 previous definition,
               altpllpll.v:39 previous definition.

[WARNI:EL0505] ddr_pll_stratixii_bb.v:34 Multiply defined module "work@ddr_pll_stratixii",
               ddr_pll_stratixii.v:39 previous definition.

[WARNI:EL0505] ddr_sdram_bb.v:25 Multiply defined module "work@ddr_sdram",
               ddr_sdram.v:32 previous definition.

[NOTE :EL0504] Multiple top level modules in design.

[WARNI:EL0500] cpu_jtag_debug_module_tck.v:193 Cannot find a module definition for "work@cpu_jtag_debug_module_tck::altera_std_synchronizer".

[WARNI:EL0500] cpu_jtag_debug_module_tck.v:204 Cannot find a module definition for "work@cpu_jtag_debug_module_tck::altera_std_synchronizer".

[WARNI:EL0500] cpu_jtag_debug_module_sysclk.v:89 Cannot find a module definition for "work@cpu_jtag_debug_module_sysclk::altera_std_synchronizer".

[WARNI:EL0500] cpu_jtag_debug_module_sysclk.v:100 Cannot find a module definition for "work@cpu_jtag_debug_module_sysclk::altera_std_synchronizer".

[WARNI:EL0500] cpu_mult_cell.v:47 Cannot find a module definition for "work@cpu_mult_cell::altmult_add".

[WARNI:EL0500] custom_dma.v:18717 Cannot find a module definition for "work@custom_dma::cpu".

[WARNI:EL0500] custom_dma_clock_0.v:497 Cannot find a module definition for "work@custom_dma_clock_0::altera_std_synchronizer".

[WARNI:EL0500] custom_dma_clock_0.v:507 Cannot find a module definition for "work@custom_dma_clock_0::altera_std_synchronizer".

[WARNI:EL0500] custom_dma_clock_0.v:549 Cannot find a module definition for "work@custom_dma_clock_0::altera_std_synchronizer".

[WARNI:EL0500] custom_dma_clock_0.v:559 Cannot find a module definition for "work@custom_dma_clock_0::altera_std_synchronizer".

[WARNI:EL0500] ddr_sdram_auk_ddr_sdram.v:204 Cannot find a module definition for "work@ddr_sdram_auk_ddr_sdram::auk_ddr_controller".

[WARNI:EL0500] ddr_sdram_auk_ddr_clk_gen.v:56 Cannot find a module definition for "work@ddr_sdram_auk_ddr_clk_gen::altddio_out".

[WARNI:EL0500] ddr_sdram_auk_ddr_clk_gen.v:77 Cannot find a module definition for "work@ddr_sdram_auk_ddr_clk_gen::altddio_out".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:171 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::altddio_out".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:276 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:338 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:400 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:462 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:524 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:586 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:648 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:710 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] ddr_sdram_auk_ddr_dqs_group.v:819 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dqs_group::stratixii_io".

[WARNI:EL0500] dma/latency_aware_read_master.v:211 Cannot find a module definition for "work@latency_aware_read_master::scfifo".

[WARNI:EL0500] dma/custom_FIR.v:288 Cannot find a module definition for "work@custom_FIR::scfifo".

[WARNI:EL0500] dma/burst_write_master.v:265 Cannot find a module definition for "work@burst_write_master::scfifo".

[WARNI:EL0500] altpllpll.v:61 Cannot find a module definition for "work@altpllpll::altpll".

[WARNI:EL0500] ddr_pll_stratixii.v:74 Cannot find a module definition for "work@ddr_pll_stratixii::altpll".

[WARNI:EL0500] ddr_sdram_auk_ddr_dll.v:49 Cannot find a module definition for "work@ddr_sdram_auk_ddr_dll::stratixii_dll".

[WARNI:EL0500] ddr_sdram_example_driver.v:157 Cannot find a module definition for "work@ddr_sdram_example_driver::example_lfsr8".

[WARNI:EL0500] ddr_sdram_example_driver.v:173 Cannot find a module definition for "work@ddr_sdram_example_driver::example_lfsr8".

[WARNI:EL0500] ddr_sdram_example_driver.v:189 Cannot find a module definition for "work@ddr_sdram_example_driver::example_lfsr8".

[WARNI:EL0500] ddr_sdram_example_driver.v:205 Cannot find a module definition for "work@ddr_sdram_example_driver::example_lfsr8".

[NOTE :EL0508] Nb Top level modules: 10.

[NOTE :EL0509] Max instance depth: 7.

[NOTE :EL0510] Nb instances: 151.

[NOTE :EL0511] Nb leaf instances: 47.

[WARNI:EL0512] Nb undefined modules: 16.

[WARNI:EL0513] Nb undefined instances: 43.

[  FATAL] : 0
[  ERROR] : 7
[WARNING] : 54
[   NOTE] : 102

********************************************
*   End SURELOG SVerilog Compiler/Linter   *
********************************************

8.20user 0.20system 0:08.51elapsed 98%CPU (0avgtext+0avgdata 418504maxresident)k
2936inputs+26992outputs (0major+106853minor)pagefaults 0swaps