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foss-fpga-tools
/
third_party
/
Surelog
/
3f4e38faba84ce292e5f05601b70dd598f686411
/
.
/
SVIncCompil
/
Testcases
/
Icarus
/
ivltests
/
param_vec.v
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module
test
;
parameter
[
39
:
0
]
foo
=
5
;
initial
begin
if
(
$bits
(
foo
)
!=
40
)
begin
$display
(
"FAILED -- $bits(foo) == %d"
,
$bits
(
foo
));
$finish
;
end
$display
(
"PASSED"
);
end
endmodule
// test