| ******************************************** | |
| * SURELOG System Verilog Compiler/Linter * | |
| ******************************************** | |
| [INFO :CM0023] Creating log file ./slpp_all/surelog.log. | |
| [INFO :CM0024] Executing with 4 threads. | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv". | |
| [INFO :PP0122] Preprocessing source file "top.v". | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL2.v". | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL3.v". | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL1.v". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv". | |
| [INFO :PA0201] Parsing source file "top.v". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL2.v". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL3.v". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL1.v". | |
| [WARNI:PA0205] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL3.v:1 No timescale set for "CELL3". | |
| [WARNI:PA0205] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL2.v:1 No timescale set for "CELL2". | |
| [WARNI:PA0205] top.v:1 No timescale set for "top". | |
| [WARNI:PA0205] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL1.v:1 No timescale set for "CELL1". | |
| [INFO :CP0300] Compilation... | |
| [INFO :CP0303] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL1.v:1 Compile module "work@CELL1". | |
| [INFO :CP0305] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL2.v:1 Compile udp "work@CELL2". | |
| [INFO :CP0305] /home/alain/Surelog/SVIncCompil/Testcases/OldLibrary/lib/CELL3.v:1 Compile udp "work@CELL3". | |
| [INFO :CP0303] top.v:1 Compile module "work@top". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore". | |
| [INFO :EL0526] Design Elaboration... | |
| Instance tree: | |
| [TOP] work@top work@top | |
| [MOD] work@CELL1 work@top.cell1 | |
| [UDP] work@CELL2 work@top.cell2 | |
| [NOTE :EL0503] top.v:1 Top level module "work@top". | |
| [NOTE :EL0508] Nb Top level modules: 1. | |
| [NOTE :EL0509] Max instance depth: 2. | |
| [NOTE :EL0510] Nb instances: 3. | |
| [NOTE :EL0511] Nb leaf instances: 2. | |
| [NOTE :EL0523] top.v:1 Instance "work@top". | |
| [NOTE :EL0523] top.v:3 Instance "work@top.cell1". | |
| [NOTE :EL0523] top.v:5 Instance "work@top.cell2". | |
| [ FATAL] : 0 | |
| [ ERROR] : 0 | |
| [WARNING] : 4 | |
| [ NOTE] : 8 | |
| ******************************************** | |
| * End SURELOG SVerilog Compiler/Linter * | |
| ******************************************** | |
| 0.23user 0.03system 0:00.21elapsed 127%CPU (0avgtext+0avgdata 45472maxresident)k | |
| 0inputs+144outputs (0major+11393minor)pagefaults 0swaps |