| ******************************************** | |
| * SURELOG System Verilog Compiler/Linter * | |
| ******************************************** | |
| [INFO :CM0023] Creating log file ./slpp_unit/surelog.log. | |
| [INFO :CM0024] Executing with 4 threads. | |
| [INFO :CM0020] Separate compilation-unit mode is on. | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv". | |
| [INFO :PP0122] Preprocessing source file "another_arbiter.v". | |
| [INFO :PP0122] Preprocessing source file "arbiter_tb.v". | |
| [INFO :PP0122] Preprocessing source file "dff.v". | |
| [INFO :PP0122] Preprocessing source file "encoder_case.v". | |
| [INFO :PP0122] Preprocessing source file "full_adder.v". | |
| [INFO :PP0122] Preprocessing source file "encoder.v". | |
| [INFO :PP0122] Preprocessing source file "m_input_mult.v". | |
| [INFO :PP0122] Preprocessing source file "jkff_udp.v". | |
| [INFO :PP0122] Preprocessing source file "lfsr_task.v". | |
| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv". | |
| [INFO :PP0122] Preprocessing source file "mux21.v". | |
| [INFO :PP0122] Preprocessing source file "synfifo.v". | |
| [INFO :PP0122] Preprocessing source file "top.v". | |
| [INFO :PP0122] Preprocessing source file "uart.v". | |
| [INFO :PP0123] Preprocessing include file "arbiter.inc". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv". | |
| [INFO :PA0201] Parsing source file "another_arbiter.v". | |
| [INFO :PA0201] Parsing source file "dff.v". | |
| [INFO :PA0201] Parsing source file "arbiter_tb.v". | |
| [INFO :PA0201] Parsing source file "encoder_case.v". | |
| [INFO :PA0201] Parsing source file "encoder.v". | |
| [INFO :PA0201] Parsing source file "jkff_udp.v". | |
| [INFO :PA0201] Parsing source file "full_adder.v". | |
| [INFO :PA0201] Parsing source file "m_input_mult.v". | |
| [INFO :PA0201] Parsing source file "top.v". | |
| [INFO :PA0201] Parsing source file "lfsr_task.v". | |
| [INFO :PA0201] Parsing source file "/home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv". | |
| [INFO :PA0201] Parsing source file "uart.v". | |
| [INFO :PA0201] Parsing source file "mux21.v". | |
| [INFO :PA0201] Parsing source file "synfifo.v". | |
| [INFO :CM0029] Using global timescale: "1ps/1ps". | |
| [INFO :PY0400] Processing source file "another_arbiter.v". | |
| enterTop_level_rule | |
| File: another_arbiter.v , 2 | |
| Text: module arbiter ( clo ... | |
| enterNull_rule | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterSource_text | |
| File: another_arbiter.v , 2 | |
| Text: module arbiter ( clo ... | |
| enterDescription | |
| File: another_arbiter.v , 2 | |
| Text: module arbiter ( clo ... | |
| enterModule_declaration | |
| File: another_arbiter.v , 2 | |
| Text: module arbiter ( clo ... | |
| enterModule_nonansi_header | |
| File: another_arbiter.v , 2 | |
| Text: module arbiter ( clo ... | |
| enterModule_keyword | |
| File: another_arbiter.v , 2 | |
| Text: module ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: arbiter ... | |
| enterList_of_ports | |
| File: another_arbiter.v , 2 | |
| Text: ( clock , reset , ro ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: clock ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: clock ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: clock ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: clock ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: reset ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: reset ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: reset ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: reset ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: roundORpriority ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: roundORpriority ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: roundORpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: roundORpriority ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: request ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: request ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: request ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: request ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: tpriority ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: tpriority ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: tpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: tpriority ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterPort | |
| File: another_arbiter.v , 2 | |
| Text: grant ... | |
| enterPort_expression | |
| File: another_arbiter.v , 2 | |
| Text: grant ... | |
| enterPort_reference | |
| File: another_arbiter.v , 2 | |
| Text: grant ... | |
| enterIdentifier | |
| File: another_arbiter.v , 2 | |
| Text: grant ... | |
| enterConstant_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 2 | |
| Text: ... | |
| enterModule_item | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterData_declaration | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 3 | |
| Text: integer i , j , k , ... | |
| enterData_type | |
| File: another_arbiter.v , 3 | |
| Text: integer ... | |
| enterIntegerAtomType_Int | |
| File: another_arbiter.v , 3 | |
| Text: integer ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 3 | |
| Text: i , j , k , p , q , ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: i ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: i ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: j ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: j ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: k ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: p ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: p ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: q ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: q ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: r ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: r ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: s ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: t ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: u ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 3 | |
| Text: v ... | |
| enterIdentifier | |
| File: another_arbiter.v , 3 | |
| Text: v ... | |
| enterModule_item | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterParameter_declaration | |
| File: another_arbiter.v , 7 | |
| Text: parameter NUMUNITS = ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 7 | |
| Text: ... | |
| enterList_of_param_assignments | |
| File: another_arbiter.v , 7 | |
| Text: NUMUNITS = 8 ... | |
| enterParam_assignment | |
| File: another_arbiter.v , 7 | |
| Text: NUMUNITS = 8 ... | |
| enterIdentifier | |
| File: another_arbiter.v , 7 | |
| Text: NUMUNITS ... | |
| enterConstant_param_expression | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterConstant_mintypmax_expression | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 7 | |
| Text: 8 ... | |
| enterModule_item | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterParameter_declaration | |
| File: another_arbiter.v , 8 | |
| Text: parameter ADDRESSWID ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 8 | |
| Text: ... | |
| enterList_of_param_assignments | |
| File: another_arbiter.v , 8 | |
| Text: ADDRESSWIDTH = 3 ... | |
| enterParam_assignment | |
| File: another_arbiter.v , 8 | |
| Text: ADDRESSWIDTH = 3 ... | |
| enterIdentifier | |
| File: another_arbiter.v , 8 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_param_expression | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterConstant_mintypmax_expression | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 8 | |
| Text: 3 ... | |
| enterModule_item | |
| File: another_arbiter.v , 12 | |
| Text: input clock ; ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 12 | |
| Text: input clock ... | |
| enterInput_declaration | |
| File: another_arbiter.v , 12 | |
| Text: input clock ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 12 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 12 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 12 | |
| Text: clock ... | |
| enterIdentifier | |
| File: another_arbiter.v , 12 | |
| Text: clock ... | |
| enterModule_item | |
| File: another_arbiter.v , 13 | |
| Text: input reset ; ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 13 | |
| Text: input reset ... | |
| enterInput_declaration | |
| File: another_arbiter.v , 13 | |
| Text: input reset ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 13 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 13 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 13 | |
| Text: reset ... | |
| enterIdentifier | |
| File: another_arbiter.v , 13 | |
| Text: reset ... | |
| enterModule_item | |
| File: another_arbiter.v , 14 | |
| Text: input roundORpriorit ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 14 | |
| Text: input roundORpriorit ... | |
| enterInput_declaration | |
| File: another_arbiter.v , 14 | |
| Text: input roundORpriorit ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 14 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 14 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 14 | |
| Text: roundORpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 14 | |
| Text: roundORpriority ... | |
| enterModule_item | |
| File: another_arbiter.v , 15 | |
| Text: input [ NUMUNITS - 1 ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 15 | |
| Text: input [ NUMUNITS - 1 ... | |
| enterInput_declaration | |
| File: another_arbiter.v , 15 | |
| Text: input [ NUMUNITS - 1 ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 15 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 15 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 15 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 15 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 15 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 15 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 15 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 15 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 15 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 15 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 15 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 15 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 15 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 15 | |
| Text: request ... | |
| enterIdentifier | |
| File: another_arbiter.v , 15 | |
| Text: request ... | |
| enterModule_item | |
| File: another_arbiter.v , 16 | |
| Text: input [ ADDRESSWIDTH ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 16 | |
| Text: input [ ADDRESSWIDTH ... | |
| enterInput_declaration | |
| File: another_arbiter.v , 16 | |
| Text: input [ ADDRESSWIDTH ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 16 | |
| Text: [ ADDRESSWIDTH * NUM ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 16 | |
| Text: [ ADDRESSWIDTH * NUM ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 16 | |
| Text: [ ADDRESSWIDTH * NUM ... | |
| enterConstant_range | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH * NUMUN ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH * NUMUN ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH * NUMUN ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 16 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Mult | |
| File: another_arbiter.v , 16 | |
| Text: * ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 16 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 16 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 16 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 16 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 16 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 16 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 16 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 16 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 16 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 16 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 16 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 16 | |
| Text: tpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 16 | |
| Text: tpriority ... | |
| enterModule_item | |
| File: another_arbiter.v , 17 | |
| Text: output [ NUMUNITS - ... | |
| enterPort_declaration | |
| File: another_arbiter.v , 17 | |
| Text: output [ NUMUNITS - ... | |
| enterOutput_declaration | |
| File: another_arbiter.v , 17 | |
| Text: output [ NUMUNITS - ... | |
| enterNet_port_type | |
| File: another_arbiter.v , 17 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 17 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 17 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 17 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 17 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 17 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 17 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 17 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 17 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 17 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 17 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 17 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 17 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: another_arbiter.v , 17 | |
| Text: grant ... | |
| enterIdentifier | |
| File: another_arbiter.v , 17 | |
| Text: grant ... | |
| enterModule_item | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 19 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 19 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v[INFO :PY0400] Processing source file "/home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv". | |
| [INFO :PY0400] Processing source file "arbiter_tb.v". | |
| [INFO :PY0400] Processing source file "dff.v". | |
| enterTop_level_rule | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterNull_rule | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: ... | |
| enterSource_text | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterDescription | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterPackage_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterPackage_or_generate_item_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterClass_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: class mailbox ; func ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 4 | |
| Text: mailbox ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: function new ( int b ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: function new ( int b ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: function new ( int b ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: new ( int bound = 0 ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: new ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: int bound = 0 ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: int bound = 0 ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: bound ... | |
| enterExpression | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: 0 ... | |
| enterPrimary | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 6 | |
| Text: 0 ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 7 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: function int num ( ) ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: function int num ( ) ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: function int num ( ) ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: int num ( ) ; endfun ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: int ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 9 | |
| Text: num ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 10 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: task put ( message ) ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: task put ( message ) ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: task put ( message ) ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: put ( message ) ; en ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: put ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: message ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 12 | |
| Text: message ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 13 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: function try_put ( m ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: function try_put ( m ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: function try_put ( m ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: try_put ( message ) ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: try_put ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: message ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 15 | |
| Text: message ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 16 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: task get ( ref messa ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: task get ( ref messa ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: task get ( ref messa ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: get ( ref message ) ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: get ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: ref message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: ref message ... | |
| enterTfPortDir_Ref | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: ref ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 18 | |
| Text: message ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sventerTop_level_rule | |
| File: arbiter_tb.v , 7 | |
| Text: module arbiter ( clk ... | |
| enterNull_rule | |
| File: arbiter_tb.v , 7 | |
| Text: ... | |
| enterSource_text | |
| File: arbiter_tb.v , 7 | |
| Text: module arbiter ( clk ... | |
| enterDescription | |
| File: arbiter_tb.v , 7 | |
| Text: module arbiter ( clk ... | |
| enterModule_declaration | |
| File: arbiter_tb.v , 7 | |
| Text: module arbiter ( clk ... | |
| enterModule_nonansi_header | |
| File: arbiter_tb.v , 7 | |
| Text: module arbiter ( clk ... | |
| enterModule_keyword | |
| File: arbiter_tb.v , 7 | |
| Text: module ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 7 | |
| Text: arbiter ... | |
| enterList_of_ports | |
| File: arbiter_tb.v , 7 | |
| Text: ( clk , rst , req3 , ... | |
| enterPort | |
| File: arbiter_tb.v , 8 | |
| Text: clk ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 8 | |
| Text: clk ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 8 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 8 | |
| Text: clk ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 8 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 8 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 9 | |
| Text: rst ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 9 | |
| Text: rst ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 9 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 9 | |
| Text: rst ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 9 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 10 | |
| Text: req3 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 10 | |
| Text: req3 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 10 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 10 | |
| Text: req3 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 10 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 10 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 11 | |
| Text: req2 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 11 | |
| Text: req2 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 11 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 11 | |
| Text: req2 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 11 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 11 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 12 | |
| Text: req1 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 12 | |
| Text: req1 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 12 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 12 | |
| Text: req1 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 12 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 12 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 13 | |
| Text: req0 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 13 | |
| Text: req0 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 13 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 13 | |
| Text: req0 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 13 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 13 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 14 | |
| Text: gnt3 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 14 | |
| Text: gnt3 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 14 | |
| Text: gnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 14 | |
| Text: gnt3 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 14 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 14 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 15 | |
| Text: gnt2 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 15 | |
| Text: gnt2 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 15 | |
| Text: gnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 15 | |
| Text: gnt2 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 15 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 15 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 16 | |
| Text: gnt1 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 16 | |
| Text: gnt1 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 16 | |
| Text: gnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 16 | |
| Text: gnt1 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 16 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 16 | |
| Text: ... | |
| enterPort | |
| File: arbiter_tb.v , 17 | |
| Text: gnt0 ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 17 | |
| Text: gnt0 ... | |
| enterPort_reference | |
| File: arbiter_tb.v , 17 | |
| Text: gnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 17 | |
| Text: gnt0 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 18 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 18 | |
| Text: ... | |
| enterModule_item | |
| File: arbiter_tb.v , 20 | |
| Text: input clk ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 20 | |
| Text: input clk ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 20 | |
| Text: input clk ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 20 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 20 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 20 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 20 | |
| Text: clk ... | |
| enterModule_item | |
| File: arbiter_tb.v , 21 | |
| Text: input rst ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 21 | |
| Text: input rst ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 21 | |
| Text: input rst ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 21 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 21 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 21 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 21 | |
| Text: rst ... | |
| enterModule_item | |
| File: arbiter_tb.v , 22 | |
| Text: input req3 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 22 | |
| Text: input req3 ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 22 | |
| Text: input req3 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 22 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 22 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 22 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 22 | |
| Text: req3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 23 | |
| Text: input req2 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 23 | |
| Text: input req2 ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 23 | |
| Text: input req2 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 23 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 23 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 23 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 23 | |
| Text: req2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 24 | |
| Text: input req1 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 24 | |
| Text: input req1 ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 24 | |
| Text: input req1 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 24 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 24 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 24 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 24 | |
| Text: req1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 25 | |
| Text: input req0 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 25 | |
| Text: input req0 ... | |
| enterInput_declaration | |
| File: arbiter_tb.v , 25 | |
| Text: input req0 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 25 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 25 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 25 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 25 | |
| Text: req0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 26 | |
| Text: output gnt3 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 26 | |
| Text: output gnt3 ... | |
| enterOutput_declaration | |
| File: arbiter_tb.v , 26 | |
| Text: output gnt3 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 26 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 26 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 26 | |
| Text: gnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 26 | |
| Text: gnt3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 27 | |
| Text: output gnt2 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 27 | |
| Text: output gnt2 ... | |
| enterOutput_declaration | |
| File: arbiter_tb.v , 27 | |
| Text: output gnt2 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 27 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 27 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 27 | |
| Text: gnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 27 | |
| Text: gnt2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 28 | |
| Text: output gnt1 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 28 , 19 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: function int try_get ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: function int try_get ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: function int try_get ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: int try_get ( ref me ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: int ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: try_get ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: ref message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: ref message ... | |
| enterTfPortDir_Ref | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: ref ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 21 | |
| Text: message ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 22 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: task peek ( ref mess ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: task peek ( ref mess ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: task peek ( ref mess ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: peek ( ref message ) ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: peek ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: ref message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: ref message ... | |
| enterTfPortDir_Ref | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: ref ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 24 | |
| Text: message ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 25 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: function int try_pee ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: function int try_pee ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: function int try_pee ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: int try_peek ( ref m ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: int ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: try_peek ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: ref message ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: ref message ... | |
| enterTfPortDir_Ref | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: ref ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 27 | |
| Text: message ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 28 | |
| Text: endfunction ... | |
| enterEndclass | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 30 | |
| Text: endclass ... | |
| enterDescription | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 33 | |
| Text: class process ; type ... | |
| enterPackage_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 33 | |
| Text: class process ; type ... | |
| enterPackage_or_generate_item_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 33 | |
| Text: class process ; type ... | |
| enterClass_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 33 | |
| Text: class process ; type ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 33 | |
| Text: process ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: typedef enum { FINIS ... | |
| enterClass_property | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: typedef enum { FINIS ... | |
| enterData_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: typedef enum { FINIS ... | |
| enterType_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: typedef enum { FINIS ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: enum { FINISHED , RU ... | |
| enterEnum_name_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: FINISHED ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: FINISHED ... | |
| enterEnum_name_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: RUNNING ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: RUNNING ... | |
| enterEnum_name_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: WAITING ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: WAITING ... | |
| enterEnum_name_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: SUSPENDED ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: SUSPENDED ... | |
| enterEnum_name_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: KILLED ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: KILLED ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 35 | |
| Text: state ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: static function proc ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: static function proc ... | |
| enterMethodQualifier_ClassItem | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv | |
| Text: output gnt1 ... | |
| enterOutput_declaration | |
| File: arbiter_tb.v , 28 | |
| Text: output gnt1 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 28 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 28 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 28 | |
| Text: gnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 28 | |
| Text: gnt1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 29 | |
| Text: output gnt0 ; ... | |
| enterPort_declaration | |
| File: arbiter_tb.v , 29 | |
| Text: output gnt0 ... | |
| enterOutput_declaration | |
| File: arbiter_tb.v , 29 | |
| Text: output gnt0 ... | |
| enterNet_port_type | |
| File: arbiter_tb.v , 29 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 29 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: arbiter_tb.v , 29 | |
| Text: gnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 29 | |
| Text: gnt0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 32 | |
| Text: wire [ 1 : 0 ] gnt ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 32 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 32 | |
| Text: [ 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: arbiter_tb.v , 32 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_range | |
| File: arbiter_tb.v , 32 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: arbiter_tb.v , 32 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: arbiter_tb.v , 32 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 32 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 32 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: arbiter_tb.v , 32 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: arbiter_tb.v , 32 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 32 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 32 | |
| Text: 0 ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 32 | |
| Text: gnt ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 32 | |
| Text: gnt ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 32 | |
| Text: gnt ... | |
| enterModule_item | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 33 | |
| Text: wire comreq ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 33 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 33 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 33 | |
| Text: comreq ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 33 | |
| Text: comreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 33 | |
| Text: comreq ... | |
| enterModule_item | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 34 | |
| Text: wire beg ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 34 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 34 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 34 | |
| Text: beg ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 34 | |
| Text: beg ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 34 | |
| Text: beg ... | |
| enterModule_item | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 35 | |
| Text: wire [ 1 : 0 ] lgnt ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 35 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 35 | |
| Text: [ 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: arbiter_tb.v , 35 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_range | |
| File: arbiter_tb.v , 35 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: arbiter_tb.v , 35 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: arbiter_tb.v , 35 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 35 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 35 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: arbiter_tb.v , 35 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: arbiter_tb.v , 35 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 35 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 35 | |
| Text: 0 ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 35 | |
| Text: lgnt ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 35 | |
| Text: lgnt ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 35 | |
| Text: lgnt ... | |
| enterModule_item | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 36 | |
| Text: wire lcomreq ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 36 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 36 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 36 | |
| Text: lcomreq ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 36 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 36 | |
| Text: lcomreq ... | |
| enterModule_item | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 37 | |
| Text: reg lgnt0 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 37 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 37 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 37 | |
| Text: lgnt0 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 37 | |
| Text: lgnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 37 | |
| Text: lgnt0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; enterTop_level_rule | |
| File: dff.v , 8 | |
| Text: module dff_async_res ... | |
| enterNull_rule | |
| File: dff.v , 8 | |
| Text: ... | |
| enterSource_text | |
| File: dff.v , 8 | |
| Text: module dff_async_res ... | |
| enterDescription | |
| File: dff.v , 8 | |
| Text: module dff_async_res ... | |
| enterModule_declaration | |
| File: dff.v , 8 | |
| Text: module dff_async_res ... | |
| enterModule_nonansi_header | |
| File: dff.v , 8 | |
| Text: module dff_async_res ... | |
| enterModule_keyword | |
| File: dff.v , 8 | |
| Text: module ... | |
| enterIdentifier | |
| File: dff.v , 8 | |
| Text: dff_async_reset ... | |
| enterList_of_ports | |
| File: dff.v , 8 | |
| Text: ( data , clk , reset ... | |
| enterPort | |
| File: dff.v , 9 | |
| Text: data ... | |
| enterPort_expression | |
| File: dff.v , 9 | |
| Text: data ... | |
| enterPort_reference | |
| File: dff.v , 9 | |
| Text: data ... | |
| enterIdentifier | |
| File: dff.v , 9 | |
| Text: data ... | |
| enterConstant_select | |
| File: dff.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: dff.v , 9 | |
| Text: ... | |
| enterPort | |
| File: dff.v , 10 | |
| Text: clk ... | |
| enterPort_expression | |
| File: dff.v , 10 | |
| Text: clk ... | |
| enterPort_reference | |
| File: dff.v , 10 | |
| Text: clk ... | |
| enterIdentifier | |
| File: dff.v , 10 | |
| Text: clk ... | |
| enterConstant_select | |
| File: dff.v , 10 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: dff.v , 10 | |
| Text: ... | |
| enterPort | |
| File: dff.v , 11 | |
| Text: reset ... | |
| enterPort_expression | |
| File: dff.v , 11 | |
| Text: reset ... | |
| enterPort_reference | |
| File: dff.v , 11 | |
| Text: reset ... | |
| enterIdentifier | |
| File: dff.v , 11 | |
| Text: reset ... | |
| enterConstant_select | |
| File: dff.v , 11 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: dff.v , 11 | |
| Text: ... | |
| enterPort | |
| File: dff.v , 12 | |
| Text: q ... | |
| enterPort_expression | |
| File: dff.v , 12 | |
| Text: q ... | |
| enterPort_reference | |
| File: dff.v , 12 | |
| Text: q ... | |
| enterIdentifier | |
| File: dff.v , 12 | |
| Text: q ... | |
| enterConstant_select | |
| File: dff.v , 13 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: dff.v , 13 | |
| Text: ... | |
| enterModule_item | |
| File: dff.v , 15 | |
| Text: input data , clk , r ... | |
| enterPort_declaration | |
| File: dff.v , 15 | |
| Text: input data , clk , r ... | |
| enterInput_declaration | |
| File: dff.v , 15 | |
| Text: input data , clk , r ... | |
| enterNet_port_type | |
| File: dff.v , 15 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: dff.v , 15 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: dff.v , 15 | |
| Text: data , clk , reset ... | |
| enterIdentifier | |
| File: dff.v , 15 | |
| Text: data ... | |
| enterIdentifier | |
| File: dff.v , 15 | |
| Text: clk ... | |
| enterIdentifier | |
| File: dff.v , 15 | |
| Text: reset ... | |
| enterModule_item | |
| File: dff.v , 18 | |
| Text: output q ; ... | |
| enterPort_declaration | |
| File: dff.v , 18 | |
| Text: output q ... | |
| enterOutput_declaration | |
| File: dff.v , 18 | |
| Text: output q ... | |
| enterNet_port_type | |
| File: dff.v , 18 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: dff.v , 18 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: dff.v , 18 | |
| Text: q ... | |
| enterIdentifier | |
| File: dff.v , 18 | |
| Text: q ... | |
| enterModule_item | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterNon_port_module_item | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterModule_or_generate_item | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterModule_common_item | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterModule_or_generate_item_declaration | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterData_declaration | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterVariable_declaration | |
| File: dff.v , 21 | |
| Text: reg q ; ... | |
| enterData_type | |
| File: dff.v , 21 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: dff.v , 21 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: dff.v , 21 | |
| Text: q ... | |
| enterVariable_decl_assignment | |
| File: dff.v , 21 | |
| Text: q ... | |
| enterIdentifier | |
| File: dff.v , 21 | |
| Text: q ... | |
| enterModule_item | |
| File: dff.v , 24 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: dff.v , 24 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: dff.v , 24 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: dff.v , 24 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: dff.v , 24 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: dff.v , 24 | |
| Text: always ... | |
| enterStatement | |
| File: dff.v , 24 | |
| Text: @ ( posedge clk or n ... | |
| enterStatement_item | |
| File: dff.v , 24 | |
| Text: @ ( posedge clk or n ... | |
| enterProcedural_timing_control_statement | |
| File: dff.v , 24 | |
| Text: @ ( posedge clk or n ... | |
| enterProcedural_timing_control | |
| File: dff.v , 24 | |
| Text: @ ( posedge clk or n ... | |
| enterEvent_control | |
| File: dff.v , 24 | |
| Text: @ ( posedge clk or n ... | |
| enterEvent_expression | |
| File: dff.v , 24 | |
| Text: posedge clk or neged ... | |
| enterEvent_expression | |
| File: dff.v , 24 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: dff.v , 24 | |
| Text: posedge ... | |
| enterExpression | |
| File: dff.v , 24 | |
| Text: clk ... | |
| enterPrimary | |
| File: dff.v , 24 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: dff.v , 24 | |
| Text: clk ... | |
| enterIdentifier | |
| File: dff.v , 24 | |
| Text: clk ... | |
| enterEvent_expression | |
| File: dff.v , 24 | |
| Text: negedge reset ... | |
| enterEdge_Negedge | |
| File: dff.v , 24 | |
| Text: negedge ... | |
| enterExpression | |
| File: dff.v , 24 | |
| Text: reset ... | |
| enterPrimary | |
| File: dff.v , 24 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: dff.v , 24 | |
| Text: reset ... | |
| enterIdentifier | |
| File: dff.v , 24 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: dff.v , 25 | |
| Text: if ( ~ reset ) begin ... | |
| enterStatement | |
| File: dff.v , 25 | |
| Text: if ( ~ reset ) begin ... | |
| enterStatement_item | |
| File: dff.v , 25 | |
| Text: if ( ~ reset ) begin ... | |
| enterConditional_statement | |
| File: dff.v , 25 | |
| Text: if ( ~ reset ) begin ... | |
| enterCond_predicate | |
| File: dff.v , 25 | |
| Text: ~ reset ... | |
| enterExpression_or_cond_pattern | |
| File: dff.v , 25 | |
| Text: ~ reset ... | |
| enterExpression | |
| File: dff.v , 25 | |
| Text: ~ reset ... | |
| enterUnary_Tilda | |
| File: dff.v , 25 | |
| Text: ~ ... | |
| enterPrimary | |
| File: dff.v , 25 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: dff.v , 25 | |
| Text: reset ... | |
| enterIdentifier | |
| File: dff.v , 25 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: dff.v , 25 | |
| Text: begin q <= 1'b0 ; en ... | |
| enterStatement | |
| File: dff.v , 25 | |
| Text: begin q <= 1'b0 ; en ... | |
| enterStatement_item | |
| File: dff.v , 25 | |
| Text: begin q <= 1'b0 ; en ... | |
| enterSeq_block | |
| File: dff.v , 25 | |
| Text: begin q <= 1'b0 ; en ... | |
| enterStatement_or_null | |
| File: dff.v , 26 | |
| Text: q <= 1'b0 ; ... | |
| enterStatement | |
| File: dff.v , 26 | |
| Text: q <= 1'b0 ; ... | |
| enterStatement_item | |
| File: dff.v , 26 | |
| Text: q <= 1'b0 ; ... | |
| enterNonblocking_assignment | |
| File: dff.v , 26 | |
| Text: q <= 1'b0 ... | |
| enterVariable_lvalue | |
| File: dff.v , 26 | |
| Text: q ... | |
| enterHierarchical_identifier | |
| File: dff.v , 26 | |
| Text: q ... | |
| enterSelect | |
| File: dff.v , 26 | |
| Text: ... | |
| enterBit_select | |
| File: dff.v , 26 | |
| Text: ... | |
| enterExpression | |
| File: dff.v , 26 | |
| Text: 1'b0 ... | |
| enterPrimary | |
| File: dff.v , 26 | |
| Text: 1'b0 ... | |
| enterPrimary_literal | |
| File: dff.v , 26 | |
| Text: 1'b0 ... | |
| enterNumber_1Tickb0 | |
| File: dff.v , 26 | |
| Text: 1'b0 ... | |
| enterEnd | |
| File: dff.v , 27 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: dff.v , 27 | |
| Text: begin q <= data ; en ... | |
| enterStatement | |
| File: dff.v , 27 | |
| Text: begin q <= data ; en ... | |
| enterStatement_item | |
| File: dff.v , 27 | |
| Text: begin q <= data ; en ... | |
| enterSeq_block | |
| File: dff.v , 27 | |
| Text: begin q <= data ; en ... | |
| enterStatement_or_null | |
| File: dff.v , 28 | |
| Text: q <= data ; ... | |
| enterStatement | |
| File: dff.v , 28 | |
| Text: q <= data ; ... | |
| enterStatement_item | |
| File: dff.v , 28 | |
| Text: q <= data ; ... | |
| enterNonblocking_assignment | |
| File: dff.v , 28 | |
| Text: q <= data ... | |
| enterVariable_lvalue | |
| File: dff.v , 28 | |
| Text: q ... | |
| enterHierarchical_identifier | |
| File: dff.v , 28 | |
| Text: q ... | |
| enterSelect | |
| File: dff.v , 28 | |
| Text: ... | |
| enterBit_select | |
| File: dff.v , 28 | |
| Text: ... | |
| enterExpression | |
| File: dff.v , 28 | |
| Text: data ... | |
| enterPrimary | |
| File: dff.v , 28 | |
| Text: data ... | |
| enterPrimary_literal | |
| File: dff.v , 28 | |
| Text: data ... | |
| enterIdentifier | |
| File: dff.v , 28 | |
| Text: data ... | |
| enterEnd | |
| File: dff.v , 29 | |
| Text: end ... | |
| enterEndmodule | |
| File: dff.v , 31 | |
| Text: endmodule ... | |
| , 37 | |
| Text: static ... | |
| enterClassItemQualifier_Static | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: static ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: function process sel ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: process self ( ) ; e ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: process ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: process ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: process ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: process ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 37 | |
| Text: self ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 38 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: function state statu ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: function state statu ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: function state statu ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: state status ( ) ; e ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: state ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: state ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: state ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: state ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 40 | |
| Text: status ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 41 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 43 | |
| Text: task kill ( ) ; endt ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 43 | |
| Text: task kill ( ) ; endt ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 43 | |
| Text: task kill ( ) ; endt ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 43 | |
| Text: kill ( ) ; endtask ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 43 | |
| Text: kill ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 44 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 46 | |
| Text: task await ( ) ; end ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 46 | |
| Text: task await ( ) ; end ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 46 | |
| Text: task await ( ) ; end ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 46 | |
| Text: await ( ) ; endtask ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 46 | |
| Text: await ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 47 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 49 | |
| Text: task suspend ( ) ; e ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 49 | |
| Text: task suspend ( ) ; e ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 49 | |
| Text: task suspend ( ) ; e ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 49 | |
| Text: suspend ( ) ; endtas ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 49 | |
| Text: suspend ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 50 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 52 | |
| Text: task resume ( ) ; en ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 52 | |
| Text: task resume ( ) ; en ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 52 | |
| Text: task resume ( ) ; en ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 52 | |
| Text: resume ( ) ; endtask ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 52 | |
| Text: resume ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 53 | |
| Text: endtask ... | |
| enterEndclass | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 55 | |
| Text: endclass ... | |
| enterDescription | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 58 | |
| Text: class semaphore ; fu ... | |
| enterPackage_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 58 | |
| Text: class semaphore ; fu ... | |
| enterPackage_or_generate_item_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 58 | |
| Text: class semaphore ; fu ... | |
| enterClass_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 58 | |
| Text: class semaphore ; fu ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 58 | |
| Text: semaphore ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: function new ( int k ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: function new ( int k ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: function new ( int k ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: new ( int keyCount = ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: new ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: int keyCount = 0 ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: int keyCount = 0 ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: keyCount ... | |
| enterExpression | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: 0 ... | |
| enterPrimary | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 60 | |
| Text: 0 ... | |
| enterEndfunction , 19 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 19 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 19 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 19 | |
| Text: prio [ NUMUNITS - 1 ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 19 | |
| Text: prio [ NUMUNITS - 1 ... | |
| enterIdentifier | |
| File: another_arbiter.v , 19 | |
| Text: prio ... | |
| enterVariable_dimension | |
| File: another_arbiter.v , 19 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterUnpacked_dimension | |
| File: another_arbiter.v , 19 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 19 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 19 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 19 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 19 | |
| Text: 0 ... | |
| enterModule_item | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 20 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 20 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 20 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 20 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 20 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 20 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 20 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 20 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 20 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 20 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 20 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 20 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 20 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 20 | |
| Text: tmp_prio ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 20 | |
| Text: tmp_prio ... | |
| enterIdentifier | |
| File: another_arbiter.v , 20 | |
| Text: tmp_prio ... | |
| enterModule_item | |
| File: another_arbiter.v , 21 | |
| Text: always @ ( tpriority ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 21 | |
| Text: always @ ( tpriority ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 21 | |
| Text: always @ ( tpriority ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 21 | |
| Text: always @ ( tpriority ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 21 | |
| Text: always @ ( tpriority ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 21 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 21 | |
| Text: @ ( tpriority ) begi ... | |
| enterStatement_item | |
| File: another_arbiter.v , 21 | |
| Text: @ ( tpriority ) begi ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 21 | |
| Text: @ ( tpriority ) begi ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 21 | |
| Text: @ ( tpriority ) ... | |
| enterEvent_control | |
| File: another_arbiter.v , 21 | |
| Text: @ ( tpriority ) ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 21 | |
| Text: tpriority ... | |
| enterExpression | |
| File: another_arbiter.v , 21 | |
| Text: tpriority ... | |
| enterPrimary | |
| File: another_arbiter.v , 21 | |
| Text: tpriority ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 21 | |
| Text: tpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 21 | |
| Text: tpriority ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 22 | |
| Text: begin for ( i = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 22 | |
| Text: begin for ( i = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 22 | |
| Text: begin for ( i = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 22 | |
| Text: begin for ( i = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 23 | |
| Text: for ( i = 0 ; i < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 23 | |
| Text: for ( i = 0 ; i < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 23 | |
| Text: for ( i = 0 ; i < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 23 | |
| Text: for ( i = 0 ; i < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 23 | |
| Text: i = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 23 | |
| Text: i = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 23 | |
| Text: i = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterSelect | |
| File: another_arbiter.v , 23 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 23 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 23 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 23 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 23 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: i < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterPrimary | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterIdentifier | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 23 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 23 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 38 | |
| Text: reg lgnt1 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 38 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 38 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 38 | |
| Text: lgnt1 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 38 | |
| Text: lgnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 38 | |
| Text: lgnt1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 39 | |
| Text: reg lgnt2 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 39 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 39 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 39 | |
| Text: lgnt2 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 39 | |
| Text: lgnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 39 | |
| Text: lgnt2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 40 | |
| Text: reg lgnt3 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 40 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 40 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 40 | |
| Text: lgnt3 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 40 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 40 | |
| Text: lgnt3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 41 | |
| Text: reg lasmask ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 41 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 41 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 41 | |
| Text: lasmask ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 41 | |
| Text: lasmask ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 41 | |
| Text: lasmask ... | |
| enterModule_item | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 42 | |
| Text: reg lmask0 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 42 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 42 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 42 | |
| Text: lmask0 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 42 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 42 | |
| Text: lmask0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 43 | |
| Text: reg lmask1 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 43 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 43 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 43 | |
| Text: lmask1 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 43 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 43 | |
| Text: lmask1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 44 | |
| Text: reg ledge ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 44 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 44 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 44 | |
| Text: ledge ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 44 | |
| Text: ledge ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 44 | |
| Text: ledge ... | |
| enterModule_item | |
| File: arbiter_tb.v , 47 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 47 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 47 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 47 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: arbiter_tb.v , 47 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: arbiter_tb.v , 47 | |
| Text: always ... | |
| enterStatement | |
| File: arbiter_tb.v , 47 | |
| Text: @ ( posedge clk ) if ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 47 | |
| Text: @ ( posedge clk ) if ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 47 | |
| Text: @ ( posedge clk ) if ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 47 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 47 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 47 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 47 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 47 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 47 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 47 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 47 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 48 | |
| Text: if ( rst ) begin lgn ... | |
| enterStatement | |
| File: arbiter_tb.v , 48 | |
| Text: if ( rst ) begin lgn ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 48 | |
| Text: if ( rst ) begin lgn ... | |
| enterConditional_statement | |
| File: arbiter_tb.v , 48 | |
| Text: if ( rst ) begin lgn ... | |
| enterCond_predicate | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterExpression | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterPrimary | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 48 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 48 | |
| Text: begin lgnt0 <= 0 ; l ... | |
| enterStatement | |
| File: arbiter_tb.v , 48 | |
| Text: begin lgnt0 <= 0 ; l ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 48 | |
| Text: begin lgnt0 <= 0 ; l ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 48 | |
| Text: begin lgnt0 <= 0 ; l ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 49 | |
| Text: lgnt0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 49 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 49 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 49 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 49 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 49 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 49 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 50 | |
| Text: lgnt1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 50 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 50 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 50 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 50 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 50 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 50 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 51 | |
| Text: lgnt2 ... | |
| enterSelect | |
| File: arbiter_tb.v , 51 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 51 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 51 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 51 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 51 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 51 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 52 | |
| Text: lgnt3 ... | |
| enterSelect | |
| File: arbiter_tb.v , 52 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 52 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 52 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 52 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 52 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 52 | |
| Text: 0 ... | |
| enterEnd | |
| File: arbiter_tb.v , 53 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 53 | |
| Text: begin lgnt0 <= ( ~ l ... | |
| enterStatement | |
| File: arbiter_tb.v , 53 | |
| Text: begin lgnt0 <= ( ~ l ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 53 | |
| Text: begin lgnt0 <= ( ~ l ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 53 | |
| Text: begin lgnt0 <= ( ~ l ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 <= ( ~ lcomreq ... | |
| enterStatement | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 <= ( ~ lcomreq ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 <= ( ~ lcomreq ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 <= ( ~ lcomreq ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 54 | |
| Text: lgnt0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 54 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 54 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 54 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 54 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 54 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 54 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 54 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 54 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 55 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 61 | |
| Text: endfunction ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: task put ( int keyCo ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: task put ( int keyCo ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: task put ( int keyCo ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: put ( int keyCount = ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: put ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: int keyCount = 1 ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: int keyCount = 1 ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: keyCount ... | |
| enterExpression | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: 1 ... | |
| enterPrimary | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 63 | |
| Text: 1 ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 64 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: task get ( int keyCo ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: task get ( int keyCo ... | |
| enterTask_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: task get ( int keyCo ... | |
| enterTask_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: get ( int keyCount = ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: get ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: int keyCount = 1 ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: int keyCount = 1 ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: keyCount ... | |
| enterExpression | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: 1 ... | |
| enterPrimary | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 66 | |
| Text: 1 ... | |
| enterEndtask | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 67 | |
| Text: endtask ... | |
| enterClass_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: function int try_get ... | |
| enterClass_method | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: function int try_get ... | |
| enterFunction_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: function int try_get ... | |
| enterFunction_body_declaration | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int try_get ( int ke ... | |
| enterFunction_data_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterFunction_data_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: try_get ... | |
| enterTf_port_list | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int keyCount = 1 ... | |
| enterTf_port_item | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int keyCount = 1 ... | |
| enterData_type_or_implicit | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterData_type | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterIntegerAtomType_Int | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: int ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: keyCount ... | |
| enterExpression | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: 1 ... | |
| enterPrimary | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 69 | |
| Text: 1 ... | |
| enterEndfunction | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 70 | |
| Text: endfunction ... | |
| enterEndclass | |
| File: /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv , 72 | |
| Text: endclass ... | |
| File: another_arbiter.v , 23 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 23 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 23 | |
| Text: i = i + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 23 | |
| Text: i = i + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 23 | |
| Text: i = i + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterSelect | |
| File: another_arbiter.v , 23 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 23 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 23 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: i + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterPrimary | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterIdentifier | |
| File: another_arbiter.v , 23 | |
| Text: i ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 23 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 23 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 23 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 23 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 23 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 24 | |
| Text: begin for ( j = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 24 | |
| Text: begin for ( j = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 24 | |
| Text: begin for ( j = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 24 | |
| Text: begin for ( j = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 25 | |
| Text: for ( j = 0 ; j < AD ... | |
| enterStatement | |
| File: another_arbiter.v , 25 | |
| Text: for ( j = 0 ; j < AD ... | |
| enterStatement_item | |
| File: another_arbiter.v , 25 | |
| Text: for ( j = 0 ; j < AD ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 25 | |
| Text: for ( j = 0 ; j < AD ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 25 | |
| Text: j = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 25 | |
| Text: j = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 25 | |
| Text: j = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterSelect | |
| File: another_arbiter.v , 25 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 25 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 25 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 25 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 25 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: j < ADDRESSWIDTH ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterPrimary | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterIdentifier | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 25 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary | |
| File: another_arbiter.v , 25 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 25 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 25 | |
| Text: ADDRESSWIDTH ... | |
| enterFor_step | |
| File: another_arbiter.v , 25 | |
| Text: j = j + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 25 | |
| Text: j = j + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 25 | |
| Text: j = j + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterSelect | |
| File: another_arbiter.v , 25 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 25 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 25 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: j + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterPrimary | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterIdentifier | |
| File: another_arbiter.v , 25 | |
| Text: j ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 25 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 25 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 25 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 25 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 25 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] = tpr ... | |
| enterStatement | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] = tpr ... | |
| enterStatement_item | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] = tpr ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] = tpr ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] = tpr ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio [ j ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 26 | |
| Text: tmp_prio ... | |
| enterSelect | |
| File: another_arbiter.v , 26 | |
| Text: [ j ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 26 | |
| Text: [ j ] ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterPrimary | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterIdentifier | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 26 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: tpriority [ i * ADDR ... | |
| enterPrimary | |
| File: another_arbiter.v , 26 | |
| Text: tpriority [ i * ADDR ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 26 | |
| Text: tpriority [ i * ADDR ... | |
| enterIdentifier | |
| File: another_arbiter.v , 26 | |
| Text: tpriority ... | |
| enterSelect | |
| File: another_arbiter.v , 26 | |
| Text: [ i * ADDRESSWIDTH + ... | |
| enterBit_select | |
| File: another_arbiter.v , 26 | |
| Text: [ i * ADDRESSWIDTH + ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: i * ADDRESSWIDTH + j ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: i * ADDRESSWIDTH ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: i ... | |
| enterPrimary | |
| File: another_arbiter.v , 26 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 26 | |
| Text: i ... | |
| enterIdentifier | |
| File: another_arbiter.v , 26 | |
| Text: i ... | |
| enterBinOp_Mult | |
| File: another_arbiter.v , 26 | |
| Text: * ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary | |
| File: another_arbiter.v , 26 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 26 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 26 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 26 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterPrimary | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterIdentifier | |
| File: another_arbiter.v , 26 | |
| Text: j ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] = tmp_pri ... | |
| enterStatement | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] = tmp_pri ... | |
| enterStatement_item | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] = tmp_pri ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] = tmp_pri ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] = tmp_pri ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 27 | |
| Text: prio [ i ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 27 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 27 | |
| Text: [ i ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 27 | |
| Text: [ i ] ... | |
| enterExpression | |
| File: another_arbiter.v , 27 | |
| Text: i ... | |
| enterPrimary | |
| File: another_arbiter.v , 27 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 27 | |
| Text: i ... | |
| enterIdentifier | |
| File: another_arbiter.v , 27 | |
| Text: i ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 27 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 27 | |
| Text: tmp_prio ... | |
| enterPrimary | |
| File: another_arbiter.v , 27 | |
| Text: tmp_prio ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 27 | |
| Text: tmp_prio ... | |
| enterIdentifier | |
| File: another_arbiter.v , 27 | |
| Text: tmp_prio ... | |
| enterEnd | |
| File: another_arbiter.v , 28 | |
| Text: end ... | |
| enterEnd | |
| File: another_arbiter.v , 29 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_declaration | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_type | |
| File: another_arbiter.v , 30 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 30 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 30 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 30 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 30 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 30 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 30 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 30 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 30 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 30 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 30 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 30 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 30 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 30 | |
| Text: grant ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 30 | |
| Text: grant ... | |
| enterIdentifier | |
| File: another_arbiter.v , 30 | |
| Text: grant ... | |
| enterModule_item | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_declaration | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_type | |
| File: another_arbiter.v , 31 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 31 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 31 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 31 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 31 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 31 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 31 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 31 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 31 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 31 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 31 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 31 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 31 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 31 | |
| Text: grantD ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 31 | |
| Text: grantD ... | |
| enterIdentifier | |
| File: another_arbiter.v , 31 | |
| Text: grantD ... | |
| enterModule_item | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 32 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 32 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 32 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 32 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 32 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 32 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 32 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 32 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 32 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 32 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 32 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 32 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 32 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 32 | |
| Text: next ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 32 | |
| Text: next ... | |
| enterIdentifier | |
| File: another_arbiter.v , 32 | |
| Text: next ... | |
| enterModule_item | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 33 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 33 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 33 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 55 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 55 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 55 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 55 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 55 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 55 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 55 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 55 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 55 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 55 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 55 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 55 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 55 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 56 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 56 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 56 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 56 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 56 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 56 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 56 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 56 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 56 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 56 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 56 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 56 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 56 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 56 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 56 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 56 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 56 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 56 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 56 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 56 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 57 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 57 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 57 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 57 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 57 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 57 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 57 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 57 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 57 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 57 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 57 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 57 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 57 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 57 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 57 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 57 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 57 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 57 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 57 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 57 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 58 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 58 | |
| Text: ( lcomreq & lgnt0 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 58 | |
| Text: ( lcomreq & lgnt0 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq & lgnt0 ... | |
| enterExpression | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq & lgnt0 ... | |
| enterExpression | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq ... | |
| enterPrimary | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 58 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 58 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 58 | |
| Text: lgnt0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 58 | |
| Text: lgnt0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 58 | |
| Text: lgnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 58 | |
| Text: lgnt0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 <= ( ~ lcomreq ... | |
| enterStatement | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 <= ( ~ lcomreq ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 <= ( ~ lcomreq ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 <= ( ~ lcomreq ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 59 | |
| Text: lgnt1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 59 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 59 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression... | |
| enterConstant_range | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 33 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 33 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 33 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 33 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 33 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 33 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 33 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 33 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 33 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 33 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 33 | |
| Text: nextNext ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 33 | |
| Text: nextNext ... | |
| enterIdentifier | |
| File: another_arbiter.v , 33 | |
| Text: nextNext ... | |
| enterModule_item | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 34 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 34 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 34 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 34 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 34 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 34 | |
| Text: scan [ NUMUNITS - 1 ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 34 | |
| Text: scan [ NUMUNITS - 1 ... | |
| enterIdentifier | |
| File: another_arbiter.v , 34 | |
| Text: scan ... | |
| enterVariable_dimension | |
| File: another_arbiter.v , 34 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterUnpacked_dimension | |
| File: another_arbiter.v , 34 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 34 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 34 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 34 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 34 | |
| Text: 0 ... | |
| enterModule_item | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterData_declaration | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterData_type | |
| File: another_arbiter.v , 36 | |
| Text: reg [ NUMUNITS - 2 : ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 36 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 36 | |
| Text: [ NUMUNITS - 2 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS - 2 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS - 2 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 36 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 36 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 36 | |
| Text: 2 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 36 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 36 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 36 | |
| Text: 2 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 36 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 36 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 36 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 36 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 36 | |
| Text: found ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 36 | |
| Text: found ... | |
| enterIdentifier | |
| File: another_arbiter.v , 36 | |
| Text: found ... | |
| enterModule_item | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 38 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 38 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 38 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 59 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 59 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 59 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 59 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 59 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 59 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 59 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 59 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 59 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 59 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 59 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 59 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 59 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 59 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 59 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 59 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 59 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 59 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 59 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 59 | |
| Text: req1 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 60 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 60 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 60 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 60 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 60 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 60 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 60 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 60 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 60 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 60 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 60 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 61 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 61 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 61 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 61 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 61 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 61 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 61 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 61 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 61 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 61 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 61 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 61 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 61 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 61 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 62 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq & lmask1 ... , 38 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 38 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 38 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 38 | |
| Text: selectPrio [ NUMUNIT ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 38 | |
| Text: selectPrio [ NUMUNIT ... | |
| enterIdentifier | |
| File: another_arbiter.v , 38 | |
| Text: selectPrio ... | |
| enterVariable_dimension | |
| File: another_arbiter.v , 38 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterUnpacked_dimension | |
| File: another_arbiter.v , 38 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 38 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 38 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 38 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 38 | |
| Text: 0 ... | |
| enterModule_item | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_declaration | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterData_type | |
| File: another_arbiter.v , 40 | |
| Text: reg [ ADDRESSWIDTH - ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 40 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 40 | |
| Text: [ ADDRESSWIDTH - 1 : ... | |
| enterConstant_range | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH ... | |
| enterIdentifier | |
| File: another_arbiter.v , 40 | |
| Text: ADDRESSWIDTH ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 40 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 40 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 40 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 40 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 40 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 40 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 40 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 40 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 40 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 40 | |
| Text: min ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 40 | |
| Text: min ... | |
| enterIdentifier | |
| File: another_arbiter.v , 40 | |
| Text: min ... | |
| enterModule_item | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_declaration | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_type | |
| File: another_arbiter.v , 42 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 42 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 42 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 42 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 42 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 42 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 42 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 42 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 42 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 42 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 42 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 42 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 42 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 42 | |
| Text: minPrio ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 42 | |
| Text: minPrio ... | |
| enterIdentifier | |
| File: another_arbiter.v , 42 | |
| Text: minPrio ... | |
| enterModule_item | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterNet_declaration | |
| File: another_arbiter.v , 44 | |
| Text: wire [ NUMUNITS - 1 ... | |
| enterNetType_Wire | |
| File: another_arbiter.v , 44 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: another_arbiter.v , 44 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 44 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 62 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 62 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 62 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 62 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 62 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 62 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 62 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 62 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 62 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 62 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 62 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 62 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 62 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 62 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 62 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 62 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 62 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 62 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 63 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 63 | |
| Text: ( lcomreq & lgnt1 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 63 | |
| Text: ( lcomreq & lgnt1 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq & lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq & lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq ... | |
| enterPrimary | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 63 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 63 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 63 | |
| Text: lgnt1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 63 | |
| Text: lgnt1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 63 | |
| Text: lgnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 63 | |
| Text: lgnt1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 <= ( ~ lcomreq ... | |
| enterStatement | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 <= ( ~ lcomreq ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 <= ( ~ lcomreq ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 <= ( ~ lcomreq ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 64 | |
| Text: lgnt2 ... | |
| enterSelect | |
| File: arbiter_tb.v , 64 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 64 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 64 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 64 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 64 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 64 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 64 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 64 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 64 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 64 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 64 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 64 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 64 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 64 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 64 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 64 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 64 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 64 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 64 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 64 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 64 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 64 | |
| Text: req1 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 65 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 65 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 65 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 65 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 65 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 65 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 65 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 65 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 65 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 65 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 65 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 65 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 65 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 65 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 65 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 65 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 65 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 65 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 65 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 65 | |
| Text: req2 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 66 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 44 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 44 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 44 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 44 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 44 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 44 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 44 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 44 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 44 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 44 | |
| Text: 0 ... | |
| enterList_of_net_decl_assignments | |
| File: another_arbiter.v , 44 | |
| Text: prioRequest ... | |
| enterNet_decl_assignment | |
| File: another_arbiter.v , 44 | |
| Text: prioRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 44 | |
| Text: prioRequest ... | |
| enterModule_item | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterModule_or_generate_item_declaration | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterPackage_or_generate_item_declaration | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_declaration | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterVariable_declaration | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterData_type | |
| File: another_arbiter.v , 46 | |
| Text: reg [ NUMUNITS - 1 : ... | |
| enterIntVec_TypeReg | |
| File: another_arbiter.v , 46 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: another_arbiter.v , 46 | |
| Text: [ NUMUNITS - 1 : 0 ] ... | |
| enterConstant_range | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS - 1 : 0 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS - 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 46 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 46 | |
| Text: - ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 46 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 46 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 46 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 46 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: another_arbiter.v , 46 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: another_arbiter.v , 46 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 46 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 46 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: another_arbiter.v , 46 | |
| Text: finalRequest ... | |
| enterVariable_decl_assignment | |
| File: another_arbiter.v , 46 | |
| Text: finalRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 46 | |
| Text: finalRequest ... | |
| enterModule_item | |
| File: another_arbiter.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 49 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 49 | |
| Text: @ ( posedge clock ) ... | |
| enterStatement_item | |
| File: another_arbiter.v , 49 | |
| Text: @ ( posedge clock ) ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 49 | |
| Text: @ ( posedge clock ) ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 49 | |
| Text: @ ( posedge clock ) ... | |
| enterEvent_control | |
| File: another_arbiter.v , 49 | |
| Text: @ ( posedge clock ) ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 49 | |
| Text: posedge clock ... | |
| enterEdge_Posedge | |
| File: another_arbiter.v , 49 | |
| Text: posedge ... | |
| enterExpression | |
| File: another_arbiter.v , 49 | |
| Text: clock ... | |
| enterPrimary | |
| File: another_arbiter.v , 49 | |
| Text: clock ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 49 | |
| Text: clock ... | |
| enterIdentifier | |
| File: another_arbiter.v , 49 | |
| Text: clock ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 50 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement | |
| File: another_arbiter.v , 50 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement_item | |
| File: another_arbiter.v , 50 | |
| Text: begin if ( ! reset ) ... | |
| enterSeq_block | |
| File: another_arbiter.v , 50 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 51 | |
| Text: if ( ! reset ) grant ... | |
| enterStatement | |
| File: another_arbiter.v , 51 | |
| Text: if ( ! reset ) grant ... | |
| enterStatement_item | |
| File: another_arbiter.v , 51 | |
| Text: if ( ! reset ) grant ... | |
| enterConditional_statement | |
| File: another_arbiter.v , 51 | |
| Text: if ( ! reset ) grant ... | |
| enterCond_predicate | |
| File: another_arbiter.v , 51 | |
| Text: ! reset ... | |
| enterExpression_or_cond_pattern | |
| File: another_arbiter.v , 51 | |
| Text: ! reset ... | |
| enterExpression | |
| File: another_arbiter.v , 51 | |
| Text: ! reset ... | |
| enterUnary_Not | |
| File: another_arbiter.v , 51 | |
| Text: ! ... | |
| enterPrimary | |
| File: another_arbiter.v , 51 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 51 | |
| Text: reset ... | |
| enterIdentifier | |
| File: another_arbiter.v , 51 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 51 | |
| Text: grant <= 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 51 | |
| Text: grant <= 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 51 | |
| Text: grant <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: another_arbiter.v , 51 | |
| Text: grant <= 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 51 | |
| Text: grant ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 51 | |
| Text: grant ... | |
| enterSelect | |
| File: another_arbiter.v , 51 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 51 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 51 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 51 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 51 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 51 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 52 | |
| Text: grant <= grantD ; ... | |
| enterStatement | |
| File: another_arbiter.v , 52 | |
| Text: grant <= grantD ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 52 | |
| Text: grant <= grantD ; ... | |
| enterNonblocking_assignment | |
| File: another_arbiter.v , 52 | |
| Text: grant <= grantD ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 52 | |
| Text: grant ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 52 | |
| Text: grant ... | |
| enterSelect | |
| File: another_arbiter.v , 52 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 52 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 52 | |
| Text: grantD ... | |
| enterPrimary | |
| File: another_arbiter.v , 52 | |
| Text: grantD ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 52 | |
| Text: grantD ... | |
| enterIdentifier | |
| File: another_arbiter.v , 52 | |
| Text: grantD ... | |
| enterEnd | |
| File: another_arbiter.v , 53 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 55 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 55 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 55 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 55 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 55 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 66 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 66 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ req3 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 66 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 66 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 66 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 66 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 66 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 66 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 66 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 66 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 67 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 67 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 67 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 67 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 67 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 67 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 67 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 67 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 67 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 67 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 67 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 67 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 67 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 68 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 68 | |
| Text: ( lcomreq & lgnt2 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 68 | |
| Text: ( lcomreq & lgnt2 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq & lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq & lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq ... | |
| enterPrimary | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 68 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 68 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 68 | |
| Text: lgnt2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 68 | |
| Text: lgnt2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 68 | |
| Text: lgnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 68 | |
| Text: lgnt2 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 <= ( ~ lcomreq ... | |
| enterStatement | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 <= ( ~ lcomreq ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 <= ( ~ lcomreq ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 <= ( ~ lcomreq ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 69 | |
| Text: lgnt3 ... | |
| enterSelect | |
| File: arbiter_tb.v , 69 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 69 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 69 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 69 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 69 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 69 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ lmask0 ... | |
| , 55 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 55 | |
| Text: @ ( posedge clock ) ... | |
| enterStatement_item | |
| File: another_arbiter.v , 55 | |
| Text: @ ( posedge clock ) ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 55 | |
| Text: @ ( posedge clock ) ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 55 | |
| Text: @ ( posedge clock ) ... | |
| enterEvent_control | |
| File: another_arbiter.v , 55 | |
| Text: @ ( posedge clock ) ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 55 | |
| Text: posedge clock ... | |
| enterEdge_Posedge | |
| File: another_arbiter.v , 55 | |
| Text: posedge ... | |
| enterExpression | |
| File: another_arbiter.v , 55 | |
| Text: clock ... | |
| enterPrimary | |
| File: another_arbiter.v , 55 | |
| Text: clock ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 55 | |
| Text: clock ... | |
| enterIdentifier | |
| File: another_arbiter.v , 55 | |
| Text: clock ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 56 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement | |
| File: another_arbiter.v , 56 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement_item | |
| File: another_arbiter.v , 56 | |
| Text: begin if ( ! reset ) ... | |
| enterSeq_block | |
| File: another_arbiter.v , 56 | |
| Text: begin if ( ! reset ) ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 57 | |
| Text: if ( ! reset ) next ... | |
| enterStatement | |
| File: another_arbiter.v , 57 | |
| Text: if ( ! reset ) next ... | |
| enterStatement_item | |
| File: another_arbiter.v , 57 | |
| Text: if ( ! reset ) next ... | |
| enterConditional_statement | |
| File: another_arbiter.v , 57 | |
| Text: if ( ! reset ) next ... | |
| enterCond_predicate | |
| File: another_arbiter.v , 57 | |
| Text: ! reset ... | |
| enterExpression_or_cond_pattern | |
| File: another_arbiter.v , 57 | |
| Text: ! reset ... | |
| enterExpression | |
| File: another_arbiter.v , 57 | |
| Text: ! reset ... | |
| enterUnary_Not | |
| File: another_arbiter.v , 57 | |
| Text: ! ... | |
| enterPrimary | |
| File: another_arbiter.v , 57 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 57 | |
| Text: reset ... | |
| enterIdentifier | |
| File: another_arbiter.v , 57 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 57 | |
| Text: next <= 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 57 | |
| Text: next <= 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 57 | |
| Text: next <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: another_arbiter.v , 57 | |
| Text: next <= 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 57 | |
| Text: next ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 57 | |
| Text: next ... | |
| enterSelect | |
| File: another_arbiter.v , 57 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 57 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 57 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 57 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 57 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 57 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 58 | |
| Text: next <= nextNext ; ... | |
| enterStatement | |
| File: another_arbiter.v , 58 | |
| Text: next <= nextNext ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 58 | |
| Text: next <= nextNext ; ... | |
| enterNonblocking_assignment | |
| File: another_arbiter.v , 58 | |
| Text: next <= nextNext ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 58 | |
| Text: next ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 58 | |
| Text: next ... | |
| enterSelect | |
| File: another_arbiter.v , 58 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 58 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 58 | |
| Text: nextNext ... | |
| enterPrimary | |
| File: another_arbiter.v , 58 | |
| Text: nextNext ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 58 | |
| Text: nextNext ... | |
| enterIdentifier | |
| File: another_arbiter.v , 58 | |
| Text: nextNext ... | |
| enterEnd | |
| File: another_arbiter.v , 59 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 61 | |
| Text: always @ ( request o ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 61 | |
| Text: always @ ( request o ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 61 | |
| Text: always @ ( request o ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 61 | |
| Text: always @ ( request o ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 61 | |
| Text: always @ ( request o ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 61 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 61 | |
| Text: @ ( request or prio ... | |
| enterStatement_item | |
| File: another_arbiter.v , 61 | |
| Text: @ ( request or prio ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 61 | |
| Text: @ ( request or prio ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 61 | |
| Text: @ ( request or prio ... | |
| enterEvent_control | |
| File: another_arbiter.v , 61 | |
| Text: @ ( request or prio ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request or prio [ 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: request ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: request ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: request ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 61 | |
| Text: request ... | |
| enterIdentifier | |
| File: another_arbiter.v , 61 | |
| Text: request ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 7 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 7 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 7 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 61 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 61 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 61 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: 7 ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 61 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 61 | |
| Text: 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 6 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 6 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 6 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 61 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 61 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 61 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: 6 ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 61 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 61 | |
| Text: 6 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 5 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 5 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 5 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 61 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 61 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 61 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: 5 ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 61 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 61 | |
| Text: 5 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 4 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 4 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 61 | |
| Text: prio [ 4 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 61 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 61 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 61 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 61 | |
| Text: 4 ... | |
| enterPrimary | |
| File: another_arbiter.v , 61 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 61 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 61 | |
| Text: 4 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 3 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 3 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 3 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 62 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 62 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 62 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: 3 ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 62 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 62 | |
| Text: 3 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 2 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 2 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 2 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 62 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 62 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 62 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: 2 ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 62 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 62 | |
| Text: 2 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 62 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 62 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 62 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 62 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 62 | |
| Text: 1 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 62 | |
| Text: prio [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 62 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 62 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 62 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 62 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 62 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 62 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 62 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 63 | |
| Text: begin for ( k = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 63 | |
| Text: begin for ( k = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 63 | |
| Text: begin for ( k = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 63 | |
| Text: begin for ( k = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 64 | |
| Text: for ( k = 0 ; k < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 64 | |
| Text: for ( k = 0 ; k < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 64 | |
| Text: for ( k = 0 ; k < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 64 | |
| Text: for ( k = 0 ; k < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 64 | |
| Text: k = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 64 | |
| Text: k = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 64 | |
| Text: k = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterSelect | |
| File: another_arbiter.v , 64 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 64 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 64 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 64 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 64 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: k < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterPrimary | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 64 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 64 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 64 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 64 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 64 | |
| Text: k = k + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 64 | |
| Text: k = k + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 64 | |
| Text: k = k + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterSelect | |
| File: another_arbiter.v , 64 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 64 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 64 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: k + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterPrimary | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 64 | |
| Text: k ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 64 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 64 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 64 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 64 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 64 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] = r ... | |
| enterStatement | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] = r ... | |
| enterStatement_item | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] = r ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] = r ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] = r ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio [ k ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 65 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 65 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: request [ k ] ? prio ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: request [ k ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: request [ k ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 65 | |
| Text: request [ k ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text:enterUnary_Tilda | |
| File: arbiter_tb.v , 69 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 69 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 69 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 69 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 69 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 69 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 69 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 69 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 69 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 69 | |
| Text: req1 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 70 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: ( ~ lcomreq & ~ lmas ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq & ~ lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 70 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 70 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 70 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 70 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ lmask1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 70 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 70 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 70 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 70 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 70 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 70 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 70 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 70 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 70 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 70 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 70 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 70 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 70 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 70 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 70 | |
| Text: req2 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 71 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 71 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 71 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 71 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 71 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 71 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 71 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 71 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 71 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 71 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 71 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: ~ lmask0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 71 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 71 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 71 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 71 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 71 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 71 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 71 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 71 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 71 | |
| Text: req3 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 72 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: ( ~ lcomreq & lmask1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq & lmask1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 72 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: lmask1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: lmask0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ req2 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 72 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ req1 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 72 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 72 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 72 | |
| Text: ~ req0 ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , request ... | |
| enterSelect | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: prio [ k ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: prio [ k ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 65 | |
| Text: prio [ k ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 65 | |
| Text: [ k ] ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text: k ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: NUMUNITS - 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 65 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 65 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 65 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 65 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 65 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 65 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 65 | |
| Text: 1 ... | |
| enterEnd | |
| File: another_arbiter.v , 66 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 68 | |
| Text: always @ ( prioReque ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 68 | |
| Text: always @ ( prioReque ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 68 | |
| Text: always @ ( prioReque ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 68 | |
| Text: always @ ( prioReque ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 68 | |
| Text: always @ ( prioReque ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 68 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 68 | |
| Text: @ ( prioRequest or r ... | |
| enterStatement_item | |
| File: another_arbiter.v , 68 | |
| Text: @ ( prioRequest or r ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 68 | |
| Text: @ ( prioRequest or r ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 68 | |
| Text: @ ( prioRequest or r ... | |
| enterEvent_control | |
| File: another_arbiter.v , 68 | |
| Text: @ ( prioRequest or r ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest or reque ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest or reque ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest ... | |
| enterExpression | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest ... | |
| enterPrimary | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 68 | |
| Text: prioRequest ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 68 | |
| Text: request ... | |
| enterExpression | |
| File: another_arbiter.v , 68 | |
| Text: request ... | |
| enterPrimary | |
| File: another_arbiter.v , 68 | |
| Text: request ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 68 | |
| Text: request ... | |
| enterIdentifier | |
| File: another_arbiter.v , 68 | |
| Text: request ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 68 | |
| Text: roundORpriority ... | |
| enterExpression | |
| File: another_arbiter.v , 68 | |
| Text: roundORpriority ... | |
| enterPrimary | |
| File: another_arbiter.v , 68 | |
| Text: roundORpriority ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 68 | |
| Text: roundORpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 68 | |
| Text: roundORpriority ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 69 | |
| Text: begin for ( r = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 69 | |
| Text: begin for ( r = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 69 | |
| Text: begin for ( r = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 69 | |
| Text: begin for ( r = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 70 | |
| Text: for ( r = 0 ; r < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 70 | |
| Text: for ( r = 0 ; r < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 70 | |
| Text: for ( r = 0 ; r < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 70 | |
| Text: for ( r = 0 ; r < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 70 | |
| Text: r = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 70 | |
| Text: r = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 70 | |
| Text: r = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterSelect | |
| File: another_arbiter.v , 70 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 70 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 70 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 70 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 70 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: r < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterPrimary | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterIdentifier | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 70 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 70 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 70 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 70 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 70 | |
| Text: r = r + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 70 | |
| Text: r = r + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 70 | |
| Text: r = r + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterSelect | |
| File: another_arbiter.v , 70 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 70 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 70 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: r + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterPrimary | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterIdentifier | |
| File: another_arbiter.v , 70 | |
| Text: r ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 70 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 70 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 70 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 70 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 70 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] = ... | |
| enterStatement | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] = ... | |
| enterStatement_item | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] = ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] = ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] = ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest [ r ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 71 | |
| Text: finalRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 71 | |
| Text: [ r ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 71 | |
| Text: [ r ] ... | |
| enterExpression | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterPrimary | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterIdentifier 72 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 72 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 72 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 72 | |
| Text: req0 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 73 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 73 | |
| Text: ( lcomreq & lgnt3 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 73 | |
| Text: ( lcomreq & lgnt3 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq & lgnt3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq & lgnt3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq ... | |
| enterPrimary | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 73 | |
| Text: lcomreq ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 73 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 73 | |
| Text: lgnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 73 | |
| Text: lgnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 73 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 73 | |
| Text: lgnt3 ... | |
| enterEnd | |
| File: arbiter_tb.v , 74 | |
| Text: end ... | |
| enterModule_item | |
| File: arbiter_tb.v , 79 | |
| Text: assign beg = ( req3 ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 79 | |
| Text: assign beg = ( req3 ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 79 | |
| Text: assign beg = ( req3 ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 79 | |
| Text: assign beg = ( req3 ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 79 | |
| Text: assign beg = ( req3 ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 79 | |
| Text: beg = ( req3 | req2 ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 79 | |
| Text: beg = ( req3 | req2 ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 79 | |
| Text: beg ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 79 | |
| Text: beg ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: beg ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 79 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 79 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: ( req3 | req2 | req1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: ( req3 | req2 | req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: ( req3 | req2 | req1 ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 79 | |
| Text: req3 | req2 | req1 | ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req3 | req2 | req1 | ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req3 | req2 | req1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req3 | req2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 79 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: req3 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 79 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 79 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: req2 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 79 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 79 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: req1 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 79 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 79 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: req0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 79 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 79 | |
| Text: ~ lcomreq ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 79 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 79 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 79 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 79 | |
| Text: lcomreq ... | |
| enterModule_item | |
| File: arbiter_tb.v , 80 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 80 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 80 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 80 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: arbiter_tb.v , 80 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: arbiter_tb.v , 80 | |
| Text: always ... | |
| enterStatement | |
| File: arbiter_tb.v , 80 | |
| Text: @ ( posedge clk ) be ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 80 | |
| Text: @ ( posedge clk ) be ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 80 | |
| Text: @ ( posedge clk ) be ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 80 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 80 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 80 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 80 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 80 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 80 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 80 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 80 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 81 | |
| Text: begin lasmask <= ( b ... | |
| enterStatement | |
| File: arbiter_tb.v , 81 | |
| Text: begin lasmask <= ( b ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 81 | |
| Text: begin lasmask <= ( b ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 81 | |
| Text: begin lasmask <= ( b ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask <= ( beg & ~ ... | |
| enterStatement | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask <= ( beg & ~ ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask <= ( beg & ~ ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask <= ( beg & ~ ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask ... | |
| enterSelect | |
| File: arbiter_tb.v , 82 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 82 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: ( beg & ~ ledge & ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 82 | |
| Text: ( beg & ~ ledge & ~ ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 82 | |
| Text: beg & ~ ledge & ~ la ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: beg & ~ ledge & ~ la ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: beg & ~ ledge ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: beg ... | |
| enterPrimary | |
| File: arbiter_tb.v , 82 | |
| Text: beg ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 82 | |
| Text: beg ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 82 | |
| Text: beg ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 82 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: ~ ledge ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 82 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 82 | |
| Text: ledge ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 82 | |
| Text: ledge ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 82 | |
| Text: ledge ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 82 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 82 | |
| Text: ~ lasmask ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 82 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 82 | |
| Text: lasmask ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 83 | |
| Text: ledge <= ( beg & ~ l ... | |
| enterStatement | |
| File: arbiter_tb.v , 83 | |
| Text: ledge <= ( beg & ~ l ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 83 | |
| Text: ledge <= ( beg & ~ l ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 83 | |
| Text: ledge <= ( beg & ~ l ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 83 | |
| Text: ledge ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 83 | |
| Text: ledge ... | |
| enterSelect | |
| File: arbiter_tb.v , 83 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 83 | |
| Text: ... | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 71 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 71 | |
| Text: roundORpriority ? pr ... | |
| enterExpression | |
| File: another_arbiter.v , 71 | |
| Text: roundORpriority ... | |
| enterPrimary | |
| File: another_arbiter.v , 71 | |
| Text: roundORpriority ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 71 | |
| Text: roundORpriority ... | |
| enterIdentifier | |
| File: another_arbiter.v , 71 | |
| Text: roundORpriority ... | |
| enterExpression | |
| File: another_arbiter.v , 71 | |
| Text: prioRequest [ r ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 71 | |
| Text: prioRequest [ r ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 71 | |
| Text: prioRequest [ r ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 71 | |
| Text: prioRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 71 | |
| Text: [ r ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 71 | |
| Text: [ r ] ... | |
| enterExpression | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterPrimary | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterIdentifier | |
| File: another_arbiter.v , 71 | |
| Text: r ... | |
| enterExpression | |
| File: another_arbiter.v , 72 | |
| Text: request [ r ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 72 | |
| Text: request [ r ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 72 | |
| Text: request [ r ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 72 | |
| Text: request ... | |
| enterSelect | |
| File: another_arbiter.v , 72 | |
| Text: [ r ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 72 | |
| Text: [ r ] ... | |
| enterExpression | |
| File: another_arbiter.v , 72 | |
| Text: r ... | |
| enterPrimary | |
| File: another_arbiter.v , 72 | |
| Text: r ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 72 | |
| Text: r ... | |
| enterIdentifier | |
| File: another_arbiter.v , 72 | |
| Text: r ... | |
| enterEnd | |
| File: another_arbiter.v , 73 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 76 | |
| Text: always @ ( selectPri ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 76 | |
| Text: always @ ( selectPri ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 76 | |
| Text: always @ ( selectPri ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 76 | |
| Text: always @ ( selectPri ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 76 | |
| Text: always @ ( selectPri ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 76 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 76 | |
| Text: @ ( selectPrio [ 7 ] ... | |
| enterStatement_item | |
| File: another_arbiter.v , 76 | |
| Text: @ ( selectPrio [ 7 ] ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 76 | |
| Text: @ ( selectPrio [ 7 ] ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 76 | |
| Text: @ ( selectPrio [ 7 ] ... | |
| enterEvent_control | |
| File: another_arbiter.v , 76 | |
| Text: @ ( selectPrio [ 7 ] ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 7 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 76 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 76 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: 7 ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 76 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 76 | |
| Text: 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 6 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 6 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 6 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 76 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 76 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: 6 ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 76 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 76 | |
| Text: 6 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 5 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 5 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio [ 5 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 76 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 76 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 76 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 76 | |
| Text: 5 ... | |
| enterPrimary | |
| File: another_arbiter.v , 76 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 76 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 76 | |
| Text: 5 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 4 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 4 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 4 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 77 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 77 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: 4 ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 77 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 77 | |
| Text: 4 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 3 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 3 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 3 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 77 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 77 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: 3 ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 77 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 77 | |
| Text: 3 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 2 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 2 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio [ 2 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 77 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 77 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 77 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 77 | |
| Text: 2 ... | |
| enterPrimary | |
| File: another_arbiter.v , 77 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 77 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 77 | |
| Text: 2 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 1 ] ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: ( beg & ~ ledge & la ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: ( beg & ~ ledge & la ... | |
| enterPrimary | |
| File: arbiter_tb.v , 83 | |
| Text: ( beg & ~ ledge & la ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 83 | |
| Text: beg & ~ ledge & lasm ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: beg & ~ ledge & lasm ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: beg & ~ ledge ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: beg ... | |
| enterPrimary | |
| File: arbiter_tb.v , 83 | |
| Text: beg ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 83 | |
| Text: beg ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 83 | |
| Text: beg ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 83 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: ~ ledge ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 83 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 83 | |
| Text: ledge ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 83 | |
| Text: ledge ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 83 | |
| Text: ledge ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 83 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 83 | |
| Text: lasmask ... | |
| enterPrimary | |
| File: arbiter_tb.v , 83 | |
| Text: lasmask ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 83 | |
| Text: lasmask ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 83 | |
| Text: lasmask ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 84 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: ( beg & ledge & ~ la ... | |
| enterPrimary | |
| File: arbiter_tb.v , 84 | |
| Text: ( beg & ledge & ~ la ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 84 | |
| Text: beg & ledge & ~ lasm ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: beg & ledge & ~ lasm ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: beg & ledge ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: beg ... | |
| enterPrimary | |
| File: arbiter_tb.v , 84 | |
| Text: beg ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 84 | |
| Text: beg ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 84 | |
| Text: beg ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 84 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: ledge ... | |
| enterPrimary | |
| File: arbiter_tb.v , 84 | |
| Text: ledge ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 84 | |
| Text: ledge ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 84 | |
| Text: ledge ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 84 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 84 | |
| Text: ~ lasmask ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 84 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 84 | |
| Text: lasmask ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 84 | |
| Text: lasmask ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 84 | |
| Text: lasmask ... | |
| enterEnd | |
| File: arbiter_tb.v , 85 | |
| Text: end ... | |
| enterModule_item | |
| File: arbiter_tb.v , 90 | |
| Text: assign lcomreq = ( r ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 90 | |
| Text: assign lcomreq = ( r ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 90 | |
| Text: assign lcomreq = ( r ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 90 | |
| Text: assign lcomreq = ( r ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 90 | |
| Text: assign lcomreq = ( r ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 90 | |
| Text: lcomreq = ( req3 & l ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 90 | |
| Text: lcomreq = ( req3 & l ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 90 | |
| Text: lcomreq ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 90 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 90 | |
| Text: lcomreq ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 90 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 90 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: ( req3 & lgnt3 ) | ( ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: ( req3 & lgnt3 ) | ( ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: ( req3 & lgnt3 ) | ( ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: ( req3 & lgnt3 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 90 | |
| Text: ( req3 & lgnt3 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 90 | |
| Text: req3 & lgnt3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: req3 & lgnt3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 90 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 90 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 90 | |
| Text: req3 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 90 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 90 | |
| Text: lgnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 90 | |
| Text: lgnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 90 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 90 | |
| Text: lgnt3 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 91 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 91 | |
| Text: ( req2 & lgnt2 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 91 | |
| Text: ( req2 & lgnt2 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 91 | |
| Text: req2 & lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 91 | |
| Text: req2 & lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 91 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 91 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 91 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 91 | |
| Text: req2 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 91 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 91 | |
| Text: lgnt2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 91 | |
| Text: lgnt2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 91 | |
| Text: lgnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 91 | |
| Text: lgnt2 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 92 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 92 | |
| Text: ( req1 & lgnt1 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 92 | |
| Text: ( req1 & lgnt1 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 92 | |
| Text: req1 & lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 92 | |
| Text: req1 & lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 92 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 92 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 92 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 92 | |
| Text: req1 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 92 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 92 | |
| Text: lgnt1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 92 | |
| Text: lgnt1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 92 | |
| Text: lgnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 92 | |
| Text: lgnt1 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 93 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 93 | |
| Text: ( req0 & lgnt0 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 93 | |
| Text: ( req0 & lgnt0 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 93 | |
| Text: req0 & lgnt0 ... | |
| enterExpression | |
| File: arbiter_tb.v , 93 | |
| Text: req0 & lgnt0 ... | |
| enterExpression | |
| File: arbiter_tb.v , 93 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 93 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 93 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 93 | |
| Text: req0 ... | |
| enterBinOp_BitwAnd | |
| File: arbiter_tb.v , 93 | |
| Text: & ... | |
| enterExpression | |
| File: arbiter_tb.v , 93 | |
| Text: lgnt0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 93 | |
| Text: lgnt0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 93 | |
| Text: lgnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 93 | |
| Text: lgnt0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 98 | |
| Text: assign lgnt = { ( lg ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 98 | |
| Text: assign lgnt = { ( lg ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 98 | |
| Text: assign lgnt = { ( lg ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 98 | |
| Text: assign lgnt = { ( lg ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 98 | |
| Text: assign lgnt = { ( lg ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt = { ( lgnt3 | l ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt = { ( lgnt3 | l ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 98 | |
| Text:enterExpression | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 78 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 78 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 78 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 78 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 78 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 78 | |
| Text: 1 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 78 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 78 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 78 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 78 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 78 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 78 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 78 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 79 | |
| Text: begin min = selectPr ... | |
| enterStatement | |
| File: another_arbiter.v , 79 | |
| Text: begin min = selectPr ... | |
| enterStatement_item | |
| File: another_arbiter.v , 79 | |
| Text: begin min = selectPr ... | |
| enterSeq_block | |
| File: another_arbiter.v , 79 | |
| Text: begin min = selectPr ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 80 | |
| Text: min = selectPrio [ 0 ... | |
| enterStatement | |
| File: another_arbiter.v , 80 | |
| Text: min = selectPrio [ 0 ... | |
| enterStatement_item | |
| File: another_arbiter.v , 80 | |
| Text: min = selectPrio [ 0 ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 80 | |
| Text: min = selectPrio [ 0 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 80 | |
| Text: min = selectPrio [ 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 80 | |
| Text: min ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 80 | |
| Text: min ... | |
| enterSelect | |
| File: another_arbiter.v , 80 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 80 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 80 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 80 | |
| Text: selectPrio [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 80 | |
| Text: selectPrio [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 80 | |
| Text: selectPrio [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 80 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 80 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 80 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 80 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 80 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 80 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 80 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 81 | |
| Text: for ( p = 1 ; p < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 81 | |
| Text: for ( p = 1 ; p < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 81 | |
| Text: for ( p = 1 ; p < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 81 | |
| Text: for ( p = 1 ; p < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 81 | |
| Text: p = 1 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 81 | |
| Text: p = 1 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 81 | |
| Text: p = 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterSelect | |
| File: another_arbiter.v , 81 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 81 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: p < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterPrimary | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterIdentifier | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 81 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 81 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 81 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 81 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 81 | |
| Text: p = p + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 81 | |
| Text: p = p + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 81 | |
| Text: p = p + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterSelect | |
| File: another_arbiter.v , 81 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 81 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 81 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: p + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterPrimary | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterIdentifier | |
| File: another_arbiter.v , 81 | |
| Text: p ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 81 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 81 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 82 | |
| Text: if ( selectPrio [ p ... | |
| enterStatement | |
| File: another_arbiter.v , 82 | |
| Text: if ( selectPrio [ p ... | |
| enterStatement_item | |
| File: another_arbiter.v , 82 | |
| Text: if ( selectPrio [ p ... | |
| enterConditional_statement | |
| File: another_arbiter.v , 82 | |
| Text: if ( selectPrio [ p ... | |
| enterCond_predicate | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] < m ... | |
| enterExpression_or_cond_pattern | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] < m ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] < m ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 82 | |
| Text: [ p ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 82 | |
| Text: [ p ] ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterPrimary | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterIdentifier | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 82 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterPrimary | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterIdentifier | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 82 | |
| Text: min = selectPrio [ p ... | |
| enterStatement | |
| File: another_arbiter.v , 82 | |
| Text: min = selectPrio [ p ... | |
| enterStatement_item | |
| File: another_arbiter.v , 82 | |
| Text: min = selectPrio [ p ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 82 | |
| Text: min = selectPrio [ p ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 82 | |
| Text: min = selectPrio [ p ... lgnt ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 98 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 98 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: { ( lgnt3 | lgnt2 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: { ( lgnt3 | lgnt2 ) ... | |
| enterConcatenation | |
| File: arbiter_tb.v , 98 | |
| Text: { ( lgnt3 | lgnt2 ) ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: ( lgnt3 | lgnt2 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: ( lgnt3 | lgnt2 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 | lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 | lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 98 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: ( lgnt3 | lgnt1 ) ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: ( lgnt3 | lgnt1 ) ... | |
| enterMintypmax_expression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 | lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 | lgnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt3 ... | |
| enterBinOp_BitwOr | |
| File: arbiter_tb.v , 98 | |
| Text: | ... | |
| enterExpression | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 98 | |
| Text: lgnt1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 103 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 103 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 103 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 103 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: arbiter_tb.v , 103 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: arbiter_tb.v , 103 | |
| Text: always ... | |
| enterStatement | |
| File: arbiter_tb.v , 103 | |
| Text: @ ( posedge clk ) if ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 103 | |
| Text: @ ( posedge clk ) if ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 103 | |
| Text: @ ( posedge clk ) if ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 103 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 103 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 103 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 103 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 103 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 103 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 103 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 103 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 104 | |
| Text: if ( rst ) begin lma ... | |
| enterStatement | |
| File: arbiter_tb.v , 104 | |
| Text: if ( rst ) begin lma ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 104 | |
| Text: if ( rst ) begin lma ... | |
| enterConditional_statement | |
| File: arbiter_tb.v , 104 | |
| Text: if ( rst ) begin lma ... | |
| enterCond_predicate | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterExpression | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterPrimary | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 104 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 104 | |
| Text: begin lmask1 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 104 | |
| Text: begin lmask1 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 104 | |
| Text: begin lmask1 <= 0 ; ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 104 | |
| Text: begin lmask1 <= 0 ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 105 | |
| Text: lmask1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 105 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 105 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 105 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 105 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 105 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 105 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 106 | |
| Text: lmask0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 106 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 106 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 106 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 106 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 106 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 106 | |
| Text: 0 ... | |
| enterEnd | |
| File: arbiter_tb.v , 107 | |
| Text: end ... | |
| enterCond_predicate | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterExpression_or_cond_pattern | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterExpression | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterPrimary | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 107 | |
| Text: lasmask ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 107 | |
| Text: begin lmask1 <= lgnt ... | |
| enterStatement | |
| File: arbiter_tb.v , 107 | |
| Text: begin lmask1 <= lgnt ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 107 | |
| Text: begin lmask1 <= lgnt ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 107 | |
| Text: begin lmask1 <= lgnt ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 <= lgnt [ 1 ] ... | |
| enterStatement | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 <= lgnt [ 1 ] ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 <= lgnt [ 1 ] ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 <= lgnt [ 1 ] ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 108 | |
| Text: lmask1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 108 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 108 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 108 | |
| Text: lgnt [ 1 ] ... | |
| enterPrimary | |
| File: arbiter_tb.v , 108 | |
| Text: lgnt [ 1 ] ... | |
| enterComplex_func_call | |
| File: arbiter_tb.v , 108 | |
| Text: lgnt [ 1 ] ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 108 | |
| Text: lgnt ... | |
| enterSelect | |
| File: arbiter_tb.v , 108 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: arbiter_tb.v , 108 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: arbiter_tb.v , 108 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 108 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 108 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 108 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 <= lgnt [ 0 ] ... | |
| enterStatement | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 <= lgnt [ 0 ] ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 <= lgnt [ 0 ] ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 <= lgnt [ 0 ] ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 109 | |
| Text: lmask0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 109 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 109 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 109 | |
| Text: lgnt [ 0 ] ... | |
| enterPrimary | |
| File: arbiter_tb.v , 109 | |
| Text: lgnt [ 0 ] ... | |
| enterComplex_func_call | |
| File: arbiter_tb.v , 109 | |
| Text: lgnt [ 0 ] ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 109 | |
| Text: lgnt ... | |
| enterSelect | |
| File: arbiter_tb.v , 109 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: arbiter_tb.v , 109 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: arbiter_tb.v , 109 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 109 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 109 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 109 | |
| Text: 0 ... | |
| enterEnd | |
| File: arbiter_tb.v , 110 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 110 | |
| Text: begin lmask1 <= lmas ... | |
| enterStatement | |
| File: arbiter_tb.v , 110 | |
| Text: begin lmask1 <= lmas ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 110 | |
| Text: begin lmask1 <= lmas ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 110 | |
| Text: begin lmask1 <= lmas ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 <= lmask1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 <= lmask1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 <= lmask1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 <= lmask1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 111 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 111 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 111 | |
| Text: lmask1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 <= lmask0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 <= lmask0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 <= lmask0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 <= lmask0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 112 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 112 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 112 | |
| Text: lmask0 ... | |
| enterEnd | |
| File: arbiter_tb.v , 113 | |
| Text: end ... | |
| enterModule_item | |
| File: arbiter_tb.v , 115 | |
| Text: assign comreq = lcom ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 115 | |
| Text: assign comreq = lcom ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 115 | |
| Text: assign comreq = lcom ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 115 | |
| Text: assign comreq = lcom ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 115 | |
| Text: assign comreq = lcom ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 115 | |
| Text: comreq = lcomreq ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 115 | |
| Text: comreq = lcomreq ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 115 | |
| Text: comreq ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 115 | |
| Text: comreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 115 | |
| Text: comreq ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 115 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 115 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 115 | |
| Text: lcomreq ... | |
| enterPrimary | |
| File: arbiter_tb.v , 115 | |
| Text: lcomreq ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 115 | |
| Text: lcomreq ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 115 | |
| Text: lcomreq ... | |
| enterModule_item | |
| File: arbiter_tb.v , 116 | |
| Text: assign gnt = lgnt ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 116 | |
| Text: assign gnt = lgnt ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 116 | |
| Text: assign gnt = lgnt ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 116 | |
| Text: assign gnt = lgnt ; ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 116 | |
| Text: assign gnt = lgnt ; ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 116 | |
| Text: gnt = lgnt ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 116 | |
| Text: gnt = lgnt ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 116 | |
| Text: gnt ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 116 | |
| Text: gnt ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 116 | |
| Text: gnt ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 116 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 116 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 116 | |
| Text: lgnt ... | |
| enterPrimary | |
| File: arbiter_tb.v , 116 | |
| Text: lgnt ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 116 | |
| Text: lgnt ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 116 | |
| Text: lgnt ... | |
| enterModule_item | |
| File: arbiter_tb.v , 120 | |
| Text: assign gnt3 = lgnt3 ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 120 | |
| Text: assign gnt3 = lgnt3 ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 120 | |
| Text: assign gnt3 = lgnt3 ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 120 | |
| Text: assign gnt3 = lgnt3 ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 120 | |
| Text: assign gnt3 = lgnt3 ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 120 | |
| Text: gnt3 = lgnt3 ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 120 | |
| Text: gnt3 = lgnt3 ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 120 | |
| Text: gnt3 ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 120 | |
| Text: gnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 120 | |
| Text: gnt3 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 120 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 120 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 120 | |
| Text: lgnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 120 | |
| Text: lgnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 120 | |
| Text: lgnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 120 | |
| Text: lgnt3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 121 | |
| Text: assign gnt2 = lgnt2 ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 121 | |
| Text: assign gnt2 = lgnt2 ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 121 | |
| Text: assign gnt2 = lgnt2 ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 121 | |
| Text: assign gnt2 = lgnt2 ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 121 | |
| Text: assign gnt2 = lgnt2 ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 121 | |
| Text: gnt2 = lgnt2 ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 121 | |
| Text: gnt2 = lgnt2 ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 121 | |
| Text: gnt2 ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 121 | |
| Text: gnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 121 | |
| Text: gnt2 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 121 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 121 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 121 | |
| Text: lgnt2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 121 | |
| Text: lgnt2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 121 | |
| Text: lgnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 121 | |
| Text: lgnt2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 122 | |
| Text: assign gnt1 = lgnt1 ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 122 | |
| Text: assign gnt1 = lgnt1 ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 122 | |
| Text: assign gnt1 = lgnt1 ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 122 | |
| Text: assign gnt1 = lgnt1 ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 122 | |
| Text: assign gnt1 = lgnt1 ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 122 | |
| Text: gnt1 = lgnt1 ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 122 | |
| Text: gnt1 = lgnt1 ... | |
| enterNet_lvalue | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 82 | |
| Text: min ... | |
| enterSelect | |
| File: another_arbiter.v , 82 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 82 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 82 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio [ p ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 82 | |
| Text: selectPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 82 | |
| Text: [ p ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 82 | |
| Text: [ p ] ... | |
| enterExpression | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterPrimary | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterIdentifier | |
| File: another_arbiter.v , 82 | |
| Text: p ... | |
| enterEnd | |
| File: another_arbiter.v , 83 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 85 | |
| Text: always @ ( min or mi ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 85 | |
| Text: always @ ( min or mi ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 85 | |
| Text: always @ ( min or mi ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 85 | |
| Text: always @ ( min or mi ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 85 | |
| Text: always @ ( min or mi ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 85 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 85 | |
| Text: @ ( min or minPrio o ... | |
| enterStatement_item | |
| File: another_arbiter.v , 85 | |
| Text: @ ( min or minPrio o ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 85 | |
| Text: @ ( min or minPrio o ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 85 | |
| Text: @ ( min or minPrio o ... | |
| enterEvent_control | |
| File: another_arbiter.v , 85 | |
| Text: @ ( min or minPrio o ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio or pr ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min or minPrio ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: min ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: min ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: min ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: min ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: min ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: minPrio ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: minPrio ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: minPrio ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: minPrio ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: minPrio ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 7 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 7 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 7 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 85 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 85 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: 7 ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 85 | |
| Text: 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 6 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 6 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 6 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 85 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 85 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: 6 ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 85 | |
| Text: 6 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 5 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 5 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 5 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 85 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 85 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: 5 ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 85 | |
| Text: 5 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 4 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 4 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 85 | |
| Text: prio [ 4 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 85 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 85 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 85 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 85 | |
| Text: 4 ... | |
| enterPrimary | |
| File: another_arbiter.v , 85 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 85 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 85 | |
| Text: 4 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 3 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 3 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 3 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 86 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 86 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 86 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: 3 ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 86 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 86 | |
| Text: 3 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 2 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 2 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 2 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 86 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 86 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 86 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: 2 ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 86 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 86 | |
| Text: 2 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , | |
| File: arbiter_tb.v , 122 | |
| Text: gnt1 ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 122 | |
| Text: gnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 122 | |
| Text: gnt1 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 122 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 122 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 122 | |
| Text: lgnt1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 122 | |
| Text: lgnt1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 122 | |
| Text: lgnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 122 | |
| Text: lgnt1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 123 | |
| Text: assign gnt0 = lgnt0 ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 123 | |
| Text: assign gnt0 = lgnt0 ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 123 | |
| Text: assign gnt0 = lgnt0 ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 123 | |
| Text: assign gnt0 = lgnt0 ... | |
| enterContinuous_assign | |
| File: arbiter_tb.v , 123 | |
| Text: assign gnt0 = lgnt0 ... | |
| enterList_of_net_assignments | |
| File: arbiter_tb.v , 123 | |
| Text: gnt0 = lgnt0 ... | |
| enterNet_assignment | |
| File: arbiter_tb.v , 123 | |
| Text: gnt0 = lgnt0 ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 123 | |
| Text: gnt0 ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 123 | |
| Text: gnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 123 | |
| Text: gnt0 ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 123 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 123 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 123 | |
| Text: lgnt0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 123 | |
| Text: lgnt0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 123 | |
| Text: lgnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 123 | |
| Text: lgnt0 ... | |
| enterEndmodule | |
| File: arbiter_tb.v , 125 | |
| Text: endmodule ... | |
| enterDescription | |
| File: arbiter_tb.v , 126 | |
| Text: module top ( ) ; reg ... | |
| enterModule_declaration | |
| File: arbiter_tb.v , 126 | |
| Text: module top ( ) ; reg ... | |
| enterModule_nonansi_header | |
| File: arbiter_tb.v , 126 | |
| Text: module top ( ) ; ... | |
| enterModule_keyword | |
| File: arbiter_tb.v , 126 | |
| Text: module ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 126 | |
| Text: top ... | |
| enterList_of_ports | |
| File: arbiter_tb.v , 126 | |
| Text: ( ) ... | |
| enterPort | |
| File: arbiter_tb.v , 126 | |
| Text: ... | |
| enterPort_expression | |
| File: arbiter_tb.v , 126 | |
| Text: ... | |
| enterModule_item | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 128 | |
| Text: reg clk ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 128 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 128 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 128 | |
| Text: clk ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 128 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 128 | |
| Text: clk ... | |
| enterModule_item | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 129 | |
| Text: reg rst ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 129 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 129 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 129 | |
| Text: rst ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 129 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 129 | |
| Text: rst ... | |
| enterModule_item | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 130 | |
| Text: reg req3 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 130 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 130 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 130 | |
| Text: req3 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 130 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 130 | |
| Text: req3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 131 | |
| Text: reg req2 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 131 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 131 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 131 | |
| Text: req2 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 131 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 131 | |
| Text: req2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 132 | |
| Text: reg req1 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 132 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 132 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 132 | |
| Text: req1 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 132 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 132 | |
| Text: req1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterData_declaration | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterVariable_declaration | |
| File: arbiter_tb.v , 133 | |
| Text: reg req0 ; ... | |
| enterData_type | |
| File: arbiter_tb.v , 133 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: arbiter_tb.v , 133 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: arbiter_tb.v , 133 | |
| Text: req0 ... | |
| enterVariable_decl_assignment | |
| File: arbiter_tb.v , 133 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 133 | |
| Text: req0 ... | |
| enterModule_item | |
| File: 86 | |
| Text: prio [ 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 86 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 86 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 86 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 86 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 86 | |
| Text: 1 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 86 | |
| Text: prio [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 86 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 86 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 86 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 86 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 86 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 86 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 86 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 87 | |
| Text: begin for ( q = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 87 | |
| Text: begin for ( q = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 87 | |
| Text: begin for ( q = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 87 | |
| Text: begin for ( q = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 88 | |
| Text: for ( q = 0 ; q < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 88 | |
| Text: for ( q = 0 ; q < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 88 | |
| Text: for ( q = 0 ; q < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 88 | |
| Text: for ( q = 0 ; q < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 88 | |
| Text: q = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 88 | |
| Text: q = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 88 | |
| Text: q = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterSelect | |
| File: another_arbiter.v , 88 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 88 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 88 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 88 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 88 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: q < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterPrimary | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterIdentifier | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 88 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 88 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 88 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 88 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 88 | |
| Text: q = q + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 88 | |
| Text: q = q + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 88 | |
| Text: q = q + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterSelect | |
| File: another_arbiter.v , 88 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 88 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 88 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: q + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterPrimary | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterIdentifier | |
| File: another_arbiter.v , 88 | |
| Text: q ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 88 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 88 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 88 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 88 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 88 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] = ( pr ... | |
| enterStatement | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] = ( pr ... | |
| enterStatement_item | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] = ( pr ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] = ( pr ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] = ( pr ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 89 | |
| Text: minPrio [ q ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 89 | |
| Text: minPrio ... | |
| enterSelect | |
| File: another_arbiter.v , 89 | |
| Text: [ q ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 89 | |
| Text: [ q ] ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterIdentifier | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 89 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: ( prio [ q ] == min ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: ( prio [ q ] == min ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: ( prio [ q ] == min ... | |
| enterMintypmax_expression | |
| File: another_arbiter.v , 89 | |
| Text: prio [ q ] == min ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: prio [ q ] == min ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: prio [ q ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: prio [ q ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 89 | |
| Text: prio [ q ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 89 | |
| Text: prio ... | |
| enterSelect | |
| File: another_arbiter.v , 89 | |
| Text: [ q ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 89 | |
| Text: [ q ] ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterIdentifier | |
| File: another_arbiter.v , 89 | |
| Text: q ... | |
| enterBinOp_Equiv | |
| File: another_arbiter.v , 89 | |
| Text: == ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: min ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: min ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 89 | |
| Text: min ... | |
| enterIdentifier | |
| File: another_arbiter.v , 89 | |
| Text: min ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 89 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 89 | |
| Text: 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 89 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 89 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 89 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 89 | |
| Text: 0 ... | |
| enterEnd | |
| File: another_arbiter.v , 90 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 92 | |
| Text: assign prioRequest = ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 92 | |
| Text: assign prioRequest = ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 92 | |
| Text: assign prioRequest = ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 92 | |
| Text: assign prioRequest = ... | |
| enterContinuous_assign | |
| File: another_arbiter.v , 92 | |
| Text: assign prioRequest = ... | |
| enterList_of_net_assignments | |
| File: another_arbiter.v , 92 | |
| Text: prioRequest = minPri ... | |
| enterNet_assignment | |
| File: another_arbiter.v , 92 | |
| Text: prioRequest = minPri ... | |
| enterNet_lvalue | |
| File: another_arbiter.v , 92 | |
| Text: prioRequest ... | |
| enterPs_or_hierarchical_identifier | |
| File: another_arbiter.v arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 134 | |
| Text: wire gnt3 ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 134 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 134 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 134 | |
| Text: gnt3 ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 134 | |
| Text: gnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 134 | |
| Text: gnt3 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 135 | |
| Text: wire gnt2 ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 135 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 135 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 135 | |
| Text: gnt2 ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 135 | |
| Text: gnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 135 | |
| Text: gnt2 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 136 | |
| Text: wire gnt1 ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 136 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 136 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 136 | |
| Text: gnt1 ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 136 | |
| Text: gnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 136 | |
| Text: gnt1 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterNet_declaration | |
| File: arbiter_tb.v , 137 | |
| Text: wire gnt0 ; ... | |
| enterNetType_Wire | |
| File: arbiter_tb.v , 137 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: arbiter_tb.v , 137 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: arbiter_tb.v , 137 | |
| Text: gnt0 ... | |
| enterNet_decl_assignment | |
| File: arbiter_tb.v , 137 | |
| Text: gnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 137 | |
| Text: gnt0 ... | |
| enterModule_item | |
| File: arbiter_tb.v , 140 | |
| Text: always #1 clk = ~ cl ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 140 | |
| Text: always #1 clk = ~ cl ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 140 | |
| Text: always #1 clk = ~ cl ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 140 | |
| Text: always #1 clk = ~ cl ... | |
| enterAlways_construct | |
| File: arbiter_tb.v , 140 | |
| Text: always #1 clk = ~ cl ... | |
| enterAlwaysKeywd_Always | |
| File: arbiter_tb.v , 140 | |
| Text: always ... | |
| enterStatement | |
| File: arbiter_tb.v , 140 | |
| Text: #1 clk = ~ clk ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 140 | |
| Text: #1 clk = ~ clk ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 140 | |
| Text: #1 clk = ~ clk ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 140 | |
| Text: #1 ... | |
| enterDelay_control | |
| File: arbiter_tb.v , 140 | |
| Text: #1 ... | |
| enterPound_delay_value | |
| File: arbiter_tb.v , 140 | |
| Text: #1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 140 | |
| Text: clk = ~ clk ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 140 | |
| Text: clk = ~ clk ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 140 | |
| Text: clk = ~ clk ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 140 | |
| Text: clk = ~ clk ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 140 | |
| Text: clk = ~ clk ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 140 | |
| Text: clk ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 140 | |
| Text: clk ... | |
| enterSelect | |
| File: arbiter_tb.v , 140 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 140 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 140 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 140 | |
| Text: ~ clk ... | |
| enterUnary_Tilda | |
| File: arbiter_tb.v , 140 | |
| Text: ~ ... | |
| enterPrimary | |
| File: arbiter_tb.v , 140 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 140 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 140 | |
| Text: clk ... | |
| enterModule_item | |
| File: arbiter_tb.v , 142 | |
| Text: initial begin $ dump ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 142 | |
| Text: initial begin $ dump ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 142 | |
| Text: initial begin $ dump ... | |
| enterModule_common_item | |
| File: arbiter_tb.v , 142 | |
| Text: initial begin $ dump ... | |
| enterInitial_construct | |
| File: arbiter_tb.v , 142 | |
| Text: initial begin $ dump ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 142 | |
| Text: begin $ dumpfile ( " ... | |
| enterStatement | |
| File: arbiter_tb.v , 142 | |
| Text: begin $ dumpfile ( " ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 142 | |
| Text: begin $ dumpfile ( " ... | |
| enterSeq_block | |
| File: arbiter_tb.v , 142 | |
| Text: begin $ dumpfile ( " ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 143 | |
| Text: $ dumpfile ( "arbite ... | |
| enterStatement | |
| File: arbiter_tb.v , 143 | |
| Text: $ dumpfile ( "arbite ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 143 | |
| Text: $ dumpfile ( "arbite ... | |
| enterSubroutine_call_statement | |
| File: arbiter_tb.v , 143 | |
| Text: $ dumpfile ( "arbite ... | |
| enterSubroutine_call | |
| File: arbiter_tb.v , 143 | |
| Text: $ dumpfile ( "arbite ... | |
| enterDollar_keyword | |
| File: arbiter_tb.v , 143 | |
| Text: $ ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 143 | |
| Text: dumpfile ... | |
| enterList_of_arguments | |
| File: arbiter_tb.v , 143 | |
| Text: "arbiter.vcd" ... | |
| enterExpression | |
| File: arbiter_tb.v , 143 | |
| Text: "arbiter.vcd" ... | |
| enterPrimary | |
| File: arbiter_tb.v , 143 | |
| Text: "arbiter.vcd" ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 143 | |
| Text: "arbiter.vcd" ... | |
| enterString_value | |
| File: arbiter_tb.v , 143 | |
| Text: "arbiter.vcd" ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 144 | |
| Text: $ dumpvars ( ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 144 | |
| Text: $ dumpvars ( ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 144 | |
| Text: $ dumpvars ( ) ; ... | |
| enterSubroutine_call_statement | |
| File: arbiter_tb.v , 144 | |
| Text: $ dumpvars ( ) ; ... | |
| enterSubroutine_call | |
| File: arbiter_tb.v , 144 | |
| Text: $ dumpvars ( ) ... | |
| enterDollar_keyword | |
| File: arbiter_tb.v , 144 | |
| Text: $ ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 144 | |
| Text: dumpvars ... | |
| enterList_of_arguments | |
| File: arbiter_tb.v , 144 | |
| Text: ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 145 | |
| Text: clk = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 145 | |
| Text: clk = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 145 | |
| Text: clk = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 145 | |
| Text: clk = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 145 | |
| Text: clk = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 145 | |
| Text: clk ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 92 | |
| Text: prioRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 92 | |
| Text: prioRequest ... | |
| enterConstant_select | |
| File: another_arbiter.v , 92 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: another_arbiter.v , 92 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 92 | |
| Text: minPrio & request ... | |
| enterExpression | |
| File: another_arbiter.v , 92 | |
| Text: minPrio ... | |
| enterPrimary | |
| File: another_arbiter.v , 92 | |
| Text: minPrio ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 92 | |
| Text: minPrio ... | |
| enterIdentifier | |
| File: another_arbiter.v , 92 | |
| Text: minPrio ... | |
| enterBinOp_BitwAnd | |
| File: another_arbiter.v , 92 | |
| Text: & ... | |
| enterExpression | |
| File: another_arbiter.v , 92 | |
| Text: request ... | |
| enterPrimary | |
| File: another_arbiter.v , 92 | |
| Text: request ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 92 | |
| Text: request ... | |
| enterIdentifier | |
| File: another_arbiter.v , 92 | |
| Text: request ... | |
| enterModule_item | |
| File: another_arbiter.v , 94 | |
| Text: always @ ( next ) be ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 94 | |
| Text: always @ ( next ) be ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 94 | |
| Text: always @ ( next ) be ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 94 | |
| Text: always @ ( next ) be ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 94 | |
| Text: always @ ( next ) be ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 94 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 94 | |
| Text: @ ( next ) begin for ... | |
| enterStatement_item | |
| File: another_arbiter.v , 94 | |
| Text: @ ( next ) begin for ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 94 | |
| Text: @ ( next ) begin for ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 94 | |
| Text: @ ( next ) ... | |
| enterEvent_control | |
| File: another_arbiter.v , 94 | |
| Text: @ ( next ) ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 94 | |
| Text: next ... | |
| enterExpression | |
| File: another_arbiter.v , 94 | |
| Text: next ... | |
| enterPrimary | |
| File: another_arbiter.v , 94 | |
| Text: next ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 94 | |
| Text: next ... | |
| enterIdentifier | |
| File: another_arbiter.v , 94 | |
| Text: next ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 95 | |
| Text: begin for ( s = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 95 | |
| Text: begin for ( s = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 95 | |
| Text: begin for ( s = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 95 | |
| Text: begin for ( s = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 96 | |
| Text: for ( s = 0 ; s < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 96 | |
| Text: for ( s = 0 ; s < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 96 | |
| Text: for ( s = 0 ; s < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 96 | |
| Text: for ( s = 0 ; s < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 96 | |
| Text: s = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 96 | |
| Text: s = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 96 | |
| Text: s = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterSelect | |
| File: another_arbiter.v , 96 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 96 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 96 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 96 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 96 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: s < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 96 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 96 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 96 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 96 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 96 | |
| Text: s = s + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 96 | |
| Text: s = s + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 96 | |
| Text: s = s + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterSelect | |
| File: another_arbiter.v , 96 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 96 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 96 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: s + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 96 | |
| Text: s ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 96 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 96 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 96 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 96 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 96 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] = ( next ... | |
| enterStatement | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] = ( next ... | |
| enterStatement_item | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] = ( next ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] = ( next ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] = ( next ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 97 | |
| Text: scan [ s ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 97 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 97 | |
| Text: [ s ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 97 | |
| Text: [ s ] ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 97 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: ( next + s < NUMUNIT ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: ( next + s < NUMUNIT ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: ( next + s < NUMUNIT ... | |
| enterMintypmax_expression | |
| File: another_arbiter.v , 97 | |
| Text: next + s < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next + s < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next + s ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 97 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 97 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next + s ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: , 145 | |
| Text: clk ... | |
| enterSelect | |
| File: arbiter_tb.v , 145 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 145 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 145 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 145 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 145 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 145 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 145 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 146 | |
| Text: rst = 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 146 | |
| Text: rst = 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 146 | |
| Text: rst = 1 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 146 | |
| Text: rst = 1 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 146 | |
| Text: rst = 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 146 | |
| Text: rst ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 146 | |
| Text: rst ... | |
| enterSelect | |
| File: arbiter_tb.v , 146 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 146 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 146 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 146 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 146 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 146 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 146 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 147 | |
| Text: req0 = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 147 | |
| Text: req0 = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 147 | |
| Text: req0 = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 147 | |
| Text: req0 = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 147 | |
| Text: req0 = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 147 | |
| Text: req0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 147 | |
| Text: req0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 147 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 147 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 147 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 147 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 147 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 147 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 147 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 148 | |
| Text: req1 = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 148 | |
| Text: req1 = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 148 | |
| Text: req1 = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 148 | |
| Text: req1 = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 148 | |
| Text: req1 = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 148 | |
| Text: req1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 148 | |
| Text: req1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 148 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 148 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 148 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 148 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 148 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 148 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 148 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 149 | |
| Text: req2 = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 149 | |
| Text: req2 = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 149 | |
| Text: req2 = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 149 | |
| Text: req2 = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 149 | |
| Text: req2 = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 149 | |
| Text: req2 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 149 | |
| Text: req2 ... | |
| enterSelect | |
| File: arbiter_tb.v , 149 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 149 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 149 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 149 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 149 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 149 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 149 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 150 | |
| Text: req3 = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 150 | |
| Text: req3 = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 150 | |
| Text: req3 = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 150 | |
| Text: req3 = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 150 | |
| Text: req3 = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 150 | |
| Text: req3 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 150 | |
| Text: req3 ... | |
| enterSelect | |
| File: arbiter_tb.v , 150 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 150 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 150 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 150 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 150 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 150 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 150 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 151 | |
| Text: #10 rst = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 151 | |
| Text: #10 rst = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 151 | |
| Text: #10 rst = 0 ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 151 | |
| Text: #10 rst = 0 ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 151 | |
| Text: #10 ... | |
| enterDelay_control | |
| File: arbiter_tb.v , 151 | |
| Text: #10 ... | |
| enterPound_delay_value | |
| File: arbiter_tb.v , 151 | |
| Text: #10 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 151 | |
| Text: rst = 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 151 | |
| Text: rst = 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 151 | |
| Text: rst = 0 ; ... | |
| enterBlocking_assignment | |
| File: arbiter_tb.v , 151 | |
| Text: rst = 0 ... | |
| enterOperator_assignment | |
| File: arbiter_tb.v , 151 | |
| Text: rst = 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 151 | |
| Text: rst ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 151 | |
| Text: rst ... | |
| enterSelect | |
| File: arbiter_tb.v , 151 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 151 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 151 | |
| Text: = ... | |
| enterExpression | |
| File: arbiter_tb.v , 151 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 151 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 151 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 151 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 152 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 152 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 152 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 152 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 152 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 152 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 152 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 152 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 152 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 152 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 152 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 152 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 152 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 152 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 152 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 152 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 152 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 153 | |
| Text: req0 <= 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 153 | |
| Text: req0 <= 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 153 | |
| Text: req0 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 153 | |
| Text: req0 <= 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 153 | |
| Text: req0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 153 | |
| Text: req0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 153 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 153 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 153 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 153 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 153 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 153 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 154 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 154 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 154 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 154 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 154 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 154 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 154 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 154 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 154 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 154 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 154 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 154 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 154 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 154 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 154 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 154 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 154 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 155 | |
| Text: req0 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 155 | |
| Text: req0 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 155 | |
| Text: req0 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 155 | |
| Text: req0 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 155 | |
| Text: req0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 155 | |
| Text: req0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 155 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 155 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 155 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 155 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 155 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 155 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 156 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 156 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 156 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 156 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 156 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 156 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 156 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 156 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 156 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 156 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 156 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 156 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 156 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 156 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 156 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 156 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 156 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 157 | |
| Text: req0 <= 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 157 | |
| Text: req0 <= 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 157 | |
| Text: req0 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 157 | |
| Text: req0 <= 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 157 | |
| Text: req0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 157 | |
| Text: req0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 157 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 157 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 157 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 157 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 157 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 157 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 158 | |
| Text: req1 <= 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 158 | |
| Text: req1 <= 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 158 | |
| Text: req1 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 158 | |
| Text: req1 <= 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 158 | |
| Text: req1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 158 | |
| Text: req1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 158 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 158 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 158 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 158 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 158 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 158 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 159 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 159 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 159 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 159 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 159 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 159 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 159 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 159 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 159 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 159 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 159 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 159 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 159 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 159 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 159 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 159 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 159 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 160 | |
| Text: req2 <= 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 160 | |
| Text: req2 <= 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 160 | |
| Text: req2 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 160 | |
| Text: req2 <= 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 160 | |
| Text: req2 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 160 | |
| Text: req2 ... | |
| enterSelect | |
| File: arbiter_tb.v , 160 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 160 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 160 | |
| Text: next ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 97 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next + s - NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next + s ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: next ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 97 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: s ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 97 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 97 | |
| Text: NUMUNITS ... | |
| enterEnd | |
| File: another_arbiter.v , 98 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 100 | |
| Text: always @ ( finalRequ ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 100 | |
| Text: always @ ( finalRequ ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 100 | |
| Text: always @ ( finalRequ ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 100 | |
| Text: always @ ( finalRequ ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 100 | |
| Text: always @ ( finalRequ ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 100 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 100 | |
| Text: @ ( finalRequest or ... | |
| enterStatement_item | |
| File: another_arbiter.v , 100 | |
| Text: @ ( finalRequest or ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 100 | |
| Text: @ ( finalRequest or ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 100 | |
| Text: @ ( finalRequest or ... | |
| enterEvent_control | |
| File: another_arbiter.v , 100 | |
| Text: @ ( finalRequest or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest or scan ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 100 | |
| Text: finalRequest ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 7 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 7 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 7 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 100 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 100 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 100 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: 7 ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 100 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 100 | |
| Text: 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 6 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 6 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 6 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 100 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 100 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 100 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: 6 ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 100 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 100 | |
| Text: 6 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 5 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 5 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 5 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 100 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 100 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 100 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: 5 ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 100 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 100 | |
| Text: 5 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 4 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 4 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 100 | |
| Text: scan [ 4 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 100 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 100 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 100 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 100 | |
| Text: 4 ... | |
| enterPrimary | |
| File: another_arbiter.v , 100 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 100 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 100 | |
| Text: 4 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 3 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 3 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 3 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 101 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 101 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 101 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: 3 ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 101 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 101 | |
| Text: 3 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 2 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 2 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 2 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 101 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 101 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 101 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: 2 ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 101 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 101 | |
| Text: 2 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 160 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 160 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 160 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 161 | |
| Text: req1 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 161 | |
| Text: req1 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 161 | |
| Text: req1 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 161 | |
| Text: req1 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 161 | |
| Text: req1 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 161 | |
| Text: req1 ... | |
| enterSelect | |
| File: arbiter_tb.v , 161 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 161 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 161 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 161 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 161 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 161 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 162 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 162 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 162 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 162 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 162 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 162 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 162 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 162 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 162 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 162 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 162 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 162 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 162 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 162 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 162 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 162 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 162 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 163 | |
| Text: req3 <= 1 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 163 | |
| Text: req3 <= 1 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 163 | |
| Text: req3 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 163 | |
| Text: req3 <= 1 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 163 | |
| Text: req3 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 163 | |
| Text: req3 ... | |
| enterSelect | |
| File: arbiter_tb.v , 163 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 163 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 163 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 163 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 163 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 163 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 164 | |
| Text: req2 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 164 | |
| Text: req2 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 164 | |
| Text: req2 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 164 | |
| Text: req2 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 164 | |
| Text: req2 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 164 | |
| Text: req2 ... | |
| enterSelect | |
| File: arbiter_tb.v , 164 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 164 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 164 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 164 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 164 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 164 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 165 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 165 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 165 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 165 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 165 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 165 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 165 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 165 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 165 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 165 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 165 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 165 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 165 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 165 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 165 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 165 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 165 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 166 | |
| Text: req3 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 166 | |
| Text: req3 <= 0 ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 166 | |
| Text: req3 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 166 | |
| Text: req3 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 166 | |
| Text: req3 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 166 | |
| Text: req3 ... | |
| enterSelect | |
| File: arbiter_tb.v , 166 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 166 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 166 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 166 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 166 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 166 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 167 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 167 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 167 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 167 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 167 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 167 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 167 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 167 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 167 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 167 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 167 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 167 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 167 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 167 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 167 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 167 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 167 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 168 | |
| Text: req0 <= 0 ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 168 | |
| Text: req0 <= 0 ; ... | |
| enterStatement_item , 101 | |
| Text: scan [ 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 101 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 101 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 101 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 101 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 101 | |
| Text: 1 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 101 | |
| Text: scan [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 101 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 101 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 101 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 101 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 101 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 101 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 101 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 102 | |
| Text: begin found [ 0 ] = ... | |
| enterStatement | |
| File: another_arbiter.v , 102 | |
| Text: begin found [ 0 ] = ... | |
| enterStatement_item | |
| File: another_arbiter.v , 102 | |
| Text: begin found [ 0 ] = ... | |
| enterSeq_block | |
| File: another_arbiter.v , 102 | |
| Text: begin found [ 0 ] = ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] = finalR ... | |
| enterStatement | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] = finalR ... | |
| enterStatement_item | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] = finalR ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] = finalR ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] = finalR ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 103 | |
| Text: found [ 0 ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 103 | |
| Text: found ... | |
| enterSelect | |
| File: another_arbiter.v , 103 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 103 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 103 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 103 | |
| Text: finalRequest [ scan ... | |
| enterPrimary | |
| File: another_arbiter.v , 103 | |
| Text: finalRequest [ scan ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 103 | |
| Text: finalRequest [ scan ... | |
| enterIdentifier | |
| File: another_arbiter.v , 103 | |
| Text: finalRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 103 | |
| Text: [ scan [ 0 ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 103 | |
| Text: [ scan [ 0 ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 103 | |
| Text: scan [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 103 | |
| Text: scan [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 103 | |
| Text: scan [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 103 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 103 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 103 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 103 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 104 | |
| Text: for ( t = 1 ; t < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 104 | |
| Text: for ( t = 1 ; t < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 104 | |
| Text: for ( t = 1 ; t < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 104 | |
| Text: for ( t = 1 ; t < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 104 | |
| Text: t = 1 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 104 | |
| Text: t = 1 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 104 | |
| Text: t = 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterSelect | |
| File: another_arbiter.v , 104 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 104 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: t < NUMUNITS - 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: t < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 104 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 104 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 104 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterFor_step | |
| File: another_arbiter.v , 104 | |
| Text: t = t + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 104 | |
| Text: t = t + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 104 | |
| Text: t = t + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterSelect | |
| File: another_arbiter.v , 104 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 104 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 104 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: t + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 104 | |
| Text: t ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 104 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 104 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] = found ... | |
| enterStatement | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] = found ... | |
| enterStatement_item | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] = found ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] = found ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] = found ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 105 | |
| Text: found [ t ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 105 | |
| Text: found ... | |
| enterSelect | |
| File: another_arbiter.v , 105 | |
| Text: [ t ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 105 | |
| Text: [ t ] ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterAssignOp_Assign | |
| File: arbiter_tb.v , 168 | |
| Text: req0 <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: arbiter_tb.v , 168 | |
| Text: req0 <= 0 ... | |
| enterVariable_lvalue | |
| File: arbiter_tb.v , 168 | |
| Text: req0 ... | |
| enterHierarchical_identifier | |
| File: arbiter_tb.v , 168 | |
| Text: req0 ... | |
| enterSelect | |
| File: arbiter_tb.v , 168 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 168 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 168 | |
| Text: 0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 168 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 168 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 168 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 169 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement | |
| File: arbiter_tb.v , 169 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 169 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterLoop_statement | |
| File: arbiter_tb.v , 169 | |
| Text: repeat ( 1 ) @ ( pos ... | |
| enterRepeat_keyword | |
| File: arbiter_tb.v , 169 | |
| Text: repeat ... | |
| enterExpression | |
| File: arbiter_tb.v , 169 | |
| Text: 1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 169 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 169 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: arbiter_tb.v , 169 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_control | |
| File: arbiter_tb.v , 169 | |
| Text: @ ( posedge clk ) ... | |
| enterEvent_expression | |
| File: arbiter_tb.v , 169 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: arbiter_tb.v , 169 | |
| Text: posedge ... | |
| enterExpression | |
| File: arbiter_tb.v , 169 | |
| Text: clk ... | |
| enterPrimary | |
| File: arbiter_tb.v , 169 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 169 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 169 | |
| Text: clk ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 169 | |
| Text: ; ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 170 | |
| Text: #10 $ finish ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 170 | |
| Text: #10 $ finish ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 170 | |
| Text: #10 $ finish ; ... | |
| enterProcedural_timing_control_statement | |
| File: arbiter_tb.v , 170 | |
| Text: #10 $ finish ; ... | |
| enterProcedural_timing_control | |
| File: arbiter_tb.v , 170 | |
| Text: #10 ... | |
| enterDelay_control | |
| File: arbiter_tb.v , 170 | |
| Text: #10 ... | |
| enterPound_delay_value | |
| File: arbiter_tb.v , 170 | |
| Text: #10 ... | |
| enterStatement_or_null | |
| File: arbiter_tb.v , 170 | |
| Text: $ finish ; ... | |
| enterStatement | |
| File: arbiter_tb.v , 170 | |
| Text: $ finish ; ... | |
| enterStatement_item | |
| File: arbiter_tb.v , 170 | |
| Text: $ finish ; ... | |
| enterSubroutine_call_statement | |
| File: arbiter_tb.v , 170 | |
| Text: $ finish ; ... | |
| enterSubroutine_call | |
| File: arbiter_tb.v , 170 | |
| Text: $ finish ... | |
| enterDollar_keyword | |
| File: arbiter_tb.v , 170 | |
| Text: $ ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 170 | |
| Text: finish ... | |
| enterSelect | |
| File: arbiter_tb.v , 170 | |
| Text: ... | |
| enterBit_select | |
| File: arbiter_tb.v , 170 | |
| Text: ... | |
| enterEnd | |
| File: arbiter_tb.v , 171 | |
| Text: end ... | |
| enterModule_item | |
| File: arbiter_tb.v , 174 | |
| Text: arbiter U ( clk , rs ... | |
| enterNon_port_module_item | |
| File: arbiter_tb.v , 174 | |
| Text: arbiter U ( clk , rs ... | |
| enterModule_or_generate_item | |
| File: arbiter_tb.v , 174 | |
| Text: arbiter U ( clk , rs ... | |
| enterUdp_instantiation | |
| File: arbiter_tb.v , 174 | |
| Text: arbiter U ( clk , rs ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 174 | |
| Text: arbiter ... | |
| enterUdp_instance | |
| File: arbiter_tb.v , 174 | |
| Text: U ( clk , rst , req3 ... | |
| enterName_of_instance | |
| File: arbiter_tb.v , 174 | |
| Text: U ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 174 | |
| Text: U ... | |
| enterNet_lvalue | |
| File: arbiter_tb.v , 175 | |
| Text: clk ... | |
| enterPs_or_hierarchical_identifier | |
| File: arbiter_tb.v , 175 | |
| Text: clk ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 175 | |
| Text: clk ... | |
| enterConstant_select | |
| File: arbiter_tb.v , 175 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: arbiter_tb.v , 175 | |
| Text: ... | |
| enterExpression | |
| File: arbiter_tb.v , 176 | |
| Text: rst ... | |
| enterPrimary | |
| File: arbiter_tb.v , 176 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 176 | |
| Text: rst ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 176 | |
| Text: rst ... | |
| enterExpression | |
| File: arbiter_tb.v , 177 | |
| Text: req3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 177 | |
| Text: req3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 177 | |
| Text: req3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 177 | |
| Text: req3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 178 | |
| Text: req2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 178 | |
| Text: req2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 178 | |
| Text: req2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 178 | |
| Text: req2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 179 | |
| Text: req1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 179 | |
| Text: req1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 179 | |
| Text: req1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 179 | |
| Text: req1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 180 | |
| Text: req0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 180 | |
| Text: req0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 180 | |
| Text: req0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 180 | |
| Text: req0 ... | |
| enterExpression | |
| File: arbiter_tb.v , 181 | |
| Text: gnt3 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 181 | |
| Text: gnt3 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 181 | |
| Text: gnt3 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 181 | |
| Text: gnt3 ... | |
| enterExpression | |
| File: arbiter_tb.v , 182 | |
| Text: gnt2 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 182 | |
| Text: gnt2 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 182 | |
| Text: gnt2 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 182 | |
| Text: gnt2 ... | |
| enterExpression | |
| File: arbiter_tb.v , 183 | |
| Text: gnt1 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 183 | |
| Text: gnt1 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 183 | |
| Text: gnt1 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 183 | |
| Text: gnt1 ... | |
| enterExpression | |
| File: arbiter_tb.v , 184 | |
| Text: gnt0 ... | |
| enterPrimary | |
| File: arbiter_tb.v , 184 | |
| Text: gnt0 ... | |
| enterPrimary_literal | |
| File: arbiter_tb.v , 184 | |
| Text: gnt0 ... | |
| enterIdentifier | |
| File: arbiter_tb.v , 184 | |
| Text: gnt0 ... | |
| enterEndmodule | |
| File: arbiter_tb.v , 187 | |
| Text: endmodule ... | |
| File: another_arbiter.v , 105 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: found [ t - 1 ] || f ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: found [ t - 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: found [ t - 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 105 | |
| Text: found [ t - 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: found ... | |
| enterSelect | |
| File: another_arbiter.v , 105 | |
| Text: [ t - 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 105 | |
| Text: [ t - 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: t - 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 105 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 105 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 105 | |
| Text: 1 ... | |
| enterBinOp_LogicOr | |
| File: another_arbiter.v , 105 | |
| Text: || ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: finalRequest [ scan ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: finalRequest [ scan ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 105 | |
| Text: finalRequest [ scan ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: finalRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 105 | |
| Text: [ scan [ t ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 105 | |
| Text: [ scan [ t ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: scan [ t ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: scan [ t ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 105 | |
| Text: scan [ t ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 105 | |
| Text: [ t ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 105 | |
| Text: [ t ] ... | |
| enterExpression | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterIdentifier | |
| File: another_arbiter.v , 105 | |
| Text: t ... | |
| enterEnd | |
| File: another_arbiter.v , 106 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 108 | |
| Text: always @ ( finalRequ ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 108 | |
| Text: always @ ( finalRequ ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 108 | |
| Text: always @ ( finalRequ ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 108 | |
| Text: always @ ( finalRequ ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 108 | |
| Text: always @ ( finalRequ ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 108 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 108 | |
| Text: @ ( finalRequest or ... | |
| enterStatement_item | |
| File: another_arbiter.v , 108 | |
| Text: @ ( finalRequest or ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 108 | |
| Text: @ ( finalRequest or ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 108 | |
| Text: @ ( finalRequest or ... | |
| enterEvent_control | |
| File: another_arbiter.v , 108 | |
| Text: @ ( finalRequest or ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest or foun ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest ... | |
| enterIdentifier | |
| File: another_arbiter.v , 108 | |
| Text: finalRequest ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: found ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: found ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: found ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 108 | |
| Text: found ... | |
| enterIdentifier | |
| File: another_arbiter.v , 108 | |
| Text: found ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 7 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 7 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 7 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 108 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 108 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 108 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: 7 ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 108 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 108 | |
| Text: 7 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 6 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 6 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 6 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 108 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 108 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 108 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: 6 ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 108 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 108 | |
| Text: 6 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 5 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 5 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 108 | |
| Text: scan [ 5 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 108 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 108 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 108 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 108 | |
| Text: 5 ... | |
| enterPrimary | |
| File: another_arbiter.v , 108 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 108 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 108 | |
| Text: 5 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 4 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 4 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 4 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 109 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 109 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 109 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: 4 ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 109 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 109 | |
| Text: 4 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 3 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 3 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 3 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 109 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 109 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 109 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: 3 ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 109 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 109 | |
| Text: 3 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 2 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 2 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 2 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 109 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 109 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 109 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: 2 ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 109 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 109 | |
| Text: 2 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 1 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 109 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 109 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 109 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 109 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 109 | |
| Text: 1 ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 109 | |
| Text: scan [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 109 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 109 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 109 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 109 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 109 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 109 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 109 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 110 | |
| Text: begin grantD [ scan ... | |
| enterStatement | |
| File: another_arbiter.v , 110 | |
| Text: begin grantD [ scan ... | |
| enterStatement_item | |
| File: another_arbiter.v , 110 | |
| Text: begin grantD [ scan ... | |
| enterSeq_block | |
| File: another_arbiter.v , 110 | |
| Text: begin grantD [ scan ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterStatement | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterStatement_item | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 111 | |
| Text: grantD [ scan [ 0 ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 111 | |
| Text: grantD ... | |
| enterSelect | |
| File: another_arbiter.v , 111 | |
| Text: [ scan [ 0 ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 111 | |
| Text: [ scan [ 0 ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 111 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 111 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 111 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 111 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 111 | |
| Text: finalRequest [ scan ... | |
| enterPrimary | |
| File: another_arbiter.v , 111 | |
| Text: finalRequest [ scan ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 111 | |
| Text: finalRequest [ scan ... | |
| enterIdentifier | |
| File: another_arbiter.v , 111 | |
| Text: finalRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 111 | |
| Text: [ scan [ 0 ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 111 | |
| Text: [ scan [ 0 ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 111 | |
| Text: scan [ 0 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 111 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 111 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 111 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 111 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 112 | |
| Text: for ( u = 1 ; u < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 112 | |
| Text: for ( u = 1 ; u < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 112 | |
| Text: for ( u = 1 ; u < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 112 | |
| Text: for ( u = 1 ; u < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 112 | |
| Text: u = 1 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 112 | |
| Text: u = 1 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 112 | |
| Text: u = 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterSelect | |
| File: another_arbiter.v , 112 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 112 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: u < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterPrimary | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 112 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 112 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 112 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 112 | |
| Text: NUMUNITS ... | |
| enterFor_step | |
| File: another_arbiter.v , 112 | |
| Text: u = u + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 112 | |
| Text: u = u + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 112 | |
| Text: u = u + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterSelect | |
| File: another_arbiter.v , 112 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 112 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 112 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: u + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterPrimary | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 112 | |
| Text: u ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 112 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 112 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterStatement | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterStatement_item | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 113 | |
| Text: grantD [ scan [ u ] ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 113 | |
| Text: grantD ... | |
| enterSelect | |
| File: another_arbiter.v , 113 | |
| Text: [ scan [ u ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 113 | |
| Text: [ scan [ u ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 113 | |
| Text: [ u ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 113 | |
| Text: [ u ] ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 113 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: finalRequest [ scan ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: finalRequest [ scan ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: finalRequest [ scan ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 113 | |
| Text: finalRequest [ scan ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: finalRequest ... | |
| enterSelect | |
| File: another_arbiter.v , 113 | |
| Text: [ scan [ u ] ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 113 | |
| Text: [ scan [ u ] ] ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 113 | |
| Text: scan [ u ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: scan ... | |
| enterSelect | |
| File: another_arbiter.v , 113 | |
| Text: [ u ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 113 | |
| Text: [ u ] ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterBinOp_LogicAnd | |
| File: another_arbiter.v , 113 | |
| Text: && ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: ~ found [ u - 1 ] ... | |
| enterUnary_Tilda | |
| File: another_arbiter.v , 113 | |
| Text: ~ ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: found [ u - 1 ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 113 | |
| Text: found [ u - 1 ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: found ... | |
| enterSelect | |
| File: another_arbiter.v , 113 | |
| Text: [ u - 1 ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 113 | |
| Text: [ u - 1 ] ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: u - 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterIdentifier | |
| File: another_arbiter.v , 113 | |
| Text: u ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 113 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 113 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 113 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 113 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 113 | |
| Text: 1 ... | |
| enterEnd | |
| File: another_arbiter.v , 114 | |
| Text: end ... | |
| enterModule_item | |
| File: another_arbiter.v , 115 | |
| Text: always @ ( grantD ) ... | |
| enterNon_port_module_item | |
| File: another_arbiter.v , 115 | |
| Text: always @ ( grantD ) ... | |
| enterModule_or_generate_item | |
| File: another_arbiter.v , 115 | |
| Text: always @ ( grantD ) ... | |
| enterModule_common_item | |
| File: another_arbiter.v , 115 | |
| Text: always @ ( grantD ) ... | |
| enterAlways_construct | |
| File: another_arbiter.v , 115 | |
| Text: always @ ( grantD ) ... | |
| enterAlwaysKeywd_Always | |
| File: another_arbiter.v , 115 | |
| Text: always ... | |
| enterStatement | |
| File: another_arbiter.v , 115 | |
| Text: @ ( grantD ) begin n ... | |
| enterStatement_item | |
| File: another_arbiter.v , 115 | |
| Text: @ ( grantD ) begin n ... | |
| enterProcedural_timing_control_statement | |
| File: another_arbiter.v , 115 | |
| Text: @ ( grantD ) begin n ... | |
| enterProcedural_timing_control | |
| File: another_arbiter.v , 115 | |
| Text: @ ( grantD ) ... | |
| enterEvent_control | |
| File: another_arbiter.v , 115 | |
| Text: @ ( grantD ) ... | |
| enterEvent_expression | |
| File: another_arbiter.v , 115 | |
| Text: grantD ... | |
| enterExpression | |
| File: another_arbiter.v , 115 | |
| Text: grantD ... | |
| enterPrimary | |
| File: another_arbiter.v , 115 | |
| Text: grantD ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 115 | |
| Text: grantD ... | |
| enterIdentifier | |
| File: another_arbiter.v , 115 | |
| Text: grantD ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 116 | |
| Text: begin nextNext = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 116 | |
| Text: begin nextNext = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 116 | |
| Text: begin nextNext = 0 ; ... | |
| enterSeq_block | |
| File: another_arbiter.v , 116 | |
| Text: begin nextNext = 0 ; ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 117 | |
| Text: nextNext = 0 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 117 | |
| Text: nextNext = 0 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 117 | |
| Text: nextNext = 0 ; ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 117 | |
| Text: nextNext = 0 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 117 | |
| Text: nextNext = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 117 | |
| Text: nextNext ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 117 | |
| Text: nextNext ... | |
| enterSelect | |
| File: another_arbiter.v , 117 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 117 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 117 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 117 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 117 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 117 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 117 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 118 | |
| Text: for ( v = 0 ; v < NU ... | |
| enterStatement | |
| File: another_arbiter.v , 118 | |
| Text: for ( v = 0 ; v < NU ... | |
| enterStatement_item | |
| File: another_arbiter.v , 118 | |
| Text: for ( v = 0 ; v < NU ... | |
| enterLoop_statement | |
| File: another_arbiter.v , 118 | |
| Text: for ( v = 0 ; v < NU ... | |
| enterFor_initialization | |
| File: another_arbiter.v , 118 | |
| Text: v = 0 ... | |
| enterList_of_variable_assignments | |
| File: another_arbiter.v , 118 | |
| Text: v = 0 ... | |
| enterVariable_assignment | |
| File: another_arbiter.v , 118 | |
| Text: v = 0 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterSelect | |
| File: another_arbiter.v , 118 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 118 | |
| Text: ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: 0 ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 118 | |
| Text: 0 ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: v < NUMUNITS - 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: v < NUMUNITS ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterIdentifier | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterBinOp_Less | |
| File: another_arbiter.v , 118 | |
| Text: < ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: NUMUNITS ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: NUMUNITS ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: NUMUNITS ... | |
| enterIdentifier | |
| File: another_arbiter.v , 118 | |
| Text: NUMUNITS ... | |
| enterBinOp_Minus | |
| File: another_arbiter.v , 118 | |
| Text: - ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterFor_step | |
| File: another_arbiter.v , 118 | |
| Text: v = v + 1 ... | |
| enterFor_step_assignment | |
| File: another_arbiter.v , 118 | |
| Text: v = v + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 118 | |
| Text: v = v + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterSelect | |
| File: another_arbiter.v , 118 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 118 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 118 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: v + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterIdentifier | |
| File: another_arbiter.v , 118 | |
| Text: v ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 118 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 118 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 119 | |
| Text: if ( grantD [ v ] ) ... | |
| enterStatement | |
| File: another_arbiter.v , 119 | |
| Text: if ( grantD [ v ] ) ... | |
| enterStatement_item | |
| File: another_arbiter.v , 119 | |
| Text: if ( grantD [ v ] ) ... | |
| enterConditional_statement | |
| File: another_arbiter.v , 119 | |
| Text: if ( grantD [ v ] ) ... | |
| enterCond_predicate | |
| File: another_arbiter.v , 119 | |
| Text: grantD [ v ] ... | |
| enterExpression_or_cond_pattern | |
| File: another_arbiter.v , 119 | |
| Text: grantD [ v ] ... | |
| enterExpression | |
| File: another_arbiter.v , 119 | |
| Text: grantD [ v ] ... | |
| enterPrimary | |
| File: another_arbiter.v , 119 | |
| Text: grantD [ v ] ... | |
| enterComplex_func_call | |
| File: another_arbiter.v , 119 | |
| Text: grantD [ v ] ... | |
| enterIdentifier | |
| File: another_arbiter.v , 119 | |
| Text: grantD ... | |
| enterSelect | |
| File: another_arbiter.v , 119 | |
| Text: [ v ] ... | |
| enterBit_select | |
| File: another_arbiter.v , 119 | |
| Text: [ v ] ... | |
| enterExpression | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterPrimary | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterIdentifier | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterStatement_or_null | |
| File: another_arbiter.v , 119 | |
| Text: nextNext = v + 1 ; ... | |
| enterStatement | |
| File: another_arbiter.v , 119 | |
| Text: nextNext = v + 1 ; ... | |
| enterStatement_item | |
| File: another_arbiter.v , 119 | |
| Text: nextNext = v + 1 ; ... | |
| enterBlocking_assignment | |
| File: another_arbiter.v , 119 | |
| Text: nextNext = v + 1 ... | |
| enterOperator_assignment | |
| File: another_arbiter.v , 119 | |
| Text: nextNext = v + 1 ... | |
| enterVariable_lvalue | |
| File: another_arbiter.v , 119 | |
| Text: nextNext ... | |
| enterHierarchical_identifier | |
| File: another_arbiter.v , 119 | |
| Text: nextNext ... | |
| enterSelect | |
| File: another_arbiter.v , 119 | |
| Text: ... | |
| enterBit_select | |
| File: another_arbiter.v , 119 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: another_arbiter.v , 119 | |
| Text: = ... | |
| enterExpression | |
| File: another_arbiter.v , 119 | |
| Text: v + 1 ... | |
| enterExpression | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterPrimary | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterIdentifier | |
| File: another_arbiter.v , 119 | |
| Text: v ... | |
| enterBinOp_Plus | |
| File: another_arbiter.v , 119 | |
| Text: + ... | |
| enterExpression | |
| File: another_arbiter.v , 119 | |
| Text: 1 ... | |
| enterPrimary | |
| File: another_arbiter.v , 119 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: another_arbiter.v , 119 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: another_arbiter.v , 119 | |
| Text: 1 ... | |
| enterEnd | |
| File: another_arbiter.v , 120 | |
| Text: end ... | |
| enterEndmodule | |
| File: another_arbiter.v , 121 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "top.v". | |
| enterTop_level_rule | |
| File: top.v , 1 | |
| Text: <EOF> ... | |
| enterNull_rule | |
| File: top.v , 1 | |
| Text: ... | |
| enterSource_text | |
| File: top.v , 1 | |
| Text: ... | |
| [INFO :PY0400] Processing source file "encoder.v". | |
| enterTop_level_rule | |
| File: encoder.v , 7 | |
| Text: module encoder_using ... | |
| enterNull_rule | |
| File: encoder.v , 7 | |
| Text: ... | |
| enterSource_text | |
| File: encoder.v , 7 | |
| Text: module encoder_using ... | |
| enterDescription | |
| File: encoder.v , 7 | |
| Text: module encoder_using ... | |
| enterModule_declaration | |
| File: encoder.v , 7 | |
| Text: module encoder_using ... | |
| enterModule_nonansi_header | |
| File: encoder.v , 7 | |
| Text: module encoder_using ... | |
| enterModule_keyword | |
| File: encoder.v , 7 | |
| Text: module ... | |
| enterIdentifier | |
| File: encoder.v , 7 | |
| Text: encoder_using_case ... | |
| enterList_of_ports | |
| File: encoder.v , 7 | |
| Text: ( binary_out , encod ... | |
| enterPort | |
| File: encoder.v , 8 | |
| Text: binary_out ... | |
| enterPort_expression | |
| File: encoder.v , 8 | |
| Text: binary_out ... | |
| enterPort_reference | |
| File: encoder.v , 8 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder.v , 8 | |
| Text: binary_out ... | |
| enterConstant_select | |
| File: encoder.v , 8 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder.v , 8 | |
| Text: ... | |
| enterPort | |
| File: encoder.v , 9 | |
| Text: encoder_in ... | |
| enterPort_expression | |
| File: encoder.v , 9 | |
| Text: encoder_in ... | |
| enterPort_reference | |
| File: encoder.v , 9 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder.v , 9 | |
| Text: encoder_in ... | |
| enterConstant_select | |
| File: encoder.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder.v , 9 | |
| Text: ... | |
| enterPort | |
| File: encoder.v , 10 | |
| Text: enable ... | |
| enterPort_expression | |
| File: encoder.v , 10 | |
| Text: enable ... | |
| enterPort_reference | |
| File: encoder.v , 10 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder.v , 10 | |
| Text: enable ... | |
| enterConstant_select | |
| File: encoder.v , 11 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder.v , 11 | |
| Text: ... | |
| enterModule_item | |
| File: encoder.v , 12 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterPort_declaration | |
| File: encoder.v , 12 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterOutput_declaration | |
| File: encoder.v , 12 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterNet_port_type | |
| File: encoder.v , 12 | |
| Text: [ 3 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: encoder.v , 12 | |
| Text: [ 3 : 0 ] ... | |
| enterPacked_dimension | |
| File: encoder.v , 12 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: encoder.v , 12 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: encoder.v , 12 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: encoder.v , 12 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder.v , 12 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder.v , 12 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: encoder.v , 12 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder.v , 12 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder.v , 12 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder.v , 12 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: encoder.v , 12 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder.v , 12 | |
| Text: binary_out ... | |
| enterModule_item | |
| File: encoder.v , 13 | |
| Text: input enable ; ... | |
| enterPort_declaration | |
| File: encoder.v , 13 | |
| Text: input enable ... | |
| enterInput_declaration | |
| File: encoder.v , 13 | |
| Text: input enable ... | |
| enterNet_port_type | |
| File: encoder.v , 13 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: encoder.v , 13 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: encoder.v , 13 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder.v , 13 | |
| Text: enable ... | |
| enterModule_item | |
| File: encoder.v , 14 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterPort_declaration | |
| File: encoder.v , 14 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterInput_declaration | |
| File: encoder.v , 14 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterNet_port_type | |
| File: encoder.v , 14 | |
| Text: [ 15 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: encoder.v , 14 | |
| Text: [ 15 : 0 ] ... | |
| enterPacked_dimension | |
| File: encoder.v , 14 | |
| Text: [ 15 : 0 ] ... | |
| enterConstant_range | |
| File: encoder.v , 14 | |
| Text: 15 : 0 ... | |
| enterConstant_expression | |
| File: encoder.v , 14 | |
| Text: 15 ... | |
| enterConstant_primary | |
| File: encoder.v , 14 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: encoder.v , 14 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: encoder.v , 14 | |
| Text: 15 ... | |
| enterConstant_expression | |
| File: encoder.v , 14 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder.v , 14 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder.v , 14 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder.v , 14 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: encoder.v , 14 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder.v , 14 | |
| Text: encoder_in ... | |
| enterModule_item | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterNon_port_module_item | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_or_generate_item | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_common_item | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_or_generate_item_declaration | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterPackage_or_generate_item_declaration | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterData_declaration | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterVariable_declaration | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterData_type | |
| File: encoder.v , 17 | |
| Text: reg [ 3 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: encoder.v , 17 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: encoder.v , 17 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: encoder.v , 17 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: encoder.v , 17 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: encoder.v , 17 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder.v , 17 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder.v , 17 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: encoder.v , 17 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder.v , 17 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder.v , 17 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder.v , 17 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: encoder.v , 17 | |
| Text: binary_out ... | |
| enterVariable_decl_assignment | |
| File: encoder.v , 17 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder.v , 17 | |
| Text: binary_out ... | |
| enterModule_item | |
| File: encoder.v , 19 | |
| Text: always @ ( enable or ... | |
| enterNon_port_module_item | |
| File: encoder.v , 19 | |
| Text: always @ ( enable or ... | |
| enterModule_or_generate_item | |
| File: encoder.v , 19 | |
| Text: always @ ( enable or ... | |
| enterModule_common_item | |
| File: encoder.v , 19 | |
| Text: always @ ( enable or ... | |
| enterAlways_construct | |
| File: encoder.v , 19 | |
| Text: always @ ( enable or ... | |
| enterAlwaysKeywd_Always | |
| File: encoder.v , 19 | |
| Text: always ... | |
| enterStatement | |
| File: encoder.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterStatement_item | |
| File: encoder.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterProcedural_timing_control_statement | |
| File: encoder.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterProcedural_timing_control | |
| File: encoder.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterEvent_control | |
| File: encoder.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterEvent_expression | |
| File: encoder.v , 19 | |
| Text: enable or encoder_in ... | |
| enterEvent_expression | |
| File: encoder.v , 19 | |
| Text: enable ... | |
| enterExpression | |
| File: encoder.v , 19 | |
| Text: enable ... | |
| enterPrimary | |
| File: encoder.v , 19 | |
| Text: enable ... | |
| enterPrimary_literal | |
| File: encoder.v , 19 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder.v , 19 | |
| Text: enable ... | |
| enterEvent_expression | |
| File: encoder.v , 19 | |
| Text: encoder_in ... | |
| enterExpression | |
| File: encoder.v , 19 | |
| Text: encoder_in ... | |
| enterPrimary | |
| File: encoder.v , 19 | |
| Text: encoder_in ... | |
| enterPrimary_literal | |
| File: encoder.v , 19 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder.v , 19 | |
| Text: encoder_in ... | |
| enterStatement_or_null | |
| File: encoder.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement | |
| File: encoder.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement_item | |
| File: encoder.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterSeq_block | |
| File: encoder.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement_or_null | |
| File: encoder.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterStatement | |
| File: encoder.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterStatement_item | |
| File: encoder.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 21 | |
| Text: binary_out = 0 ... | |
| enterOperator_assignment | |
| File: encoder.v , 21 | |
| Text: binary_out = 0 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 21 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 21 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 21 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 21 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 21 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 21 | |
| Text: 0 ... | |
| enterPrimary | |
| File: encoder.v , 21 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder.v , 21 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder.v , 21 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: encoder.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterStatement | |
| File: encoder.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterStatement_item | |
| File: encoder.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterConditional_statement | |
| File: encoder.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterCond_predicate | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterExpression_or_cond_pattern | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterExpression | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterPrimary | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterPrimary_literal | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder.v , 22 | |
| Text: enable ... | |
| enterStatement_or_null | |
| File: encoder.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement | |
| File: encoder.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement_item | |
| File: encoder.v , 22 | |
| Text: begin case ( encoder ... | |
| enterSeq_block | |
| File: encoder.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement_or_null | |
| File: encoder.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterStatement | |
| File: encoder.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterStatement_item | |
| File: encoder.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterCase_statement | |
| File: encoder.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterCaseKeyword_Case | |
| File: encoder.v , 23 | |
| Text: case ... | |
| enterExpression | |
| File: encoder.v , 23 | |
| Text: encoder_in ... | |
| enterPrimary | |
| File: encoder.v , 23 | |
| Text: encoder_in ... | |
| enterPrimary_literal | |
| File: encoder.v , 23 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder.v , 23 | |
| Text: encoder_in ... | |
| enterCase_item | |
| File: encoder.v , 24 | |
| Text: 16'h0002 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 24 | |
| Text: 16'h0002 ... | |
| enterPrimary | |
| File: encoder.v , 24 | |
| Text: 16'h0002 ... | |
| enterPrimary_literal | |
| File: encoder.v , 24 | |
| Text: 16'h0002 ... | |
| enterNumber_Integral | |
| File: encoder.v , 24 | |
| Text: 16'h0002 ... | |
| enterStatement_or_null | |
| File: encoder.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterStatement | |
| File: encoder.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterStatement_item | |
| File: encoder.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 24 | |
| Text: binary_out = 1 ... | |
| enterOperator_assignment | |
| File: encoder.v , 24 | |
| Text: binary_out = 1 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 24 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 24 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 24 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 24 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 24 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 24 | |
| Text: 1 ... | |
| enterPrimary | |
| File: encoder.v , 24 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: encoder.v , 24 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: encoder.v , 24 | |
| Text: 1 ... | |
| enterCase_item | |
| File: encoder.v , 25 | |
| Text: 16'h0004 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 25 | |
| Text: 16'h0004 ... | |
| enterPrimary | |
| File: encoder.v , 25 | |
| Text: 16'h0004 ... | |
| enterPrimary_literal | |
| File: encoder.v , 25 | |
| Text: 16'h0004 ... | |
| enterNumber_Integral | |
| File: encoder.v , 25 | |
| Text: 16'h0004 ... | |
| enterStatement_or_null | |
| File: encoder.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterStatement | |
| File: encoder.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterStatement_item | |
| File: encoder.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 25 | |
| Text: binary_out = 2 ... | |
| enterOperator_assignment | |
| File: encoder.v , 25 | |
| Text: binary_out = 2 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 25 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 25 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 25 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 25 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 25 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 25 | |
| Text: 2 ... | |
| enterPrimary | |
| File: encoder.v , 25 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: encoder.v , 25 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: encoder.v , 25 | |
| Text: 2 ... | |
| enterCase_item | |
| File: encoder.v , 26 | |
| Text: 16'h0008 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 26 | |
| Text: 16'h0008 ... | |
| enterPrimary | |
| File: encoder.v , 26 | |
| Text: 16'h0008 ... | |
| enterPrimary_literal | |
| File: encoder.v , 26 | |
| Text: 16'h0008 ... | |
| enterNumber_Integral | |
| File: encoder.v , 26 | |
| Text: 16'h0008 ... | |
| enterStatement_or_null | |
| File: encoder.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterStatement | |
| File: encoder.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterStatement_item | |
| File: encoder.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 26 | |
| Text: binary_out = 3 ... | |
| enterOperator_assignment | |
| File: encoder.v , 26 | |
| Text: binary_out = 3 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 26 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 26 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 26 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 26 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 26 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 26 | |
| Text: 3 ... | |
| enterPrimary | |
| File: encoder.v , 26 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder.v , 26 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder.v , 26 | |
| Text: 3 ... | |
| enterCase_item | |
| File: encoder.v , 27 | |
| Text: 16'h0010 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 27 | |
| Text: 16'h0010 ... | |
| enterPrimary | |
| File: encoder.v , 27 | |
| Text: 16'h0010 ... | |
| enterPrimary_literal | |
| File: encoder.v , 27 | |
| Text: 16'h0010 ... | |
| enterNumber_Integral | |
| File: encoder.v , 27 | |
| Text: 16'h0010 ... | |
| enterStatement_or_null | |
| File: encoder.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterStatement | |
| File: encoder.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterStatement_item | |
| File: encoder.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 27 | |
| Text: binary_out = 4 ... | |
| enterOperator_assignment | |
| File: encoder.v , 27 | |
| Text: binary_out = 4 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 27 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 27 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 27 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 27 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 27 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 27 | |
| Text: 4 ... | |
| enterPrimary | |
| File: encoder.v , 27 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: encoder.v , 27 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: encoder.v , 27 | |
| Text: 4 ... | |
| enterCase_item | |
| File: encoder.v , 28 | |
| Text: 16'h0020 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 28 | |
| Text: 16'h0020 ... | |
| enterPrimary | |
| File: encoder.v , 28 | |
| Text: 16'h0020 ... | |
| enterPrimary_literal | |
| File: encoder.v , 28 | |
| Text: 16'h0020 ... | |
| enterNumber_Integral | |
| File: encoder.v , 28 | |
| Text: 16'h0020 ... | |
| enterStatement_or_null | |
| File: encoder.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterStatement | |
| File: encoder.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterStatement_item | |
| File: encoder.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 28 | |
| Text: binary_out = 5 ... | |
| enterOperator_assignment | |
| File: encoder.v , 28 | |
| Text: binary_out = 5 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 28 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 28 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 28 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 28 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 28 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 28 | |
| Text: 5 ... | |
| enterPrimary | |
| File: encoder.v , 28 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: encoder.v , 28 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: encoder.v , 28 | |
| Text: 5 ... | |
| enterCase_item | |
| File: encoder.v , 29 | |
| Text: 16'h0040 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 29 | |
| Text: 16'h0040 ... | |
| enterPrimary | |
| File: encoder.v , 29 | |
| Text: 16'h0040 ... | |
| enterPrimary_literal | |
| File: encoder.v , 29 | |
| Text: 16'h0040 ... | |
| enterNumber_Integral | |
| File: encoder.v , 29 | |
| Text: 16'h0040 ... | |
| enterStatement_or_null | |
| File: encoder.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterStatement | |
| File: encoder.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterStatement_item | |
| File: encoder.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 29 | |
| Text: binary_out = 6 ... | |
| enterOperator_assignment | |
| File: encoder.v , 29 | |
| Text: binary_out = 6 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 29 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 29 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 29 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 29 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 29 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 29 | |
| Text: 6 ... | |
| enterPrimary | |
| File: encoder.v , 29 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: encoder.v , 29 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: encoder.v , 29 | |
| Text: 6 ... | |
| enterCase_item | |
| File: encoder.v , 30 | |
| Text: 16'h0080 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 30 | |
| Text: 16'h0080 ... | |
| enterPrimary | |
| File: encoder.v , 30 | |
| Text: 16'h0080 ... | |
| enterPrimary_literal | |
| File: encoder.v , 30 | |
| Text: 16'h0080 ... | |
| enterNumber_Integral | |
| File: encoder.v , 30 | |
| Text: 16'h0080 ... | |
| enterStatement_or_null | |
| File: encoder.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterStatement | |
| File: encoder.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterStatement_item | |
| File: encoder.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 30 | |
| Text: binary_out = 7 ... | |
| enterOperator_assignment | |
| File: encoder.v , 30 | |
| Text: binary_out = 7 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 30 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 30 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 30 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 30 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 30 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 30 | |
| Text: 7 ... | |
| enterPrimary | |
| File: encoder.v , 30 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: encoder.v , 30 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: encoder.v , 30 | |
| Text: 7 ... | |
| enterCase_item | |
| File: encoder.v , 31 | |
| Text: 16'h0100 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 31 | |
| Text: 16'h0100 ... | |
| enterPrimary | |
| File: encoder.v , 31 | |
| Text: 16'h0100 ... | |
| enterPrimary_literal | |
| File: encoder.v , 31 | |
| Text: 16'h0100 ... | |
| enterNumber_Integral | |
| File: encoder.v , 31 | |
| Text: 16'h0100 ... | |
| enterStatement_or_null | |
| File: encoder.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterStatement | |
| File: encoder.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterStatement_item | |
| File: encoder.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 31 | |
| Text: binary_out = 8 ... | |
| enterOperator_assignment | |
| File: encoder.v , 31 | |
| Text: binary_out = 8 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 31 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 31 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 31 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 31 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 31 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 31 | |
| Text: 8 ... | |
| enterPrimary | |
| File: encoder.v , 31 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: encoder.v , 31 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: encoder.v , 31 | |
| Text: 8 ... | |
| enterCase_item | |
| File: encoder.v , 32 | |
| Text: 16'h0200 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 32 | |
| Text: 16'h0200 ... | |
| enterPrimary | |
| File: encoder.v , 32 | |
| Text: 16'h0200 ... | |
| enterPrimary_literal | |
| File: encoder.v , 32 | |
| Text: 16'h0200 ... | |
| enterNumber_Integral | |
| File: encoder.v , 32 | |
| Text: 16'h0200 ... | |
| enterStatement_or_null | |
| File: encoder.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterStatement | |
| File: encoder.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterStatement_item | |
| File: encoder.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 32 | |
| Text: binary_out = 9 ... | |
| enterOperator_assignment | |
| File: encoder.v , 32 | |
| Text: binary_out = 9 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 32 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 32 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 32 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 32 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 32 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 32 | |
| Text: 9 ... | |
| enterPrimary | |
| File: encoder.v , 32 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: encoder.v , 32 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: encoder.v , 32 | |
| Text: 9 ... | |
| enterCase_item | |
| File: encoder.v , 33 | |
| Text: 16'h0400 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 33 | |
| Text: 16'h0400 ... | |
| enterPrimary | |
| File: encoder.v , 33 | |
| Text: 16'h0400 ... | |
| enterPrimary_literal | |
| File: encoder.v , 33 | |
| Text: 16'h0400 ... | |
| enterNumber_Integral | |
| File: encoder.v , 33 | |
| Text: 16'h0400 ... | |
| enterStatement_or_null | |
| File: encoder.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterStatement | |
| File: encoder.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterStatement_item | |
| File: encoder.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 33 | |
| Text: binary_out = 10 ... | |
| enterOperator_assignment | |
| File: encoder.v , 33 | |
| Text: binary_out = 10 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 33 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 33 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 33 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 33 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 33 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 33 | |
| Text: 10 ... | |
| enterPrimary | |
| File: encoder.v , 33 | |
| Text: 10 ... | |
| enterPrimary_literal | |
| File: encoder.v , 33 | |
| Text: 10 ... | |
| enterNumber_Integral | |
| File: encoder.v , 33 | |
| Text: 10 ... | |
| enterCase_item | |
| File: encoder.v , 34 | |
| Text: 16'h0800 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 34 | |
| Text: 16'h0800 ... | |
| enterPrimary | |
| File: encoder.v , 34 | |
| Text: 16'h0800 ... | |
| enterPrimary_literal | |
| File: encoder.v , 34 | |
| Text: 16'h0800 ... | |
| enterNumber_Integral | |
| File: encoder.v , 34 | |
| Text: 16'h0800 ... | |
| enterStatement_or_null | |
| File: encoder.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterStatement | |
| File: encoder.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterStatement_item | |
| File: encoder.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 34 | |
| Text: binary_out = 11 ... | |
| enterOperator_assignment | |
| File: encoder.v , 34 | |
| Text: binary_out = 11 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 34 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 34 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 34 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 34 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 34 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 34 | |
| Text: 11 ... | |
| enterPrimary | |
| File: encoder.v , 34 | |
| Text: 11 ... | |
| enterPrimary_literal | |
| File: encoder.v , 34 | |
| Text: 11 ... | |
| enterNumber_Integral | |
| File: encoder.v , 34 | |
| Text: 11 ... | |
| enterCase_item | |
| File: encoder.v , 35 | |
| Text: 16'h1000 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 35 | |
| Text: 16'h1000 ... | |
| enterPrimary | |
| File: encoder.v , 35 | |
| Text: 16'h1000 ... | |
| enterPrimary_literal | |
| File: encoder.v , 35 | |
| Text: 16'h1000 ... | |
| enterNumber_Integral | |
| File: encoder.v , 35 | |
| Text: 16'h1000 ... | |
| enterStatement_or_null | |
| File: encoder.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterStatement | |
| File: encoder.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterStatement_item | |
| File: encoder.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 35 | |
| Text: binary_out = 12 ... | |
| enterOperator_assignment | |
| File: encoder.v , 35 | |
| Text: binary_out = 12 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 35 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 35 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 35 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 35 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 35 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 35 | |
| Text: 12 ... | |
| enterPrimary | |
| File: encoder.v , 35 | |
| Text: 12 ... | |
| enterPrimary_literal | |
| File: encoder.v , 35 | |
| Text: 12 ... | |
| enterNumber_Integral | |
| File: encoder.v , 35 | |
| Text: 12 ... | |
| enterCase_item | |
| File: encoder.v , 36 | |
| Text: 16'h2000 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 36 | |
| Text: 16'h2000 ... | |
| enterPrimary | |
| File: encoder.v , 36 | |
| Text: 16'h2000 ... | |
| enterPrimary_literal | |
| File: encoder.v , 36 | |
| Text: 16'h2000 ... | |
| enterNumber_Integral | |
| File: encoder.v , 36 | |
| Text: 16'h2000 ... | |
| enterStatement_or_null | |
| File: encoder.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterStatement | |
| File: encoder.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterStatement_item | |
| File: encoder.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 36 | |
| Text: binary_out = 13 ... | |
| enterOperator_assignment | |
| File: encoder.v , 36 | |
| Text: binary_out = 13 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 36 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 36 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 36 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 36 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 36 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 36 | |
| Text: 13 ... | |
| enterPrimary | |
| File: encoder.v , 36 | |
| Text: 13 ... | |
| enterPrimary_literal | |
| File: encoder.v , 36 | |
| Text: 13 ... | |
| enterNumber_Integral | |
| File: encoder.v , 36 | |
| Text: 13 ... | |
| enterCase_item | |
| File: encoder.v , 37 | |
| Text: 16'h4000 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 37 | |
| Text: 16'h4000 ... | |
| enterPrimary | |
| File: encoder.v , 37 | |
| Text: 16'h4000 ... | |
| enterPrimary_literal | |
| File: encoder.v , 37 | |
| Text: 16'h4000 ... | |
| enterNumber_Integral | |
| File: encoder.v , 37 | |
| Text: 16'h4000 ... | |
| enterStatement_or_null | |
| File: encoder.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterStatement | |
| File: encoder.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterStatement_item | |
| File: encoder.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 37 | |
| Text: binary_out = 14 ... | |
| enterOperator_assignment | |
| File: encoder.v , 37 | |
| Text: binary_out = 14 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 37 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 37 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 37 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 37 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 37 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 37 | |
| Text: 14 ... | |
| enterPrimary | |
| File: encoder.v , 37 | |
| Text: 14 ... | |
| enterPrimary_literal | |
| File: encoder.v , 37 | |
| Text: 14 ... | |
| enterNumber_Integral | |
| File: encoder.v , 37 | |
| Text: 14 ... | |
| enterCase_item | |
| File: encoder.v , 38 | |
| Text: 16'h8000 : binary_ou ... | |
| enterExpression | |
| File: encoder.v , 38 | |
| Text: 16'h8000 ... | |
| enterPrimary | |
| File: encoder.v , 38 | |
| Text: 16'h8000 ... | |
| enterPrimary_literal | |
| File: encoder.v , 38 | |
| Text: 16'h8000 ... | |
| enterNumber_Integral | |
| File: encoder.v , 38 | |
| Text: 16'h8000 ... | |
| enterStatement_or_null | |
| File: encoder.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterStatement | |
| File: encoder.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterStatement_item | |
| File: encoder.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterBlocking_assignment | |
| File: encoder.v , 38 | |
| Text: binary_out = 15 ... | |
| enterOperator_assignment | |
| File: encoder.v , 38 | |
| Text: binary_out = 15 ... | |
| enterVariable_lvalue | |
| File: encoder.v , 38 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder.v , 38 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder.v , 38 | |
| Text: ... | |
| enterBit_select | |
| File: encoder.v , 38 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder.v , 38 | |
| Text: = ... | |
| enterExpression | |
| File: encoder.v , 38 | |
| Text: 15 ... | |
| enterPrimary | |
| File: encoder.v , 38 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: encoder.v , 38 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: encoder.v , 38 | |
| Text: 15 ... | |
| enterEndcase | |
| File: encoder.v , 39 | |
| Text: endcase ... | |
| enterEnd | |
| File: encoder.v , 40 | |
| Text: end ... | |
| enterEnd | |
| File: encoder.v , 41 | |
| Text: end ... | |
| enterEndmodule | |
| File: encoder.v , 43 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "encoder_case.v". | |
| enterTop_level_rule | |
| File: encoder_case.v , 8 | |
| Text: module encoder_using ... | |
| enterNull_rule | |
| File: encoder_case.v , 8 | |
| Text: ... | |
| enterSource_text | |
| File: encoder_case.v , 8 | |
| Text: module encoder_using ... | |
| enterDescription | |
| File: encoder_case.v , 8 | |
| Text: module encoder_using ... | |
| enterModule_declaration | |
| File: encoder_case.v , 8 | |
| Text: module encoder_using ... | |
| enterModule_nonansi_header | |
| File: encoder_case.v , 8 | |
| Text: module encoder_using ... | |
| enterModule_keyword | |
| File: encoder_case.v , 8 | |
| Text: module ... | |
| enterIdentifier | |
| File: encoder_case.v , 8 | |
| Text: encoder_using_case ... | |
| enterList_of_ports | |
| File: encoder_case.v , 8 | |
| Text: ( binary_out , encod ... | |
| enterPort | |
| File: encoder_case.v , 9 | |
| Text: binary_out ... | |
| enterPort_expression | |
| File: encoder_case.v , 9 | |
| Text: binary_out ... | |
| enterPort_reference | |
| File: encoder_case.v , 9 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder_case.v , 9 | |
| Text: binary_out ... | |
| enterConstant_select | |
| File: encoder_case.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder_case.v , 9 | |
| Text: ... | |
| enterPort | |
| File: encoder_case.v , 10 | |
| Text: encoder_in ... | |
| enterPort_expression | |
| File: encoder_case.v , 10 | |
| Text: encoder_in ... | |
| enterPort_reference | |
| File: encoder_case.v , 10 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder_case.v , 10 | |
| Text: encoder_in ... | |
| enterConstant_select | |
| File: encoder_case.v , 10 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder_case.v , 10 | |
| Text: ... | |
| enterPort | |
| File: encoder_case.v , 11 | |
| Text: enable ... | |
| enterPort_expression | |
| File: encoder_case.v , 11 | |
| Text: enable ... | |
| enterPort_reference | |
| File: encoder_case.v , 11 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder_case.v , 11 | |
| Text: enable ... | |
| enterConstant_select | |
| File: encoder_case.v , 12 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: encoder_case.v , 12 | |
| Text: ... | |
| enterModule_item | |
| File: encoder_case.v , 13 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterPort_declaration | |
| File: encoder_case.v , 13 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterOutput_declaration | |
| File: encoder_case.v , 13 | |
| Text: output [ 3 : 0 ] bin ... | |
| enterNet_port_type | |
| File: encoder_case.v , 13 | |
| Text: [ 3 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: encoder_case.v , 13 | |
| Text: [ 3 : 0 ] ... | |
| enterPacked_dimension | |
| File: encoder_case.v , 13 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: encoder_case.v , 13 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 13 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 13 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 13 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 13 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 13 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 13 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 13 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 13 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: encoder_case.v , 13 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder_case.v , 13 | |
| Text: binary_out ... | |
| enterModule_item | |
| File: encoder_case.v , 14 | |
| Text: input enable ; ... | |
| enterPort_declaration | |
| File: encoder_case.v , 14 | |
| Text: input enable ... | |
| enterInput_declaration | |
| File: encoder_case.v , 14 | |
| Text: input enable ... | |
| enterNet_port_type | |
| File: encoder_case.v , 14 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: encoder_case.v , 14 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: encoder_case.v , 14 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder_case.v , 14 | |
| Text: enable ... | |
| enterModule_item | |
| File: encoder_case.v , 15 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterPort_declaration | |
| File: encoder_case.v , 15 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterInput_declaration | |
| File: encoder_case.v , 15 | |
| Text: input [ 15 : 0 ] enc ... | |
| enterNet_port_type | |
| File: encoder_case.v , 15 | |
| Text: [ 15 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: encoder_case.v , 15 | |
| Text: [ 15 : 0 ] ... | |
| enterPacked_dimension | |
| File: encoder_case.v , 15 | |
| Text: [ 15 : 0 ] ... | |
| enterConstant_range | |
| File: encoder_case.v , 15 | |
| Text: 15 : 0 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 15 | |
| Text: 15 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 15 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 15 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 15 | |
| Text: 15 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 15 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 15 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 15 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 15 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: encoder_case.v , 15 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder_case.v , 15 | |
| Text: encoder_in ... | |
| enterModule_item | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterNon_port_module_item | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_or_generate_item | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_common_item | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterModule_or_generate_item_declaration | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterPackage_or_generate_item_declaration | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterData_declaration | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterVariable_declaration | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] binary ... | |
| enterData_type | |
| File: encoder_case.v , 17 | |
| Text: reg [ 3 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: encoder_case.v , 17 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: encoder_case.v , 17 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: encoder_case.v , 17 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 17 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 17 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 17 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 17 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: encoder_case.v , 17 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: encoder_case.v , 17 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 17 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 17 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: encoder_case.v , 17 | |
| Text: binary_out ... | |
| enterVariable_decl_assignment | |
| File: encoder_case.v , 17 | |
| Text: binary_out ... | |
| enterIdentifier | |
| File: encoder_case.v , 17 | |
| Text: binary_out ... | |
| enterModule_item | |
| File: encoder_case.v , 19 | |
| Text: always @ ( enable or ... | |
| enterNon_port_module_item | |
| File: encoder_case.v , 19 | |
| Text: always @ ( enable or ... | |
| enterModule_or_generate_item | |
| File: encoder_case.v , 19 | |
| Text: always @ ( enable or ... | |
| enterModule_common_item | |
| File: encoder_case.v , 19 | |
| Text: always @ ( enable or ... | |
| enterAlways_construct | |
| File: encoder_case.v , 19 | |
| Text: always @ ( enable or ... | |
| enterAlwaysKeywd_Always | |
| File: encoder_case.v , 19 | |
| Text: always ... | |
| enterStatement | |
| File: encoder_case.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterStatement_item | |
| File: encoder_case.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterProcedural_timing_control_statement | |
| File: encoder_case.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterProcedural_timing_control | |
| File: encoder_case.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterEvent_control | |
| File: encoder_case.v , 19 | |
| Text: @ ( enable or encode ... | |
| enterEvent_expression | |
| File: encoder_case.v , 19 | |
| Text: enable or encoder_in ... | |
| enterEvent_expression | |
| File: encoder_case.v , 19 | |
| Text: enable ... | |
| enterExpression | |
| File: encoder_case.v , 19 | |
| Text: enable ... | |
| enterPrimary | |
| File: encoder_case.v , 19 | |
| Text: enable ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 19 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder_case.v , 19 | |
| Text: enable ... | |
| enterEvent_expression | |
| File: encoder_case.v , 19 | |
| Text: encoder_in ... | |
| enterExpression | |
| File: encoder_case.v , 19 | |
| Text: encoder_in ... | |
| enterPrimary | |
| File: encoder_case.v , 19 | |
| Text: encoder_in ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 19 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder_case.v , 19 | |
| Text: encoder_in ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement | |
| File: encoder_case.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement_item | |
| File: encoder_case.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterSeq_block | |
| File: encoder_case.v , 20 | |
| Text: begin binary_out = 0 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterStatement | |
| File: encoder_case.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 21 | |
| Text: binary_out = 0 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 21 | |
| Text: binary_out = 0 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 21 | |
| Text: binary_out = 0 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 21 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 21 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 21 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 21 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 21 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 21 | |
| Text: 0 ... | |
| enterPrimary | |
| File: encoder_case.v , 21 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 21 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 21 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterStatement | |
| File: encoder_case.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterStatement_item | |
| File: encoder_case.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterConditional_statement | |
| File: encoder_case.v , 22 | |
| Text: if ( enable ) begin ... | |
| enterCond_predicate | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterExpression_or_cond_pattern | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterExpression | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterPrimary | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterIdentifier | |
| File: encoder_case.v , 22 | |
| Text: enable ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement | |
| File: encoder_case.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement_item | |
| File: encoder_case.v , 22 | |
| Text: begin case ( encoder ... | |
| enterSeq_block | |
| File: encoder_case.v , 22 | |
| Text: begin case ( encoder ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterStatement | |
| File: encoder_case.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterStatement_item | |
| File: encoder_case.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterCase_statement | |
| File: encoder_case.v , 23 | |
| Text: case ( encoder_in ) ... | |
| enterCaseKeyword_Case | |
| File: encoder_case.v , 23 | |
| Text: case ... | |
| enterExpression | |
| File: encoder_case.v , 23 | |
| Text: encoder_in ... | |
| enterPrimary | |
| File: encoder_case.v , 23 | |
| Text: encoder_in ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 23 | |
| Text: encoder_in ... | |
| enterIdentifier | |
| File: encoder_case.v , 23 | |
| Text: encoder_in ... | |
| enterCase_item | |
| File: encoder_case.v , 24 | |
| Text: 16'h0002 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 24 | |
| Text: 16'h0002 ... | |
| enterPrimary | |
| File: encoder_case.v , 24 | |
| Text: 16'h0002 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 24 | |
| Text: 16'h0002 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 24 | |
| Text: 16'h0002 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterStatement | |
| File: encoder_case.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 24 | |
| Text: binary_out = 1 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 24 | |
| Text: binary_out = 1 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 24 | |
| Text: binary_out = 1 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 24 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 24 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 24 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 24 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 24 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 24 | |
| Text: 1 ... | |
| enterPrimary | |
| File: encoder_case.v , 24 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 24 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 24 | |
| Text: 1 ... | |
| enterCase_item | |
| File: encoder_case.v , 25 | |
| Text: 16'h0004 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 25 | |
| Text: 16'h0004 ... | |
| enterPrimary | |
| File: encoder_case.v , 25 | |
| Text: 16'h0004 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 25 | |
| Text: 16'h0004 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 25 | |
| Text: 16'h0004 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterStatement | |
| File: encoder_case.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 25 | |
| Text: binary_out = 2 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 25 | |
| Text: binary_out = 2 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 25 | |
| Text: binary_out = 2 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 25 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 25 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 25 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 25 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 25 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 25 | |
| Text: 2 ... | |
| enterPrimary | |
| File: encoder_case.v , 25 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 25 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 25 | |
| Text: 2 ... | |
| enterCase_item | |
| File: encoder_case.v , 26 | |
| Text: 16'h0008 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 26 | |
| Text: 16'h0008 ... | |
| enterPrimary | |
| File: encoder_case.v , 26 | |
| Text: 16'h0008 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 26 | |
| Text: 16'h0008 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 26 | |
| Text: 16'h0008 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterStatement | |
| File: encoder_case.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 26 | |
| Text: binary_out = 3 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 26 | |
| Text: binary_out = 3 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 26 | |
| Text: binary_out = 3 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 26 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 26 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 26 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 26 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 26 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 26 | |
| Text: 3 ... | |
| enterPrimary | |
| File: encoder_case.v , 26 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 26 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 26 | |
| Text: 3 ... | |
| enterCase_item | |
| File: encoder_case.v , 27 | |
| Text: 16'h0010 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 27 | |
| Text: 16'h0010 ... | |
| enterPrimary | |
| File: encoder_case.v , 27 | |
| Text: 16'h0010 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 27 | |
| Text: 16'h0010 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 27 | |
| Text: 16'h0010 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterStatement | |
| File: encoder_case.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 27 | |
| Text: binary_out = 4 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 27 | |
| Text: binary_out = 4 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 27 | |
| Text: binary_out = 4 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 27 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 27 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 27 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 27 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 27 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 27 | |
| Text: 4 ... | |
| enterPrimary | |
| File: encoder_case.v , 27 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 27 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 27 | |
| Text: 4 ... | |
| enterCase_item | |
| File: encoder_case.v , 28 | |
| Text: 16'h0020 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 28 | |
| Text: 16'h0020 ... | |
| enterPrimary | |
| File: encoder_case.v , 28 | |
| Text: 16'h0020 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 28 | |
| Text: 16'h0020 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 28 | |
| Text: 16'h0020 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterStatement | |
| File: encoder_case.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 28 | |
| Text: binary_out = 5 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 28 | |
| Text: binary_out = 5 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 28 | |
| Text: binary_out = 5 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 28 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 28 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 28 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 28 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 28 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 28 | |
| Text: 5 ... | |
| enterPrimary | |
| File: encoder_case.v , 28 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 28 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 28 | |
| Text: 5 ... | |
| enterCase_item | |
| File: encoder_case.v , 29 | |
| Text: 16'h0040 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 29 | |
| Text: 16'h0040 ... | |
| enterPrimary | |
| File: encoder_case.v , 29 | |
| Text: 16'h0040 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 29 | |
| Text: 16'h0040 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 29 | |
| Text: 16'h0040 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterStatement | |
| File: encoder_case.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 29 | |
| Text: binary_out = 6 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 29 | |
| Text: binary_out = 6 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 29 | |
| Text: binary_out = 6 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 29 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 29 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 29 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 29 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 29 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 29 | |
| Text: 6 ... | |
| enterPrimary | |
| File: encoder_case.v , 29 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 29 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 29 | |
| Text: 6 ... | |
| enterCase_item | |
| File: encoder_case.v , 30 | |
| Text: 16'h0080 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 30 | |
| Text: 16'h0080 ... | |
| enterPrimary | |
| File: encoder_case.v , 30 | |
| Text: 16'h0080 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 30 | |
| Text: 16'h0080 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 30 | |
| Text: 16'h0080 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterStatement | |
| File: encoder_case.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 30 | |
| Text: binary_out = 7 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 30 | |
| Text: binary_out = 7 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 30 | |
| Text: binary_out = 7 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 30 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 30 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 30 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 30 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 30 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 30 | |
| Text: 7 ... | |
| enterPrimary | |
| File: encoder_case.v , 30 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 30 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 30 | |
| Text: 7 ... | |
| enterCase_item | |
| File: encoder_case.v , 31 | |
| Text: 16'h0100 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 31 | |
| Text: 16'h0100 ... | |
| enterPrimary | |
| File: encoder_case.v , 31 | |
| Text: 16'h0100 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 31 | |
| Text: 16'h0100 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 31 | |
| Text: 16'h0100 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterStatement | |
| File: encoder_case.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 31 | |
| Text: binary_out = 8 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 31 | |
| Text: binary_out = 8 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 31 | |
| Text: binary_out = 8 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 31 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 31 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 31 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 31 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 31 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 31 | |
| Text: 8 ... | |
| enterPrimary | |
| File: encoder_case.v , 31 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 31 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 31 | |
| Text: 8 ... | |
| enterCase_item | |
| File: encoder_case.v , 32 | |
| Text: 16'h0200 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 32 | |
| Text: 16'h0200 ... | |
| enterPrimary | |
| File: encoder_case.v , 32 | |
| Text: 16'h0200 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 32 | |
| Text: 16'h0200 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 32 | |
| Text: 16'h0200 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterStatement | |
| File: encoder_case.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 32 | |
| Text: binary_out = 9 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 32 | |
| Text: binary_out = 9 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 32 | |
| Text: binary_out = 9 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 32 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 32 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 32 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 32 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 32 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 32 | |
| Text: 9 ... | |
| enterPrimary | |
| File: encoder_case.v , 32 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 32 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 32 | |
| Text: 9 ... | |
| enterCase_item | |
| File: encoder_case.v , 33 | |
| Text: 16'h0400 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 33 | |
| Text: 16'h0400 ... | |
| enterPrimary | |
| File: encoder_case.v , 33 | |
| Text: 16'h0400 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 33 | |
| Text: 16'h0400 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 33 | |
| Text: 16'h0400 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterStatement | |
| File: encoder_case.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 33 | |
| Text: binary_out = 10 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 33 | |
| Text: binary_out = 10 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 33 | |
| Text: binary_out = 10 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 33 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 33 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 33 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 33 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 33 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 33 | |
| Text: 10 ... | |
| enterPrimary | |
| File: encoder_case.v , 33 | |
| Text: 10 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 33 | |
| Text: 10 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 33 | |
| Text: 10 ... | |
| enterCase_item | |
| File: encoder_case.v , 34 | |
| Text: 16'h0800 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 34 | |
| Text: 16'h0800 ... | |
| enterPrimary | |
| File: encoder_case.v , 34 | |
| Text: 16'h0800 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 34 | |
| Text: 16'h0800 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 34 | |
| Text: 16'h0800 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterStatement | |
| File: encoder_case.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 34 | |
| Text: binary_out = 11 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 34 | |
| Text: binary_out = 11 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 34 | |
| Text: binary_out = 11 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 34 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 34 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 34 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 34 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 34 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 34 | |
| Text: 11 ... | |
| enterPrimary | |
| File: encoder_case.v , 34 | |
| Text: 11 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 34 | |
| Text: 11 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 34 | |
| Text: 11 ... | |
| enterCase_item | |
| File: encoder_case.v , 35 | |
| Text: 16'h1000 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 35 | |
| Text: 16'h1000 ... | |
| enterPrimary | |
| File: encoder_case.v , 35 | |
| Text: 16'h1000 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 35 | |
| Text: 16'h1000 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 35 | |
| Text: 16'h1000 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterStatement | |
| File: encoder_case.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 35 | |
| Text: binary_out = 12 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 35 | |
| Text: binary_out = 12 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 35 | |
| Text: binary_out = 12 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 35 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 35 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 35 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 35 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 35 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 35 | |
| Text: 12 ... | |
| enterPrimary | |
| File: encoder_case.v , 35 | |
| Text: 12 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 35 | |
| Text: 12 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 35 | |
| Text: 12 ... | |
| enterCase_item | |
| File: encoder_case.v , 36 | |
| Text: 16'h2000 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 36 | |
| Text: 16'h2000 ... | |
| enterPrimary | |
| File: encoder_case.v , 36 | |
| Text: 16'h2000 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 36 | |
| Text: 16'h2000 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 36 | |
| Text: 16'h2000 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterStatement | |
| File: encoder_case.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 36 | |
| Text: binary_out = 13 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 36 | |
| Text: binary_out = 13 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 36 | |
| Text: binary_out = 13 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 36 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 36 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 36 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 36 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 36 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 36 | |
| Text: 13 ... | |
| enterPrimary | |
| File: encoder_case.v , 36 | |
| Text: 13 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 36 | |
| Text: 13 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 36 | |
| Text: 13 ... | |
| enterCase_item | |
| File: encoder_case.v , 37 | |
| Text: 16'h4000 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 37 | |
| Text: 16'h4000 ... | |
| enterPrimary | |
| File: encoder_case.v , 37 | |
| Text: 16'h4000 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 37 | |
| Text: 16'h4000 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 37 | |
| Text: 16'h4000 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterStatement | |
| File: encoder_case.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 37 | |
| Text: binary_out = 14 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 37 | |
| Text: binary_out = 14 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 37 | |
| Text: binary_out = 14 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 37 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 37 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 37 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 37 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 37 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 37 | |
| Text: 14 ... | |
| enterPrimary | |
| File: encoder_case.v , 37 | |
| Text: 14 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 37 | |
| Text: 14 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 37 | |
| Text: 14 ... | |
| enterCase_item | |
| File: encoder_case.v , 38 | |
| Text: 16'h8000 : binary_ou ... | |
| enterExpression | |
| File: encoder_case.v , 38 | |
| Text: 16'h8000 ... | |
| enterPrimary | |
| File: encoder_case.v , 38 | |
| Text: 16'h8000 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 38 | |
| Text: 16'h8000 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 38 | |
| Text: 16'h8000 ... | |
| enterStatement_or_null | |
| File: encoder_case.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterStatement | |
| File: encoder_case.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterStatement_item | |
| File: encoder_case.v , 38 | |
| Text: binary_out = 15 ; ... | |
| enterBlocking_assignment | |
| File: encoder_case.v , 38 | |
| Text: binary_out = 15 ... | |
| enterOperator_assignment | |
| File: encoder_case.v , 38 | |
| Text: binary_out = 15 ... | |
| enterVariable_lvalue | |
| File: encoder_case.v , 38 | |
| Text: binary_out ... | |
| enterHierarchical_identifier | |
| File: encoder_case.v , 38 | |
| Text: binary_out ... | |
| enterSelect | |
| File: encoder_case.v , 38 | |
| Text: ... | |
| enterBit_select | |
| File: encoder_case.v , 38 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: encoder_case.v , 38 | |
| Text: = ... | |
| enterExpression | |
| File: encoder_case.v , 38 | |
| Text: 15 ... | |
| enterPrimary | |
| File: encoder_case.v , 38 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: encoder_case.v , 38 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: encoder_case.v , 38 | |
| Text: 15 ... | |
| enterEndcase | |
| File: encoder_case.v , 39 | |
| Text: endcase ... | |
| enterEnd | |
| File: encoder_case.v , 40 | |
| Text: end ... | |
| enterEnd | |
| File: encoder_case.v , 41 | |
| Text: end ... | |
| enterEndmodule | |
| File: encoder_case.v , 43 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "uart.v". | |
| enterTop_level_rule | |
| File: uart.v , 8 | |
| Text: module uart ( reset ... | |
| enterNull_rule | |
| File: uart.v , 8 | |
| Text: ... | |
| enterSource_text | |
| File: uart.v , 8 | |
| Text: module uart ( reset ... | |
| enterDescription | |
| File: uart.v , 8 | |
| Text: module uart ( reset ... | |
| enterModule_declaration | |
| File: uart.v , 8 | |
| Text: module uart ( reset ... | |
| enterModule_nonansi_header | |
| File: uart.v , 8 | |
| Text: module uart ( reset ... | |
| enterModule_keyword | |
| File: uart.v , 8 | |
| Text: module ... | |
| enterIdentifier | |
| File: uart.v , 8 | |
| Text: uart ... | |
| enterList_of_ports | |
| File: uart.v , 8 | |
| Text: ( reset , txclk , ld ... | |
| enterPort | |
| File: uart.v , 9 | |
| Text: reset ... | |
| enterPort_expression | |
| File: uart.v , 9 | |
| Text: reset ... | |
| enterPort_reference | |
| File: uart.v , 9 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 9 | |
| Text: reset ... | |
| enterConstant_select | |
| File: uart.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 9 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 10 | |
| Text: txclk ... | |
| enterPort_expression | |
| File: uart.v , 10 | |
| Text: txclk ... | |
| enterPort_reference | |
| File: uart.v , 10 | |
| Text: txclk ... | |
| enterIdentifier | |
| File: uart.v , 10 | |
| Text: txclk ... | |
| enterConstant_select | |
| File: uart.v , 10 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 10 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 11 | |
| Text: ld_tx_data ... | |
| enterPort_expression | |
| File: uart.v , 11 | |
| Text: ld_tx_data ... | |
| enterPort_reference | |
| File: uart.v , 11 | |
| Text: ld_tx_data ... | |
| enterIdentifier | |
| File: uart.v , 11 | |
| Text: ld_tx_data ... | |
| enterConstant_select | |
| File: uart.v , 11 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 11 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 12 | |
| Text: tx_data ... | |
| enterPort_expression | |
| File: uart.v , 12 | |
| Text: tx_data ... | |
| enterPort_reference | |
| File: uart.v , 12 | |
| Text: tx_data ... | |
| enterIdentifier | |
| File: uart.v , 12 | |
| Text: tx_data ... | |
| enterConstant_select | |
| File: uart.v , 12 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 12 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 13 | |
| Text: tx_enable ... | |
| enterPort_expression | |
| File: uart.v , 13 | |
| Text: tx_enable ... | |
| enterPort_reference | |
| File: uart.v , 13 | |
| Text: tx_enable ... | |
| enterIdentifier | |
| File: uart.v , 13 | |
| Text: tx_enable ... | |
| enterConstant_select | |
| File: uart.v , 13 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 13 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 14 | |
| Text: tx_out ... | |
| enterPort_expression | |
| File: uart.v , 14 | |
| Text: tx_out ... | |
| enterPort_reference | |
| File: uart.v , 14 | |
| Text: tx_out ... | |
| enterIdentifier | |
| File: uart.v , 14 | |
| Text: tx_out ... | |
| enterConstant_select | |
| File: uart.v , 14 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 14 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 15 | |
| Text: tx_empty ... | |
| enterPort_expression | |
| File: uart.v , 15 | |
| Text: tx_empty ... | |
| enterPort_reference | |
| File: uart.v , 15 | |
| Text: tx_empty ... | |
| enterIdentifier | |
| File: uart.v , 15 | |
| Text: tx_empty ... | |
| enterConstant_select | |
| File: uart.v , 15 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 15 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 16 | |
| Text: rxclk ... | |
| enterPort_expression | |
| File: uart.v , 16 | |
| Text: rxclk ... | |
| enterPort_reference | |
| File: uart.v , 16 | |
| Text: rxclk ... | |
| enterIdentifier | |
| File: uart.v , 16 | |
| Text: rxclk ... | |
| enterConstant_select | |
| File: uart.v , 16 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 16 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 17 | |
| Text: uld_rx_data ... | |
| enterPort_expression | |
| File: uart.v , 17 | |
| Text: uld_rx_data ... | |
| enterPort_reference | |
| File: uart.v , 17 | |
| Text: uld_rx_data ... | |
| enterIdentifier | |
| File: uart.v , 17 | |
| Text: uld_rx_data ... | |
| enterConstant_select | |
| File: uart.v , 17 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 17 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 18 | |
| Text: rx_data ... | |
| enterPort_expression | |
| File: uart.v , 18 | |
| Text: rx_data ... | |
| enterPort_reference | |
| File: uart.v , 18 | |
| Text: rx_data ... | |
| enterIdentifier | |
| File: uart.v , 18 | |
| Text: rx_data ... | |
| enterConstant_select | |
| File: uart.v , 18 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 18 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 19 | |
| Text: rx_enable ... | |
| enterPort_expression | |
| File: uart.v , 19 | |
| Text: rx_enable ... | |
| enterPort_reference | |
| File: uart.v , 19 | |
| Text: rx_enable ... | |
| enterIdentifier | |
| File: uart.v , 19 | |
| Text: rx_enable ... | |
| enterConstant_select | |
| File: uart.v , 19 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 19 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 20 | |
| Text: rx_in ... | |
| enterPort_expression | |
| File: uart.v , 20 | |
| Text: rx_in ... | |
| enterPort_reference | |
| File: uart.v , 20 | |
| Text: rx_in ... | |
| enterIdentifier | |
| File: uart.v , 20 | |
| Text: rx_in ... | |
| enterConstant_select | |
| File: uart.v , 20 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 20 | |
| Text: ... | |
| enterPort | |
| File: uart.v , 21 | |
| Text: rx_empty ... | |
| enterPort_expression | |
| File: uart.v , 21 | |
| Text: rx_empty ... | |
| enterPort_reference | |
| File: uart.v , 21 | |
| Text: rx_empty ... | |
| enterIdentifier | |
| File: uart.v , 21 | |
| Text: rx_empty ... | |
| enterConstant_select | |
| File: uart.v , 22 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: uart.v , 22 | |
| Text: ... | |
| enterModule_item | |
| File: uart.v , 24 | |
| Text: input reset ; ... | |
| enterPort_declaration | |
| File: uart.v , 24 | |
| Text: input reset ... | |
| enterInput_declaration | |
| File: uart.v , 24 | |
| Text: input reset ... | |
| enterNet_port_type | |
| File: uart.v , 24 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 24 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 24 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 24 | |
| Text: reset ... | |
| enterModule_item | |
| File: uart.v , 25 | |
| Text: input txclk ; ... | |
| enterPort_declaration | |
| File: uart.v , 25 | |
| Text: input txclk ... | |
| enterInput_declaration | |
| File: uart.v , 25 | |
| Text: input txclk ... | |
| enterNet_port_type | |
| File: uart.v , 25 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 25 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 25 | |
| Text: txclk ... | |
| enterIdentifier | |
| File: uart.v , 25 | |
| Text: txclk ... | |
| enterModule_item | |
| File: uart.v , 26 | |
| Text: input ld_tx_data ; ... | |
| enterPort_declaration | |
| File: uart.v , 26 | |
| Text: input ld_tx_data ... | |
| enterInput_declaration | |
| File: uart.v , 26 | |
| Text: input ld_tx_data ... | |
| enterNet_port_type | |
| File: uart.v , 26 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 26 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 26 | |
| Text: ld_tx_data ... | |
| enterIdentifier | |
| File: uart.v , 26 | |
| Text: ld_tx_data ... | |
| enterModule_item | |
| File: uart.v , 27 | |
| Text: input [ 7 : 0 ] tx_d ... | |
| enterPort_declaration | |
| File: uart.v , 27 | |
| Text: input [ 7 : 0 ] tx_d ... | |
| enterInput_declaration | |
| File: uart.v , 27 | |
| Text: input [ 7 : 0 ] tx_d ... | |
| enterNet_port_type | |
| File: uart.v , 27 | |
| Text: [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: uart.v , 27 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: uart.v , 27 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 27 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 27 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: uart.v , 27 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 27 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 27 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: uart.v , 27 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 27 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 27 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 27 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 27 | |
| Text: tx_data ... | |
| enterIdentifier | |
| File: uart.v , 27 | |
| Text: tx_data ... | |
| enterModule_item | |
| File: uart.v , 28 | |
| Text: input tx_enable ; ... | |
| enterPort_declaration | |
| File: uart.v , 28 | |
| Text: input tx_enable ... | |
| enterInput_declaration | |
| File: uart.v , 28 | |
| Text: input tx_enable ... | |
| enterNet_port_type | |
| File: uart.v , 28 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 28 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 28 | |
| Text: tx_enable ... | |
| enterIdentifier | |
| File: uart.v , 28 | |
| Text: tx_enable ... | |
| enterModule_item | |
| File: uart.v , 29 | |
| Text: output tx_out ; ... | |
| enterPort_declaration | |
| File: uart.v , 29 | |
| Text: output tx_out ... | |
| enterOutput_declaration | |
| File: uart.v , 29 | |
| Text: output tx_out ... | |
| enterNet_port_type | |
| File: uart.v , 29 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 29 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 29 | |
| Text: tx_out ... | |
| enterIdentifier | |
| File: uart.v , 29 | |
| Text: tx_out ... | |
| enterModule_item | |
| File: uart.v , 30 | |
| Text: output tx_empty ; ... | |
| enterPort_declaration | |
| File: uart.v , 30 | |
| Text: output tx_empty ... | |
| enterOutput_declaration | |
| File: uart.v , 30 | |
| Text: output tx_empty ... | |
| enterNet_port_type | |
| File: uart.v , 30 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 30 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 30 | |
| Text: tx_empty ... | |
| enterIdentifier | |
| File: uart.v , 30 | |
| Text: tx_empty ... | |
| enterModule_item | |
| File: uart.v , 31 | |
| Text: input rxclk ; ... | |
| enterPort_declaration | |
| File: uart.v , 31 | |
| Text: input rxclk ... | |
| enterInput_declaration | |
| File: uart.v , 31 | |
| Text: input rxclk ... | |
| enterNet_port_type | |
| File: uart.v , 31 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 31 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 31 | |
| Text: rxclk ... | |
| enterIdentifier | |
| File: uart.v , 31 | |
| Text: rxclk ... | |
| enterModule_item | |
| File: uart.v , 32 | |
| Text: input uld_rx_data ; ... | |
| enterPort_declaration | |
| File: uart.v , 32 | |
| Text: input uld_rx_data ... | |
| enterInput_declaration | |
| File: uart.v , 32 | |
| Text: input uld_rx_data ... | |
| enterNet_port_type | |
| File: uart.v , 32 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 32 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 32 | |
| Text: uld_rx_data ... | |
| enterIdentifier | |
| File: uart.v , 32 | |
| Text: uld_rx_data ... | |
| enterModule_item | |
| File: uart.v , 33 | |
| Text: output [ 7 : 0 ] rx_ ... | |
| enterPort_declaration | |
| File: uart.v , 33 | |
| Text: output [ 7 : 0 ] rx_ ... | |
| enterOutput_declaration | |
| File: uart.v , 33 | |
| Text: output [ 7 : 0 ] rx_ ... | |
| enterNet_port_type | |
| File: uart.v , 33 | |
| Text: [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: uart.v , 33 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: uart.v , 33 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 33 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 33 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: uart.v , 33 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 33 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 33 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: uart.v , 33 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 33 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 33 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 33 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 33 | |
| Text: rx_data ... | |
| enterIdentifier | |
| File: uart.v , 33 | |
| Text: rx_data ... | |
| enterModule_item | |
| File: uart.v , 34 | |
| Text: input rx_enable ; ... | |
| enterPort_declaration | |
| File: uart.v , 34 | |
| Text: input rx_enable ... | |
| enterInput_declaration | |
| File: uart.v , 34 | |
| Text: input rx_enable ... | |
| enterNet_port_type | |
| File: uart.v , 34 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 34 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 34 | |
| Text: rx_enable ... | |
| enterIdentifier | |
| File: uart.v , 34 | |
| Text: rx_enable ... | |
| enterModule_item | |
| File: uart.v , 35 | |
| Text: input rx_in ; ... | |
| enterPort_declaration | |
| File: uart.v , 35 | |
| Text: input rx_in ... | |
| enterInput_declaration | |
| File: uart.v , 35 | |
| Text: input rx_in ... | |
| enterNet_port_type | |
| File: uart.v , 35 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 35 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 35 | |
| Text: rx_in ... | |
| enterIdentifier | |
| File: uart.v , 35 | |
| Text: rx_in ... | |
| enterModule_item | |
| File: uart.v , 36 | |
| Text: output rx_empty ; ... | |
| enterPort_declaration | |
| File: uart.v , 36 | |
| Text: output rx_empty ... | |
| enterOutput_declaration | |
| File: uart.v , 36 | |
| Text: output rx_empty ... | |
| enterNet_port_type | |
| File: uart.v , 36 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: uart.v , 36 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: uart.v , 36 | |
| Text: rx_empty ... | |
| enterIdentifier | |
| File: uart.v , 36 | |
| Text: rx_empty ... | |
| enterModule_item | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterNon_port_module_item | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterModule_or_generate_item | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterModule_common_item | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterData_declaration | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterVariable_declaration | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] tx_reg ... | |
| enterData_type | |
| File: uart.v , 39 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 39 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 39 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 39 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 39 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: uart.v , 39 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 39 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 39 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: uart.v , 39 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 39 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 39 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 39 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 39 | |
| Text: tx_reg ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 39 | |
| Text: tx_reg ... | |
| enterIdentifier | |
| File: uart.v , 39 | |
| Text: tx_reg ... | |
| enterModule_item | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterModule_common_item | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterData_declaration | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterVariable_declaration | |
| File: uart.v , 40 | |
| Text: reg tx_empty ; ... | |
| enterData_type | |
| File: uart.v , 40 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 40 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 40 | |
| Text: tx_empty ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 40 | |
| Text: tx_empty ... | |
| enterIdentifier | |
| File: uart.v , 40 | |
| Text: tx_empty ... | |
| enterModule_item | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterModule_common_item | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterData_declaration | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterVariable_declaration | |
| File: uart.v , 41 | |
| Text: reg tx_over_run ; ... | |
| enterData_type | |
| File: uart.v , 41 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 41 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 41 | |
| Text: tx_over_run ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 41 | |
| Text: tx_over_run ... | |
| enterIdentifier | |
| File: uart.v , 41 | |
| Text: tx_over_run ... | |
| enterModule_item | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterNon_port_module_item | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterModule_or_generate_item | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterModule_common_item | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterData_declaration | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterVariable_declaration | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] tx_cnt ... | |
| enterData_type | |
| File: uart.v , 42 | |
| Text: reg [ 3 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 42 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 42 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 42 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 42 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: uart.v , 42 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: uart.v , 42 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: uart.v , 42 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: uart.v , 42 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 42 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 42 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 42 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 42 | |
| Text: tx_cnt ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 42 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 42 | |
| Text: tx_cnt ... | |
| enterModule_item | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterModule_common_item | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterData_declaration | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterVariable_declaration | |
| File: uart.v , 43 | |
| Text: reg tx_out ; ... | |
| enterData_type | |
| File: uart.v , 43 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 43 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 43 | |
| Text: tx_out ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 43 | |
| Text: tx_out ... | |
| enterIdentifier | |
| File: uart.v , 43 | |
| Text: tx_out ... | |
| enterModule_item | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterNon_port_module_item | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterModule_or_generate_item | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterModule_common_item | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterData_declaration | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterVariable_declaration | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] rx_reg ... | |
| enterData_type | |
| File: uart.v , 44 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 44 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 44 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 44 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 44 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: uart.v , 44 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 44 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 44 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: uart.v , 44 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 44 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 44 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 44 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 44 | |
| Text: rx_reg ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 44 | |
| Text: rx_reg ... | |
| enterIdentifier | |
| File: uart.v , 44 | |
| Text: rx_reg ... | |
| enterModule_item | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterNon_port_module_item | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterModule_or_generate_item | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterModule_common_item | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterData_declaration | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterVariable_declaration | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] rx_dat ... | |
| enterData_type | |
| File: uart.v , 45 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 45 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 45 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 45 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 45 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: uart.v , 45 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 45 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 45 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: uart.v , 45 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 45 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 45 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 45 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 45 | |
| Text: rx_data ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 45 | |
| Text: rx_data ... | |
| enterIdentifier | |
| File: uart.v , 45 | |
| Text: rx_data ... | |
| enterModule_item | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterNon_port_module_item | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterModule_or_generate_item | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterModule_common_item | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterData_declaration | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterVariable_declaration | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] rx_sam ... | |
| enterData_type | |
| File: uart.v , 46 | |
| Text: reg [ 3 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 46 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 46 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 46 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 46 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: uart.v , 46 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: uart.v , 46 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: uart.v , 46 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: uart.v , 46 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 46 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 46 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 46 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 46 | |
| Text: rx_sample_cnt ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 46 | |
| Text: rx_sample_cnt ... | |
| enterIdentifier | |
| File: uart.v , 46 | |
| Text: rx_sample_cnt ... | |
| enterModule_item | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterNon_port_module_item | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterModule_or_generate_item | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterModule_common_item | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterData_declaration | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterVariable_declaration | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] rx_cnt ... | |
| enterData_type | |
| File: uart.v , 47 | |
| Text: reg [ 3 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 47 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: uart.v , 47 | |
| Text: [ 3 : 0 ] ... | |
| enterConstant_range | |
| File: uart.v , 47 | |
| Text: 3 : 0 ... | |
| enterConstant_expression | |
| File: uart.v , 47 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: uart.v , 47 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: uart.v , 47 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: uart.v , 47 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: uart.v , 47 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: uart.v , 47 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 47 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 47 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 47 | |
| Text: rx_cnt ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 47 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 47 | |
| Text: rx_cnt ... | |
| enterModule_item | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterModule_common_item | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterData_declaration | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterVariable_declaration | |
| File: uart.v , 48 | |
| Text: reg rx_frame_err ; ... | |
| enterData_type | |
| File: uart.v , 48 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 48 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 48 | |
| Text: rx_frame_err ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 48 | |
| Text: rx_frame_err ... | |
| enterIdentifier | |
| File: uart.v , 48 | |
| Text: rx_frame_err ... | |
| enterModule_item | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterModule_common_item | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterData_declaration | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterVariable_declaration | |
| File: uart.v , 49 | |
| Text: reg rx_over_run ; ... | |
| enterData_type | |
| File: uart.v , 49 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 49 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 49 | |
| Text: rx_over_run ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 49 | |
| Text: rx_over_run ... | |
| enterIdentifier | |
| File: uart.v , 49 | |
| Text: rx_over_run ... | |
| enterModule_item | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterModule_common_item | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterData_declaration | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterVariable_declaration | |
| File: uart.v , 50 | |
| Text: reg rx_empty ; ... | |
| enterData_type | |
| File: uart.v , 50 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 50 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 50 | |
| Text: rx_empty ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 50 | |
| Text: rx_empty ... | |
| enterIdentifier | |
| File: uart.v , 50 | |
| Text: rx_empty ... | |
| enterModule_item | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterModule_common_item | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterData_declaration | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterVariable_declaration | |
| File: uart.v , 51 | |
| Text: reg rx_d1 ; ... | |
| enterData_type | |
| File: uart.v , 51 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 51 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 51 | |
| Text: rx_d1 ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 51 | |
| Text: rx_d1 ... | |
| enterIdentifier | |
| File: uart.v , 51 | |
| Text: rx_d1 ... | |
| enterModule_item | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterModule_common_item | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterData_declaration | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterVariable_declaration | |
| File: uart.v , 52 | |
| Text: reg rx_d2 ; ... | |
| enterData_type | |
| File: uart.v , 52 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 52 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 52 | |
| Text: rx_d2 ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 52 | |
| Text: rx_d2 ... | |
| enterIdentifier | |
| File: uart.v , 52 | |
| Text: rx_d2 ... | |
| enterModule_item | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterNon_port_module_item | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterModule_or_generate_item | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterModule_common_item | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterModule_or_generate_item_declaration | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterData_declaration | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterVariable_declaration | |
| File: uart.v , 53 | |
| Text: reg rx_busy ; ... | |
| enterData_type | |
| File: uart.v , 53 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: uart.v , 53 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: uart.v , 53 | |
| Text: rx_busy ... | |
| enterVariable_decl_assignment | |
| File: uart.v , 53 | |
| Text: rx_busy ... | |
| enterIdentifier | |
| File: uart.v , 53 | |
| Text: rx_busy ... | |
| enterModule_item | |
| File: uart.v , 56 | |
| Text: always @ ( posedge r ... | |
| enterNon_port_module_item | |
| File: uart.v , 56 | |
| Text: always @ ( posedge r ... | |
| enterModule_or_generate_item | |
| File: uart.v , 56 | |
| Text: always @ ( posedge r ... | |
| enterModule_common_item | |
| File: uart.v , 56 | |
| Text: always @ ( posedge r ... | |
| enterAlways_construct | |
| File: uart.v , 56 | |
| Text: always @ ( posedge r ... | |
| enterAlwaysKeywd_Always | |
| File: uart.v , 56 | |
| Text: always ... | |
| enterStatement | |
| File: uart.v , 56 | |
| Text: @ ( posedge rxclk or ... | |
| enterStatement_item | |
| File: uart.v , 56 | |
| Text: @ ( posedge rxclk or ... | |
| enterProcedural_timing_control_statement | |
| File: uart.v , 56 | |
| Text: @ ( posedge rxclk or ... | |
| enterProcedural_timing_control | |
| File: uart.v , 56 | |
| Text: @ ( posedge rxclk or ... | |
| enterEvent_control | |
| File: uart.v , 56 | |
| Text: @ ( posedge rxclk or ... | |
| enterEvent_expression | |
| File: uart.v , 56 | |
| Text: posedge rxclk or pos ... | |
| enterEvent_expression | |
| File: uart.v , 56 | |
| Text: posedge rxclk ... | |
| enterEdge_Posedge | |
| File: uart.v , 56 | |
| Text: posedge ... | |
| enterExpression | |
| File: uart.v , 56 | |
| Text: rxclk ... | |
| enterPrimary | |
| File: uart.v , 56 | |
| Text: rxclk ... | |
| enterPrimary_literal | |
| File: uart.v , 56 | |
| Text: rxclk ... | |
| enterIdentifier | |
| File: uart.v , 56 | |
| Text: rxclk ... | |
| enterEvent_expression | |
| File: uart.v , 56 | |
| Text: posedge reset ... | |
| enterEdge_Posedge | |
| File: uart.v , 56 | |
| Text: posedge ... | |
| enterExpression | |
| File: uart.v , 56 | |
| Text: reset ... | |
| enterPrimary | |
| File: uart.v , 56 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: uart.v , 56 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 56 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: uart.v , 57 | |
| Text: if ( reset ) begin r ... | |
| enterStatement | |
| File: uart.v , 57 | |
| Text: if ( reset ) begin r ... | |
| enterStatement_item | |
| File: uart.v , 57 | |
| Text: if ( reset ) begin r ... | |
| enterConditional_statement | |
| File: uart.v , 57 | |
| Text: if ( reset ) begin r ... | |
| enterCond_predicate | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterExpression | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterPrimary | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 57 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: uart.v , 57 | |
| Text: begin rx_reg <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 57 | |
| Text: begin rx_reg <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 57 | |
| Text: begin rx_reg <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 57 | |
| Text: begin rx_reg <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 58 | |
| Text: rx_reg <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 58 | |
| Text: rx_reg <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 58 | |
| Text: rx_reg <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 58 | |
| Text: rx_reg <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 58 | |
| Text: rx_reg ... | |
| enterHierarchical_identifier | |
| File: uart.v , 58 | |
| Text: rx_reg ... | |
| enterSelect | |
| File: uart.v , 58 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 58 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 58 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 58 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 58 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 58 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 59 | |
| Text: rx_data <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 59 | |
| Text: rx_data <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 59 | |
| Text: rx_data <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 59 | |
| Text: rx_data <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 59 | |
| Text: rx_data ... | |
| enterHierarchical_identifier | |
| File: uart.v , 59 | |
| Text: rx_data ... | |
| enterSelect | |
| File: uart.v , 59 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 59 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 59 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 59 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 59 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 59 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 60 | |
| Text: rx_sample_cnt ... | |
| enterSelect | |
| File: uart.v , 60 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 60 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 60 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 60 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 60 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 60 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 61 | |
| Text: rx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 61 | |
| Text: rx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 61 | |
| Text: rx_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 61 | |
| Text: rx_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 61 | |
| Text: rx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 61 | |
| Text: rx_cnt ... | |
| enterSelect | |
| File: uart.v , 61 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 61 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 61 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 61 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 61 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 61 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 62 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 62 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 62 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 62 | |
| Text: rx_frame_err <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 62 | |
| Text: rx_frame_err ... | |
| enterHierarchical_identifier | |
| File: uart.v , 62 | |
| Text: rx_frame_err ... | |
| enterSelect | |
| File: uart.v , 62 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 62 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 62 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 62 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 62 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 62 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 63 | |
| Text: rx_over_run <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 63 | |
| Text: rx_over_run <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 63 | |
| Text: rx_over_run <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 63 | |
| Text: rx_over_run <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 63 | |
| Text: rx_over_run ... | |
| enterHierarchical_identifier | |
| File: uart.v , 63 | |
| Text: rx_over_run ... | |
| enterSelect | |
| File: uart.v , 63 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 63 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 63 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 63 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 63 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 63 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 64 | |
| Text: rx_empty <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 64 | |
| Text: rx_empty <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 64 | |
| Text: rx_empty <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 64 | |
| Text: rx_empty <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 64 | |
| Text: rx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 64 | |
| Text: rx_empty ... | |
| enterSelect | |
| File: uart.v , 64 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 64 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 64 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 64 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 64 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 64 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 65 | |
| Text: rx_d1 <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 65 | |
| Text: rx_d1 <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 65 | |
| Text: rx_d1 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 65 | |
| Text: rx_d1 <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 65 | |
| Text: rx_d1 ... | |
| enterHierarchical_identifier | |
| File: uart.v , 65 | |
| Text: rx_d1 ... | |
| enterSelect | |
| File: uart.v , 65 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 65 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 65 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 65 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 65 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 65 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 66 | |
| Text: rx_d2 <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 66 | |
| Text: rx_d2 <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 66 | |
| Text: rx_d2 <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 66 | |
| Text: rx_d2 <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 66 | |
| Text: rx_d2 ... | |
| enterHierarchical_identifier | |
| File: uart.v , 66 | |
| Text: rx_d2 ... | |
| enterSelect | |
| File: uart.v , 66 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 66 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 66 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 66 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 66 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 66 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 67 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 67 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 67 | |
| Text: rx_busy <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 67 | |
| Text: rx_busy <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 67 | |
| Text: rx_busy ... | |
| enterHierarchical_identifier | |
| File: uart.v , 67 | |
| Text: rx_busy ... | |
| enterSelect | |
| File: uart.v , 67 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 67 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 67 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 67 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 67 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 67 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 68 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 68 | |
| Text: begin rx_d1 <= rx_in ... | |
| enterStatement | |
| File: uart.v , 68 | |
| Text: begin rx_d1 <= rx_in ... | |
| enterStatement_item | |
| File: uart.v , 68 | |
| Text: begin rx_d1 <= rx_in ... | |
| enterSeq_block | |
| File: uart.v , 68 | |
| Text: begin rx_d1 <= rx_in ... | |
| enterStatement_or_null | |
| File: uart.v , 70 | |
| Text: rx_d1 <= rx_in ; ... | |
| enterStatement | |
| File: uart.v , 70 | |
| Text: rx_d1 <= rx_in ; ... | |
| enterStatement_item | |
| File: uart.v , 70 | |
| Text: rx_d1 <= rx_in ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 70 | |
| Text: rx_d1 <= rx_in ... | |
| enterVariable_lvalue | |
| File: uart.v , 70 | |
| Text: rx_d1 ... | |
| enterHierarchical_identifier | |
| File: uart.v , 70 | |
| Text: rx_d1 ... | |
| enterSelect | |
| File: uart.v , 70 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 70 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 70 | |
| Text: rx_in ... | |
| enterPrimary | |
| File: uart.v , 70 | |
| Text: rx_in ... | |
| enterPrimary_literal | |
| File: uart.v , 70 | |
| Text: rx_in ... | |
| enterIdentifier | |
| File: uart.v , 70 | |
| Text: rx_in ... | |
| enterStatement_or_null | |
| File: uart.v , 71 | |
| Text: rx_d2 <= rx_d1 ; ... | |
| enterStatement | |
| File: uart.v , 71 | |
| Text: rx_d2 <= rx_d1 ; ... | |
| enterStatement_item | |
| File: uart.v , 71 | |
| Text: rx_d2 <= rx_d1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 71 | |
| Text: rx_d2 <= rx_d1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 71 | |
| Text: rx_d2 ... | |
| enterHierarchical_identifier | |
| File: uart.v , 71 | |
| Text: rx_d2 ... | |
| enterSelect | |
| File: uart.v , 71 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 71 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 71 | |
| Text: rx_d1 ... | |
| enterPrimary | |
| File: uart.v , 71 | |
| Text: rx_d1 ... | |
| enterPrimary_literal | |
| File: uart.v , 71 | |
| Text: rx_d1 ... | |
| enterIdentifier | |
| File: uart.v , 71 | |
| Text: rx_d1 ... | |
| enterStatement_or_null | |
| File: uart.v , 73 | |
| Text: if ( uld_rx_data ) b ... | |
| enterStatement | |
| File: uart.v , 73 | |
| Text: if ( uld_rx_data ) b ... | |
| enterStatement_item | |
| File: uart.v , 73 | |
| Text: if ( uld_rx_data ) b ... | |
| enterConditional_statement | |
| File: uart.v , 73 | |
| Text: if ( uld_rx_data ) b ... | |
| enterCond_predicate | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterExpression | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterPrimary | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterPrimary_literal | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterIdentifier | |
| File: uart.v , 73 | |
| Text: uld_rx_data ... | |
| enterStatement_or_null | |
| File: uart.v , 73 | |
| Text: begin rx_data <= rx_ ... | |
| enterStatement | |
| File: uart.v , 73 | |
| Text: begin rx_data <= rx_ ... | |
| enterStatement_item | |
| File: uart.v , 73 | |
| Text: begin rx_data <= rx_ ... | |
| enterSeq_block | |
| File: uart.v , 73 | |
| Text: begin rx_data <= rx_ ... | |
| enterStatement_or_null | |
| File: uart.v , 74 | |
| Text: rx_data <= rx_reg ; ... | |
| enterStatement | |
| File: uart.v , 74 | |
| Text: rx_data <= rx_reg ; ... | |
| enterStatement_item | |
| File: uart.v , 74 | |
| Text: rx_data <= rx_reg ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 74 | |
| Text: rx_data <= rx_reg ... | |
| enterVariable_lvalue | |
| File: uart.v , 74 | |
| Text: rx_data ... | |
| enterHierarchical_identifier | |
| File: uart.v , 74 | |
| Text: rx_data ... | |
| enterSelect | |
| File: uart.v , 74 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 74 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 74 | |
| Text: rx_reg ... | |
| enterPrimary | |
| File: uart.v , 74 | |
| Text: rx_reg ... | |
| enterPrimary_literal | |
| File: uart.v , 74 | |
| Text: rx_reg ... | |
| enterIdentifier | |
| File: uart.v , 74 | |
| Text: rx_reg ... | |
| enterStatement_or_null | |
| File: uart.v , 75 | |
| Text: rx_empty <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 75 | |
| Text: rx_empty <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 75 | |
| Text: rx_empty <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 75 | |
| Text: rx_empty <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 75 | |
| Text: rx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 75 | |
| Text: rx_empty ... | |
| enterSelect | |
| File: uart.v , 75 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 75 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 75 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 75 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 75 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 75 | |
| Text: 1 ... | |
| enterEnd | |
| File: uart.v , 76 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 78 | |
| Text: if ( rx_enable ) beg ... | |
| enterStatement | |
| File: uart.v , 78 | |
| Text: if ( rx_enable ) beg ... | |
| enterStatement_item | |
| File: uart.v , 78 | |
| Text: if ( rx_enable ) beg ... | |
| enterConditional_statement | |
| File: uart.v , 78 | |
| Text: if ( rx_enable ) beg ... | |
| enterCond_predicate | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterExpression | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterPrimary | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterPrimary_literal | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterIdentifier | |
| File: uart.v , 78 | |
| Text: rx_enable ... | |
| enterStatement_or_null | |
| File: uart.v , 78 | |
| Text: begin if ( ! rx_busy ... | |
| enterStatement | |
| File: uart.v , 78 | |
| Text: begin if ( ! rx_busy ... | |
| enterStatement_item | |
| File: uart.v , 78 | |
| Text: begin if ( ! rx_busy ... | |
| enterSeq_block | |
| File: uart.v , 78 | |
| Text: begin if ( ! rx_busy ... | |
| enterStatement_or_null | |
| File: uart.v , 80 | |
| Text: if ( ! rx_busy && ! ... | |
| enterStatement | |
| File: uart.v , 80 | |
| Text: if ( ! rx_busy && ! ... | |
| enterStatement_item | |
| File: uart.v , 80 | |
| Text: if ( ! rx_busy && ! ... | |
| enterConditional_statement | |
| File: uart.v , 80 | |
| Text: if ( ! rx_busy && ! ... | |
| enterCond_predicate | |
| File: uart.v , 80 | |
| Text: ! rx_busy && ! rx_d2 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 80 | |
| Text: ! rx_busy && ! rx_d2 ... | |
| enterExpression | |
| File: uart.v , 80 | |
| Text: ! rx_busy && ! rx_d2 ... | |
| enterExpression | |
| File: uart.v , 80 | |
| Text: ! rx_busy ... | |
| enterUnary_Not | |
| File: uart.v , 80 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 80 | |
| Text: rx_busy ... | |
| enterPrimary_literal | |
| File: uart.v , 80 | |
| Text: rx_busy ... | |
| enterIdentifier | |
| File: uart.v , 80 | |
| Text: rx_busy ... | |
| enterBinOp_LogicAnd | |
| File: uart.v , 80 | |
| Text: && ... | |
| enterExpression | |
| File: uart.v , 80 | |
| Text: ! rx_d2 ... | |
| enterUnary_Not | |
| File: uart.v , 80 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 80 | |
| Text: rx_d2 ... | |
| enterPrimary_literal | |
| File: uart.v , 80 | |
| Text: rx_d2 ... | |
| enterIdentifier | |
| File: uart.v , 80 | |
| Text: rx_d2 ... | |
| enterStatement_or_null | |
| File: uart.v , 80 | |
| Text: begin rx_busy <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 80 | |
| Text: begin rx_busy <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 80 | |
| Text: begin rx_busy <= 1 ; ... | |
| enterSeq_block | |
| File: uart.v , 80 | |
| Text: begin rx_busy <= 1 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 81 | |
| Text: rx_busy <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 81 | |
| Text: rx_busy <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 81 | |
| Text: rx_busy <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 81 | |
| Text: rx_busy <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 81 | |
| Text: rx_busy ... | |
| enterHierarchical_identifier | |
| File: uart.v , 81 | |
| Text: rx_busy ... | |
| enterSelect | |
| File: uart.v , 81 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 81 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 81 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 81 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 81 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 81 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 82 | |
| Text: rx_sample_cnt ... | |
| enterSelect | |
| File: uart.v , 82 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 82 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 82 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 82 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 82 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 82 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 83 | |
| Text: rx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 83 | |
| Text: rx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 83 | |
| Text: rx_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 83 | |
| Text: rx_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 83 | |
| Text: rx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 83 | |
| Text: rx_cnt ... | |
| enterSelect | |
| File: uart.v , 83 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 83 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 83 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 83 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 83 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 83 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 84 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 86 | |
| Text: if ( rx_busy ) begin ... | |
| enterStatement | |
| File: uart.v , 86 | |
| Text: if ( rx_busy ) begin ... | |
| enterStatement_item | |
| File: uart.v , 86 | |
| Text: if ( rx_busy ) begin ... | |
| enterConditional_statement | |
| File: uart.v , 86 | |
| Text: if ( rx_busy ) begin ... | |
| enterCond_predicate | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterExpression | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterPrimary | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterPrimary_literal | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterIdentifier | |
| File: uart.v , 86 | |
| Text: rx_busy ... | |
| enterStatement_or_null | |
| File: uart.v , 86 | |
| Text: begin rx_sample_cnt ... | |
| enterStatement | |
| File: uart.v , 86 | |
| Text: begin rx_sample_cnt ... | |
| enterStatement_item | |
| File: uart.v , 86 | |
| Text: begin rx_sample_cnt ... | |
| enterSeq_block | |
| File: uart.v , 86 | |
| Text: begin rx_sample_cnt ... | |
| enterStatement_or_null | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt <= rx_ ... | |
| enterStatement | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt <= rx_ ... | |
| enterStatement_item | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt <= rx_ ... | |
| enterNonblocking_assignment | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt <= rx_ ... | |
| enterVariable_lvalue | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterSelect | |
| File: uart.v , 87 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 87 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt + 1 ... | |
| enterExpression | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterPrimary | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterIdentifier | |
| File: uart.v , 87 | |
| Text: rx_sample_cnt ... | |
| enterBinOp_Plus | |
| File: uart.v , 87 | |
| Text: + ... | |
| enterExpression | |
| File: uart.v , 87 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 87 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 87 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 87 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 89 | |
| Text: if ( rx_sample_cnt = ... | |
| enterStatement | |
| File: uart.v , 89 | |
| Text: if ( rx_sample_cnt = ... | |
| enterStatement_item | |
| File: uart.v , 89 | |
| Text: if ( rx_sample_cnt = ... | |
| enterConditional_statement | |
| File: uart.v , 89 | |
| Text: if ( rx_sample_cnt = ... | |
| enterCond_predicate | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt == 7 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt == 7 ... | |
| enterExpression | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt == 7 ... | |
| enterExpression | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt ... | |
| enterPrimary | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt ... | |
| enterIdentifier | |
| File: uart.v , 89 | |
| Text: rx_sample_cnt ... | |
| enterBinOp_Equiv | |
| File: uart.v , 89 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 89 | |
| Text: 7 ... | |
| enterPrimary | |
| File: uart.v , 89 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: uart.v , 89 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: uart.v , 89 | |
| Text: 7 ... | |
| enterStatement_or_null | |
| File: uart.v , 89 | |
| Text: begin if ( ( rx_d2 = ... | |
| enterStatement | |
| File: uart.v , 89 | |
| Text: begin if ( ( rx_d2 = ... | |
| enterStatement_item | |
| File: uart.v , 89 | |
| Text: begin if ( ( rx_d2 = ... | |
| enterSeq_block | |
| File: uart.v , 89 | |
| Text: begin if ( ( rx_d2 = ... | |
| enterStatement_or_null | |
| File: uart.v , 90 | |
| Text: if ( ( rx_d2 == 1 ) ... | |
| enterStatement | |
| File: uart.v , 90 | |
| Text: if ( ( rx_d2 == 1 ) ... | |
| enterStatement_item | |
| File: uart.v , 90 | |
| Text: if ( ( rx_d2 == 1 ) ... | |
| enterConditional_statement | |
| File: uart.v , 90 | |
| Text: if ( ( rx_d2 == 1 ) ... | |
| enterCond_predicate | |
| File: uart.v , 90 | |
| Text: ( rx_d2 == 1 ) && ( ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 90 | |
| Text: ( rx_d2 == 1 ) && ( ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: ( rx_d2 == 1 ) && ( ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: ( rx_d2 == 1 ) ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: ( rx_d2 == 1 ) ... | |
| enterMintypmax_expression | |
| File: uart.v , 90 | |
| Text: rx_d2 == 1 ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: rx_d2 == 1 ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: rx_d2 ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: rx_d2 ... | |
| enterPrimary_literal | |
| File: uart.v , 90 | |
| Text: rx_d2 ... | |
| enterIdentifier | |
| File: uart.v , 90 | |
| Text: rx_d2 ... | |
| enterBinOp_Equiv | |
| File: uart.v , 90 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 90 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 90 | |
| Text: 1 ... | |
| enterBinOp_LogicAnd | |
| File: uart.v , 90 | |
| Text: && ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: ( rx_cnt == 0 ) ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: ( rx_cnt == 0 ) ... | |
| enterMintypmax_expression | |
| File: uart.v , 90 | |
| Text: rx_cnt == 0 ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: rx_cnt == 0 ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 90 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 90 | |
| Text: rx_cnt ... | |
| enterBinOp_Equiv | |
| File: uart.v , 90 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 90 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 90 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 90 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 90 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 90 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 90 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 90 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 90 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 91 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 91 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 91 | |
| Text: rx_busy <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 91 | |
| Text: rx_busy <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 91 | |
| Text: rx_busy ... | |
| enterHierarchical_identifier | |
| File: uart.v , 91 | |
| Text: rx_busy ... | |
| enterSelect | |
| File: uart.v , 91 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 91 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 91 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 91 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 91 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 91 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 92 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 92 | |
| Text: begin rx_cnt <= rx_c ... | |
| enterStatement | |
| File: uart.v , 92 | |
| Text: begin rx_cnt <= rx_c ... | |
| enterStatement_item | |
| File: uart.v , 92 | |
| Text: begin rx_cnt <= rx_c ... | |
| enterSeq_block | |
| File: uart.v , 92 | |
| Text: begin rx_cnt <= rx_c ... | |
| enterStatement_or_null | |
| File: uart.v , 93 | |
| Text: rx_cnt <= rx_cnt + 1 ... | |
| enterStatement | |
| File: uart.v , 93 | |
| Text: rx_cnt <= rx_cnt + 1 ... | |
| enterStatement_item | |
| File: uart.v , 93 | |
| Text: rx_cnt <= rx_cnt + 1 ... | |
| enterNonblocking_assignment | |
| File: uart.v , 93 | |
| Text: rx_cnt <= rx_cnt + 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterSelect | |
| File: uart.v , 93 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 93 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 93 | |
| Text: rx_cnt + 1 ... | |
| enterExpression | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 93 | |
| Text: rx_cnt ... | |
| enterBinOp_Plus | |
| File: uart.v , 93 | |
| Text: + ... | |
| enterExpression | |
| File: uart.v , 93 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 93 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 93 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 93 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 95 | |
| Text: if ( rx_cnt > 0 && r ... | |
| enterStatement | |
| File: uart.v , 95 | |
| Text: if ( rx_cnt > 0 && r ... | |
| enterStatement_item | |
| File: uart.v , 95 | |
| Text: if ( rx_cnt > 0 && r ... | |
| enterConditional_statement | |
| File: uart.v , 95 | |
| Text: if ( rx_cnt > 0 && r ... | |
| enterCond_predicate | |
| File: uart.v , 95 | |
| Text: rx_cnt > 0 && rx_cnt ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 95 | |
| Text: rx_cnt > 0 && rx_cnt ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: rx_cnt > 0 && rx_cnt ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: rx_cnt > 0 && rx_cnt ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: rx_cnt > 0 ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterBinOp_Great | |
| File: uart.v , 95 | |
| Text: > ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 95 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 95 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 95 | |
| Text: 0 ... | |
| enterBinOp_LogicAnd | |
| File: uart.v , 95 | |
| Text: && ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 95 | |
| Text: rx_cnt ... | |
| enterBinOp_Less | |
| File: uart.v , 95 | |
| Text: < ... | |
| enterExpression | |
| File: uart.v , 95 | |
| Text: 9 ... | |
| enterPrimary | |
| File: uart.v , 95 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: uart.v , 95 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: uart.v , 95 | |
| Text: 9 ... | |
| enterStatement_or_null | |
| File: uart.v , 95 | |
| Text: begin rx_reg [ rx_cn ... | |
| enterStatement | |
| File: uart.v , 95 | |
| Text: begin rx_reg [ rx_cn ... | |
| enterStatement_item | |
| File: uart.v , 95 | |
| Text: begin rx_reg [ rx_cn ... | |
| enterSeq_block | |
| File: uart.v , 95 | |
| Text: begin rx_reg [ rx_cn ... | |
| enterStatement_or_null | |
| File: uart.v , 96 | |
| Text: rx_reg [ rx_cnt - 1 ... | |
| enterStatement | |
| File: uart.v , 96 | |
| Text: rx_reg [ rx_cnt - 1 ... | |
| enterStatement_item | |
| File: uart.v , 96 | |
| Text: rx_reg [ rx_cnt - 1 ... | |
| enterNonblocking_assignment | |
| File: uart.v , 96 | |
| Text: rx_reg [ rx_cnt - 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 96 | |
| Text: rx_reg [ rx_cnt - 1 ... | |
| enterHierarchical_identifier | |
| File: uart.v , 96 | |
| Text: rx_reg ... | |
| enterSelect | |
| File: uart.v , 96 | |
| Text: [ rx_cnt - 1 ] ... | |
| enterBit_select | |
| File: uart.v , 96 | |
| Text: [ rx_cnt - 1 ] ... | |
| enterExpression | |
| File: uart.v , 96 | |
| Text: rx_cnt - 1 ... | |
| enterExpression | |
| File: uart.v , 96 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 96 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 96 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 96 | |
| Text: rx_cnt ... | |
| enterBinOp_Minus | |
| File: uart.v , 96 | |
| Text: - ... | |
| enterExpression | |
| File: uart.v , 96 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 96 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 96 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 96 | |
| Text: 1 ... | |
| enterExpression | |
| File: uart.v , 96 | |
| Text: rx_d2 ... | |
| enterPrimary | |
| File: uart.v , 96 | |
| Text: rx_d2 ... | |
| enterPrimary_literal | |
| File: uart.v , 96 | |
| Text: rx_d2 ... | |
| enterIdentifier | |
| File: uart.v , 96 | |
| Text: rx_d2 ... | |
| enterEnd | |
| File: uart.v , 97 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 98 | |
| Text: if ( rx_cnt == 9 ) b ... | |
| enterStatement | |
| File: uart.v , 98 | |
| Text: if ( rx_cnt == 9 ) b ... | |
| enterStatement_item | |
| File: uart.v , 98 | |
| Text: if ( rx_cnt == 9 ) b ... | |
| enterConditional_statement | |
| File: uart.v , 98 | |
| Text: if ( rx_cnt == 9 ) b ... | |
| enterCond_predicate | |
| File: uart.v , 98 | |
| Text: rx_cnt == 9 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 98 | |
| Text: rx_cnt == 9 ... | |
| enterExpression | |
| File: uart.v , 98 | |
| Text: rx_cnt == 9 ... | |
| enterExpression | |
| File: uart.v , 98 | |
| Text: rx_cnt ... | |
| enterPrimary | |
| File: uart.v , 98 | |
| Text: rx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 98 | |
| Text: rx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 98 | |
| Text: rx_cnt ... | |
| enterBinOp_Equiv | |
| File: uart.v , 98 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 98 | |
| Text: 9 ... | |
| enterPrimary | |
| File: uart.v , 98 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: uart.v , 98 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: uart.v , 98 | |
| Text: 9 ... | |
| enterStatement_or_null | |
| File: uart.v , 98 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 98 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 98 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 98 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 99 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 99 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 99 | |
| Text: rx_busy <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 99 | |
| Text: rx_busy <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 99 | |
| Text: rx_busy ... | |
| enterHierarchical_identifier | |
| File: uart.v , 99 | |
| Text: rx_busy ... | |
| enterSelect | |
| File: uart.v , 99 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 99 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 99 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 99 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 99 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 99 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 101 | |
| Text: if ( rx_d2 == 0 ) be ... | |
| enterStatement | |
| File: uart.v , 101 | |
| Text: if ( rx_d2 == 0 ) be ... | |
| enterStatement_item | |
| File: uart.v , 101 | |
| Text: if ( rx_d2 == 0 ) be ... | |
| enterConditional_statement | |
| File: uart.v , 101 | |
| Text: if ( rx_d2 == 0 ) be ... | |
| enterCond_predicate | |
| File: uart.v , 101 | |
| Text: rx_d2 == 0 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 101 | |
| Text: rx_d2 == 0 ... | |
| enterExpression | |
| File: uart.v , 101 | |
| Text: rx_d2 == 0 ... | |
| enterExpression | |
| File: uart.v , 101 | |
| Text: rx_d2 ... | |
| enterPrimary | |
| File: uart.v , 101 | |
| Text: rx_d2 ... | |
| enterPrimary_literal | |
| File: uart.v , 101 | |
| Text: rx_d2 ... | |
| enterIdentifier | |
| File: uart.v , 101 | |
| Text: rx_d2 ... | |
| enterBinOp_Equiv | |
| File: uart.v , 101 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 101 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 101 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 101 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 101 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 101 | |
| Text: begin rx_frame_err < ... | |
| enterStatement | |
| File: uart.v , 101 | |
| Text: begin rx_frame_err < ... | |
| enterStatement_item | |
| File: uart.v , 101 | |
| Text: begin rx_frame_err < ... | |
| enterSeq_block | |
| File: uart.v , 101 | |
| Text: begin rx_frame_err < ... | |
| enterStatement_or_null | |
| File: uart.v , 102 | |
| Text: rx_frame_err <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 102 | |
| Text: rx_frame_err <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 102 | |
| Text: rx_frame_err <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 102 | |
| Text: rx_frame_err <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 102 | |
| Text: rx_frame_err ... | |
| enterHierarchical_identifier | |
| File: uart.v , 102 | |
| Text: rx_frame_err ... | |
| enterSelect | |
| File: uart.v , 102 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 102 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 102 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 102 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 102 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 102 | |
| Text: 1 ... | |
| enterEnd | |
| File: uart.v , 103 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 103 | |
| Text: begin rx_empty <= 0 ... | |
| enterStatement | |
| File: uart.v , 103 | |
| Text: begin rx_empty <= 0 ... | |
| enterStatement_item | |
| File: uart.v , 103 | |
| Text: begin rx_empty <= 0 ... | |
| enterSeq_block | |
| File: uart.v , 103 | |
| Text: begin rx_empty <= 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 104 | |
| Text: rx_empty <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 104 | |
| Text: rx_empty <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 104 | |
| Text: rx_empty <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 104 | |
| Text: rx_empty <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 104 | |
| Text: rx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 104 | |
| Text: rx_empty ... | |
| enterSelect | |
| File: uart.v , 104 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 104 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 104 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 104 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 104 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 104 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 105 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 105 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 105 | |
| Text: rx_frame_err <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 105 | |
| Text: rx_frame_err <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 105 | |
| Text: rx_frame_err ... | |
| enterHierarchical_identifier | |
| File: uart.v , 105 | |
| Text: rx_frame_err ... | |
| enterSelect | |
| File: uart.v , 105 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 105 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 105 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 105 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 105 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 105 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 107 | |
| Text: rx_over_run <= ( rx_ ... | |
| enterStatement | |
| File: uart.v , 107 | |
| Text: rx_over_run <= ( rx_ ... | |
| enterStatement_item | |
| File: uart.v , 107 | |
| Text: rx_over_run <= ( rx_ ... | |
| enterNonblocking_assignment | |
| File: uart.v , 107 | |
| Text: rx_over_run <= ( rx_ ... | |
| enterVariable_lvalue | |
| File: uart.v , 107 | |
| Text: rx_over_run ... | |
| enterHierarchical_identifier | |
| File: uart.v , 107 | |
| Text: rx_over_run ... | |
| enterSelect | |
| File: uart.v , 107 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 107 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 107 | |
| Text: ( rx_empty ) ? 0 : 1 ... | |
| enterExpression | |
| File: uart.v , 107 | |
| Text: ( rx_empty ) ... | |
| enterPrimary | |
| File: uart.v , 107 | |
| Text: ( rx_empty ) ... | |
| enterMintypmax_expression | |
| File: uart.v , 107 | |
| Text: rx_empty ... | |
| enterExpression | |
| File: uart.v , 107 | |
| Text: rx_empty ... | |
| enterPrimary | |
| File: uart.v , 107 | |
| Text: rx_empty ... | |
| enterPrimary_literal | |
| File: uart.v , 107 | |
| Text: rx_empty ... | |
| enterIdentifier | |
| File: uart.v , 107 | |
| Text: rx_empty ... | |
| enterExpression | |
| File: uart.v , 107 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 107 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 107 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 107 | |
| Text: 0 ... | |
| enterExpression | |
| File: uart.v , 107 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 107 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 107 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 107 | |
| Text: 1 ... | |
| enterEnd | |
| File: uart.v , 108 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 109 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 110 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 111 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 112 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 113 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 114 | |
| Text: if ( ! rx_enable ) b ... | |
| enterStatement | |
| File: uart.v , 114 | |
| Text: if ( ! rx_enable ) b ... | |
| enterStatement_item | |
| File: uart.v , 114 | |
| Text: if ( ! rx_enable ) b ... | |
| enterConditional_statement | |
| File: uart.v , 114 | |
| Text: if ( ! rx_enable ) b ... | |
| enterCond_predicate | |
| File: uart.v , 114 | |
| Text: ! rx_enable ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 114 | |
| Text: ! rx_enable ... | |
| enterExpression | |
| File: uart.v , 114 | |
| Text: ! rx_enable ... | |
| enterUnary_Not | |
| File: uart.v , 114 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 114 | |
| Text: rx_enable ... | |
| enterPrimary_literal | |
| File: uart.v , 114 | |
| Text: rx_enable ... | |
| enterIdentifier | |
| File: uart.v , 114 | |
| Text: rx_enable ... | |
| enterStatement_or_null | |
| File: uart.v , 114 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 114 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 114 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 114 | |
| Text: begin rx_busy <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 115 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 115 | |
| Text: rx_busy <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 115 | |
| Text: rx_busy <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 115 | |
| Text: rx_busy <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 115 | |
| Text: rx_busy ... | |
| enterHierarchical_identifier | |
| File: uart.v , 115 | |
| Text: rx_busy ... | |
| enterSelect | |
| File: uart.v , 115 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 115 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 115 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 115 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 115 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 115 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 116 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 117 | |
| Text: end ... | |
| enterModule_item | |
| File: uart.v , 120 | |
| Text: always @ ( posedge t ... | |
| enterNon_port_module_item | |
| File: uart.v , 120 | |
| Text: always @ ( posedge t ... | |
| enterModule_or_generate_item | |
| File: uart.v , 120 | |
| Text: always @ ( posedge t ... | |
| enterModule_common_item | |
| File: uart.v , 120 | |
| Text: always @ ( posedge t ... | |
| enterAlways_construct | |
| File: uart.v , 120 | |
| Text: always @ ( posedge t ... | |
| enterAlwaysKeywd_Always | |
| File: uart.v , 120 | |
| Text: always ... | |
| enterStatement | |
| File: uart.v , 120 | |
| Text: @ ( posedge txclk or ... | |
| enterStatement_item | |
| File: uart.v , 120 | |
| Text: @ ( posedge txclk or ... | |
| enterProcedural_timing_control_statement | |
| File: uart.v , 120 | |
| Text: @ ( posedge txclk or ... | |
| enterProcedural_timing_control | |
| File: uart.v , 120 | |
| Text: @ ( posedge txclk or ... | |
| enterEvent_control | |
| File: uart.v , 120 | |
| Text: @ ( posedge txclk or ... | |
| enterEvent_expression | |
| File: uart.v , 120 | |
| Text: posedge txclk or pos ... | |
| enterEvent_expression | |
| File: uart.v , 120 | |
| Text: posedge txclk ... | |
| enterEdge_Posedge | |
| File: uart.v , 120 | |
| Text: posedge ... | |
| enterExpression | |
| File: uart.v , 120 | |
| Text: txclk ... | |
| enterPrimary | |
| File: uart.v , 120 | |
| Text: txclk ... | |
| enterPrimary_literal | |
| File: uart.v , 120 | |
| Text: txclk ... | |
| enterIdentifier | |
| File: uart.v , 120 | |
| Text: txclk ... | |
| enterEvent_expression | |
| File: uart.v , 120 | |
| Text: posedge reset ... | |
| enterEdge_Posedge | |
| File: uart.v , 120 | |
| Text: posedge ... | |
| enterExpression | |
| File: uart.v , 120 | |
| Text: reset ... | |
| enterPrimary | |
| File: uart.v , 120 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: uart.v , 120 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 120 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: uart.v , 121 | |
| Text: if ( reset ) begin t ... | |
| enterStatement | |
| File: uart.v , 121 | |
| Text: if ( reset ) begin t ... | |
| enterStatement_item | |
| File: uart.v , 121 | |
| Text: if ( reset ) begin t ... | |
| enterConditional_statement | |
| File: uart.v , 121 | |
| Text: if ( reset ) begin t ... | |
| enterCond_predicate | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterExpression | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterPrimary | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterPrimary_literal | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterIdentifier | |
| File: uart.v , 121 | |
| Text: reset ... | |
| enterStatement_or_null | |
| File: uart.v , 121 | |
| Text: begin tx_reg <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 121 | |
| Text: begin tx_reg <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 121 | |
| Text: begin tx_reg <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 121 | |
| Text: begin tx_reg <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 122 | |
| Text: tx_reg <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 122 | |
| Text: tx_reg <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 122 | |
| Text: tx_reg <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 122 | |
| Text: tx_reg <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 122 | |
| Text: tx_reg ... | |
| enterHierarchical_identifier | |
| File: uart.v , 122 | |
| Text: tx_reg ... | |
| enterSelect | |
| File: uart.v , 122 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 122 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 122 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 122 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 122 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 122 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 123 | |
| Text: tx_empty <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 123 | |
| Text: tx_empty <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 123 | |
| Text: tx_empty <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 123 | |
| Text: tx_empty <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 123 | |
| Text: tx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 123 | |
| Text: tx_empty ... | |
| enterSelect | |
| File: uart.v , 123 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 123 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 123 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 123 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 123 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 123 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 124 | |
| Text: tx_over_run <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 124 | |
| Text: tx_over_run <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 124 | |
| Text: tx_over_run <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 124 | |
| Text: tx_over_run <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 124 | |
| Text: tx_over_run ... | |
| enterHierarchical_identifier | |
| File: uart.v , 124 | |
| Text: tx_over_run ... | |
| enterSelect | |
| File: uart.v , 124 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 124 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 124 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 124 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 124 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 124 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 125 | |
| Text: tx_out <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 125 | |
| Text: tx_out <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 125 | |
| Text: tx_out <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 125 | |
| Text: tx_out <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 125 | |
| Text: tx_out ... | |
| enterHierarchical_identifier | |
| File: uart.v , 125 | |
| Text: tx_out ... | |
| enterSelect | |
| File: uart.v , 125 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 125 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 125 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 125 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 125 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 125 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 126 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 126 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 126 | |
| Text: tx_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 126 | |
| Text: tx_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 126 | |
| Text: tx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 126 | |
| Text: tx_cnt ... | |
| enterSelect | |
| File: uart.v , 126 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 126 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 126 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 126 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 126 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 126 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 127 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 127 | |
| Text: begin if ( ld_tx_dat ... | |
| enterStatement | |
| File: uart.v , 127 | |
| Text: begin if ( ld_tx_dat ... | |
| enterStatement_item | |
| File: uart.v , 127 | |
| Text: begin if ( ld_tx_dat ... | |
| enterSeq_block | |
| File: uart.v , 127 | |
| Text: begin if ( ld_tx_dat ... | |
| enterStatement_or_null | |
| File: uart.v , 128 | |
| Text: if ( ld_tx_data ) be ... | |
| enterStatement | |
| File: uart.v , 128 | |
| Text: if ( ld_tx_data ) be ... | |
| enterStatement_item | |
| File: uart.v , 128 | |
| Text: if ( ld_tx_data ) be ... | |
| enterConditional_statement | |
| File: uart.v , 128 | |
| Text: if ( ld_tx_data ) be ... | |
| enterCond_predicate | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterExpression | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterPrimary | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterPrimary_literal | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterIdentifier | |
| File: uart.v , 128 | |
| Text: ld_tx_data ... | |
| enterStatement_or_null | |
| File: uart.v , 128 | |
| Text: begin if ( ! tx_empt ... | |
| enterStatement | |
| File: uart.v , 128 | |
| Text: begin if ( ! tx_empt ... | |
| enterStatement_item | |
| File: uart.v , 128 | |
| Text: begin if ( ! tx_empt ... | |
| enterSeq_block | |
| File: uart.v , 128 | |
| Text: begin if ( ! tx_empt ... | |
| enterStatement_or_null | |
| File: uart.v , 129 | |
| Text: if ( ! tx_empty ) be ... | |
| enterStatement | |
| File: uart.v , 129 | |
| Text: if ( ! tx_empty ) be ... | |
| enterStatement_item | |
| File: uart.v , 129 | |
| Text: if ( ! tx_empty ) be ... | |
| enterConditional_statement | |
| File: uart.v , 129 | |
| Text: if ( ! tx_empty ) be ... | |
| enterCond_predicate | |
| File: uart.v , 129 | |
| Text: ! tx_empty ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 129 | |
| Text: ! tx_empty ... | |
| enterExpression | |
| File: uart.v , 129 | |
| Text: ! tx_empty ... | |
| enterUnary_Not | |
| File: uart.v , 129 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 129 | |
| Text: tx_empty ... | |
| enterPrimary_literal | |
| File: uart.v , 129 | |
| Text: tx_empty ... | |
| enterIdentifier | |
| File: uart.v , 129 | |
| Text: tx_empty ... | |
| enterStatement_or_null | |
| File: uart.v , 129 | |
| Text: begin tx_over_run <= ... | |
| enterStatement | |
| File: uart.v , 129 | |
| Text: begin tx_over_run <= ... | |
| enterStatement_item | |
| File: uart.v , 129 | |
| Text: begin tx_over_run <= ... | |
| enterSeq_block | |
| File: uart.v , 129 | |
| Text: begin tx_over_run <= ... | |
| enterStatement_or_null | |
| File: uart.v , 130 | |
| Text: tx_over_run <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 130 | |
| Text: tx_over_run <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 130 | |
| Text: tx_over_run <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 130 | |
| Text: tx_over_run <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 130 | |
| Text: tx_over_run ... | |
| enterHierarchical_identifier | |
| File: uart.v , 130 | |
| Text: tx_over_run ... | |
| enterSelect | |
| File: uart.v , 130 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 130 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 130 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 130 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 130 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 130 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 131 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 131 | |
| Text: begin tx_reg <= tx_d ... | |
| enterStatement | |
| File: uart.v , 131 | |
| Text: begin tx_reg <= tx_d ... | |
| enterStatement_item | |
| File: uart.v , 131 | |
| Text: begin tx_reg <= tx_d ... | |
| enterSeq_block | |
| File: uart.v , 131 | |
| Text: begin tx_reg <= tx_d ... | |
| enterStatement_or_null | |
| File: uart.v , 132 | |
| Text: tx_reg <= tx_data ; ... | |
| enterStatement | |
| File: uart.v , 132 | |
| Text: tx_reg <= tx_data ; ... | |
| enterStatement_item | |
| File: uart.v , 132 | |
| Text: tx_reg <= tx_data ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 132 | |
| Text: tx_reg <= tx_data ... | |
| enterVariable_lvalue | |
| File: uart.v , 132 | |
| Text: tx_reg ... | |
| enterHierarchical_identifier | |
| File: uart.v , 132 | |
| Text: tx_reg ... | |
| enterSelect | |
| File: uart.v , 132 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 132 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 132 | |
| Text: tx_data ... | |
| enterPrimary | |
| File: uart.v , 132 | |
| Text: tx_data ... | |
| enterPrimary_literal | |
| File: uart.v , 132 | |
| Text: tx_data ... | |
| enterIdentifier | |
| File: uart.v , 132 | |
| Text: tx_data ... | |
| enterStatement_or_null | |
| File: uart.v , 133 | |
| Text: tx_empty <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 133 | |
| Text: tx_empty <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 133 | |
| Text: tx_empty <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 133 | |
| Text: tx_empty <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 133 | |
| Text: tx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 133 | |
| Text: tx_empty ... | |
| enterSelect | |
| File: uart.v , 133 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 133 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 133 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 133 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 133 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 133 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 134 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 135 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 136 | |
| Text: if ( tx_enable && ! ... | |
| enterStatement | |
| File: uart.v , 136 | |
| Text: if ( tx_enable && ! ... | |
| enterStatement_item | |
| File: uart.v , 136 | |
| Text: if ( tx_enable && ! ... | |
| enterConditional_statement | |
| File: uart.v , 136 | |
| Text: if ( tx_enable && ! ... | |
| enterCond_predicate | |
| File: uart.v , 136 | |
| Text: tx_enable && ! tx_em ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 136 | |
| Text: tx_enable && ! tx_em ... | |
| enterExpression | |
| File: uart.v , 136 | |
| Text: tx_enable && ! tx_em ... | |
| enterExpression | |
| File: uart.v , 136 | |
| Text: tx_enable ... | |
| enterPrimary | |
| File: uart.v , 136 | |
| Text: tx_enable ... | |
| enterPrimary_literal | |
| File: uart.v , 136 | |
| Text: tx_enable ... | |
| enterIdentifier | |
| File: uart.v , 136 | |
| Text: tx_enable ... | |
| enterBinOp_LogicAnd | |
| File: uart.v , 136 | |
| Text: && ... | |
| enterExpression | |
| File: uart.v , 136 | |
| Text: ! tx_empty ... | |
| enterUnary_Not | |
| File: uart.v , 136 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 136 | |
| Text: tx_empty ... | |
| enterPrimary_literal | |
| File: uart.v , 136 | |
| Text: tx_empty ... | |
| enterIdentifier | |
| File: uart.v , 136 | |
| Text: tx_empty ... | |
| enterStatement_or_null | |
| File: uart.v , 136 | |
| Text: begin tx_cnt <= tx_c ... | |
| enterStatement | |
| File: uart.v , 136 | |
| Text: begin tx_cnt <= tx_c ... | |
| enterStatement_item | |
| File: uart.v , 136 | |
| Text: begin tx_cnt <= tx_c ... | |
| enterSeq_block | |
| File: uart.v , 136 | |
| Text: begin tx_cnt <= tx_c ... | |
| enterStatement_or_null | |
| File: uart.v , 137 | |
| Text: tx_cnt <= tx_cnt + 1 ... | |
| enterStatement | |
| File: uart.v , 137 | |
| Text: tx_cnt <= tx_cnt + 1 ... | |
| enterStatement_item | |
| File: uart.v , 137 | |
| Text: tx_cnt <= tx_cnt + 1 ... | |
| enterNonblocking_assignment | |
| File: uart.v , 137 | |
| Text: tx_cnt <= tx_cnt + 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterSelect | |
| File: uart.v , 137 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 137 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 137 | |
| Text: tx_cnt + 1 ... | |
| enterExpression | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 137 | |
| Text: tx_cnt ... | |
| enterBinOp_Plus | |
| File: uart.v , 137 | |
| Text: + ... | |
| enterExpression | |
| File: uart.v , 137 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 137 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 137 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 137 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 138 | |
| Text: if ( tx_cnt == 0 ) b ... | |
| enterStatement | |
| File: uart.v , 138 | |
| Text: if ( tx_cnt == 0 ) b ... | |
| enterStatement_item | |
| File: uart.v , 138 | |
| Text: if ( tx_cnt == 0 ) b ... | |
| enterConditional_statement | |
| File: uart.v , 138 | |
| Text: if ( tx_cnt == 0 ) b ... | |
| enterCond_predicate | |
| File: uart.v , 138 | |
| Text: tx_cnt == 0 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 138 | |
| Text: tx_cnt == 0 ... | |
| enterExpression | |
| File: uart.v , 138 | |
| Text: tx_cnt == 0 ... | |
| enterExpression | |
| File: uart.v , 138 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 138 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 138 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 138 | |
| Text: tx_cnt ... | |
| enterBinOp_Equiv | |
| File: uart.v , 138 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 138 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 138 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 138 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 138 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 138 | |
| Text: begin tx_out <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 138 | |
| Text: begin tx_out <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 138 | |
| Text: begin tx_out <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 138 | |
| Text: begin tx_out <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 139 | |
| Text: tx_out <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 139 | |
| Text: tx_out <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 139 | |
| Text: tx_out <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 139 | |
| Text: tx_out <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 139 | |
| Text: tx_out ... | |
| enterHierarchical_identifier | |
| File: uart.v , 139 | |
| Text: tx_out ... | |
| enterSelect | |
| File: uart.v , 139 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 139 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 139 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 139 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 139 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 139 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 140 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 141 | |
| Text: if ( tx_cnt > 0 && t ... | |
| enterStatement | |
| File: uart.v , 141 | |
| Text: if ( tx_cnt > 0 && t ... | |
| enterStatement_item | |
| File: uart.v , 141 | |
| Text: if ( tx_cnt > 0 && t ... | |
| enterConditional_statement | |
| File: uart.v , 141 | |
| Text: if ( tx_cnt > 0 && t ... | |
| enterCond_predicate | |
| File: uart.v , 141 | |
| Text: tx_cnt > 0 && tx_cnt ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 141 | |
| Text: tx_cnt > 0 && tx_cnt ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: tx_cnt > 0 && tx_cnt ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: tx_cnt > 0 && tx_cnt ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: tx_cnt > 0 ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterBinOp_Great | |
| File: uart.v , 141 | |
| Text: > ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 141 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 141 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 141 | |
| Text: 0 ... | |
| enterBinOp_LogicAnd | |
| File: uart.v , 141 | |
| Text: && ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 141 | |
| Text: tx_cnt ... | |
| enterBinOp_Less | |
| File: uart.v , 141 | |
| Text: < ... | |
| enterExpression | |
| File: uart.v , 141 | |
| Text: 9 ... | |
| enterPrimary | |
| File: uart.v , 141 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: uart.v , 141 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: uart.v , 141 | |
| Text: 9 ... | |
| enterStatement_or_null | |
| File: uart.v , 141 | |
| Text: begin tx_out <= tx_r ... | |
| enterStatement | |
| File: uart.v , 141 | |
| Text: begin tx_out <= tx_r ... | |
| enterStatement_item | |
| File: uart.v , 141 | |
| Text: begin tx_out <= tx_r ... | |
| enterSeq_block | |
| File: uart.v , 141 | |
| Text: begin tx_out <= tx_r ... | |
| enterStatement_or_null | |
| File: uart.v , 142 | |
| Text: tx_out <= tx_reg [ t ... | |
| enterStatement | |
| File: uart.v , 142 | |
| Text: tx_out <= tx_reg [ t ... | |
| enterStatement_item | |
| File: uart.v , 142 | |
| Text: tx_out <= tx_reg [ t ... | |
| enterNonblocking_assignment | |
| File: uart.v , 142 | |
| Text: tx_out <= tx_reg [ t ... | |
| enterVariable_lvalue | |
| File: uart.v , 142 | |
| Text: tx_out ... | |
| enterHierarchical_identifier | |
| File: uart.v , 142 | |
| Text: tx_out ... | |
| enterSelect | |
| File: uart.v , 142 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 142 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 142 | |
| Text: tx_reg [ tx_cnt - 1 ... | |
| enterPrimary | |
| File: uart.v , 142 | |
| Text: tx_reg [ tx_cnt - 1 ... | |
| enterComplex_func_call | |
| File: uart.v , 142 | |
| Text: tx_reg [ tx_cnt - 1 ... | |
| enterIdentifier | |
| File: uart.v , 142 | |
| Text: tx_reg ... | |
| enterSelect | |
| File: uart.v , 142 | |
| Text: [ tx_cnt - 1 ] ... | |
| enterBit_select | |
| File: uart.v , 142 | |
| Text: [ tx_cnt - 1 ] ... | |
| enterExpression | |
| File: uart.v , 142 | |
| Text: tx_cnt - 1 ... | |
| enterExpression | |
| File: uart.v , 142 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 142 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 142 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 142 | |
| Text: tx_cnt ... | |
| enterBinOp_Minus | |
| File: uart.v , 142 | |
| Text: - ... | |
| enterExpression | |
| File: uart.v , 142 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 142 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 142 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 142 | |
| Text: 1 ... | |
| enterEnd | |
| File: uart.v , 143 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 144 | |
| Text: if ( tx_cnt == 9 ) b ... | |
| enterStatement | |
| File: uart.v , 144 | |
| Text: if ( tx_cnt == 9 ) b ... | |
| enterStatement_item | |
| File: uart.v , 144 | |
| Text: if ( tx_cnt == 9 ) b ... | |
| enterConditional_statement | |
| File: uart.v , 144 | |
| Text: if ( tx_cnt == 9 ) b ... | |
| enterCond_predicate | |
| File: uart.v , 144 | |
| Text: tx_cnt == 9 ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 144 | |
| Text: tx_cnt == 9 ... | |
| enterExpression | |
| File: uart.v , 144 | |
| Text: tx_cnt == 9 ... | |
| enterExpression | |
| File: uart.v , 144 | |
| Text: tx_cnt ... | |
| enterPrimary | |
| File: uart.v , 144 | |
| Text: tx_cnt ... | |
| enterPrimary_literal | |
| File: uart.v , 144 | |
| Text: tx_cnt ... | |
| enterIdentifier | |
| File: uart.v , 144 | |
| Text: tx_cnt ... | |
| enterBinOp_Equiv | |
| File: uart.v , 144 | |
| Text: == ... | |
| enterExpression | |
| File: uart.v , 144 | |
| Text: 9 ... | |
| enterPrimary | |
| File: uart.v , 144 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: uart.v , 144 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: uart.v , 144 | |
| Text: 9 ... | |
| enterStatement_or_null | |
| File: uart.v , 144 | |
| Text: begin tx_out <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 144 | |
| Text: begin tx_out <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 144 | |
| Text: begin tx_out <= 1 ; ... | |
| enterSeq_block | |
| File: uart.v , 144 | |
| Text: begin tx_out <= 1 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 145 | |
| Text: tx_out <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 145 | |
| Text: tx_out <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 145 | |
| Text: tx_out <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 145 | |
| Text: tx_out <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 145 | |
| Text: tx_out ... | |
| enterHierarchical_identifier | |
| File: uart.v , 145 | |
| Text: tx_out ... | |
| enterSelect | |
| File: uart.v , 145 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 145 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 145 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 145 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 145 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 145 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: uart.v , 146 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 146 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 146 | |
| Text: tx_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 146 | |
| Text: tx_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 146 | |
| Text: tx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 146 | |
| Text: tx_cnt ... | |
| enterSelect | |
| File: uart.v , 146 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 146 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 146 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 146 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 146 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 146 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: uart.v , 147 | |
| Text: tx_empty <= 1 ; ... | |
| enterStatement | |
| File: uart.v , 147 | |
| Text: tx_empty <= 1 ; ... | |
| enterStatement_item | |
| File: uart.v , 147 | |
| Text: tx_empty <= 1 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 147 | |
| Text: tx_empty <= 1 ... | |
| enterVariable_lvalue | |
| File: uart.v , 147 | |
| Text: tx_empty ... | |
| enterHierarchical_identifier | |
| File: uart.v , 147 | |
| Text: tx_empty ... | |
| enterSelect | |
| File: uart.v , 147 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 147 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 147 | |
| Text: 1 ... | |
| enterPrimary | |
| File: uart.v , 147 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: uart.v , 147 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: uart.v , 147 | |
| Text: 1 ... | |
| enterEnd | |
| File: uart.v , 148 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 149 | |
| Text: end ... | |
| enterStatement_or_null | |
| File: uart.v , 150 | |
| Text: if ( ! tx_enable ) b ... | |
| enterStatement | |
| File: uart.v , 150 | |
| Text: if ( ! tx_enable ) b ... | |
| enterStatement_item | |
| File: uart.v , 150 | |
| Text: if ( ! tx_enable ) b ... | |
| enterConditional_statement | |
| File: uart.v , 150 | |
| Text: if ( ! tx_enable ) b ... | |
| enterCond_predicate | |
| File: uart.v , 150 | |
| Text: ! tx_enable ... | |
| enterExpression_or_cond_pattern | |
| File: uart.v , 150 | |
| Text: ! tx_enable ... | |
| enterExpression | |
| File: uart.v , 150 | |
| Text: ! tx_enable ... | |
| enterUnary_Not | |
| File: uart.v , 150 | |
| Text: ! ... | |
| enterPrimary | |
| File: uart.v , 150 | |
| Text: tx_enable ... | |
| enterPrimary_literal | |
| File: uart.v , 150 | |
| Text: tx_enable ... | |
| enterIdentifier | |
| File: uart.v , 150 | |
| Text: tx_enable ... | |
| enterStatement_or_null | |
| File: uart.v , 150 | |
| Text: begin tx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 150 | |
| Text: begin tx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 150 | |
| Text: begin tx_cnt <= 0 ; ... | |
| enterSeq_block | |
| File: uart.v , 150 | |
| Text: begin tx_cnt <= 0 ; ... | |
| enterStatement_or_null | |
| File: uart.v , 151 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement | |
| File: uart.v , 151 | |
| Text: tx_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: uart.v , 151 | |
| Text: tx_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: uart.v , 151 | |
| Text: tx_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: uart.v , 151 | |
| Text: tx_cnt ... | |
| enterHierarchical_identifier | |
| File: uart.v , 151 | |
| Text: tx_cnt ... | |
| enterSelect | |
| File: uart.v , 151 | |
| Text: ... | |
| enterBit_select | |
| File: uart.v , 151 | |
| Text: ... | |
| enterExpression | |
| File: uart.v , 151 | |
| Text: 0 ... | |
| enterPrimary | |
| File: uart.v , 151 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: uart.v , 151 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: uart.v , 151 | |
| Text: 0 ... | |
| enterEnd | |
| File: uart.v , 152 | |
| Text: end ... | |
| enterEnd | |
| File: uart.v , 153 | |
| Text: end ... | |
| enterEndmodule | |
| File: uart.v , 155 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "jkff_udp.v". | |
| enterTop_level_rule | |
| File: jkff_udp.v , 7 | |
| Text: primitive jkff_udp ( ... | |
| enterNull_rule | |
| File: jkff_udp.v , 7 | |
| Text: ... | |
| enterSource_text | |
| File: jkff_udp.v , 7 | |
| Text: primitive jkff_udp ( ... | |
| enterDescription | |
| File: jkff_udp.v , 7 | |
| Text: primitive jkff_udp ( ... | |
| enterUdp_declaration | |
| File: jkff_udp.v , 7 | |
| Text: primitive jkff_udp ( ... | |
| enterUdp_nonansi_declaration | |
| File: jkff_udp.v , 7 | |
| Text: primitive jkff_udp ( ... | |
| enterIdentifier | |
| File: jkff_udp.v , 7 | |
| Text: jkff_udp ... | |
| enterUdp_port_list | |
| File: jkff_udp.v , 7 | |
| Text: q , clk , j , k ... | |
| enterIdentifier | |
| File: jkff_udp.v , 7 | |
| Text: q ... | |
| enterIdentifier | |
| File: jkff_udp.v , 7 | |
| Text: clk ... | |
| enterIdentifier | |
| File: jkff_udp.v , 7 | |
| Text: j ... | |
| enterIdentifier | |
| File: jkff_udp.v , 7 | |
| Text: k ... | |
| enterUdp_port_declaration | |
| File: jkff_udp.v , 8 | |
| Text: input clk , j , k ; ... | |
| enterUdp_input_declaration | |
| File: jkff_udp.v , 8 | |
| Text: input clk , j , k ... | |
| enterIdentifier_list | |
| File: jkff_udp.v , 8 | |
| Text: clk , j , k ... | |
| enterIdentifier | |
| File: jkff_udp.v , 8 | |
| Text: clk ... | |
| enterIdentifier | |
| File: jkff_udp.v , 8 | |
| Text: j ... | |
| enterIdentifier | |
| File: jkff_udp.v , 8 | |
| Text: k ... | |
| enterUdp_port_declaration | |
| File: jkff_udp.v , 9 | |
| Text: output q ; ... | |
| enterUdp_output_declaration | |
| File: jkff_udp.v , 9 | |
| Text: output q ... | |
| enterIdentifier | |
| File: jkff_udp.v , 9 | |
| Text: q ... | |
| enterUdp_port_declaration | |
| File: jkff_udp.v , 10 | |
| Text: reg q ; ... | |
| enterUdp_reg_declaration | |
| File: jkff_udp.v , 10 | |
| Text: reg q ... | |
| enterIdentifier | |
| File: jkff_udp.v , 10 | |
| Text: q ... | |
| enterUdp_body | |
| File: jkff_udp.v , 11 | |
| Text: table r 00 : ? : - ; ... | |
| enterSequential_body | |
| File: jkff_udp.v , 11 | |
| Text: table r 00 : ? : - ; ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 13 | |
| Text: r 00 : ? : - ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 13 | |
| Text: r 00 ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 13 | |
| Text: r 00 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 13 | |
| Text: r ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 13 | |
| Text: 00 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 13 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 13 | |
| Text: - ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 14 | |
| Text: r 01 : ? : 0 ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 14 | |
| Text: r 01 ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 14 | |
| Text: r 01 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 14 | |
| Text: r ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 14 | |
| Text: 01 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 14 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 14 | |
| Text: 0 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 14 | |
| Text: 0 ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 15 | |
| Text: r 10 : ? : 1 ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 15 | |
| Text: r 10 ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 15 | |
| Text: r 10 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 15 | |
| Text: r ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 15 | |
| Text: 10 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 15 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 15 | |
| Text: 1 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 15 | |
| Text: 1 ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 16 | |
| Text: r 11 : 0 : 1 ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 16 | |
| Text: r 11 ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 16 | |
| Text: r 11 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 16 | |
| Text: r ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 16 | |
| Text: 11 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 16 | |
| Text: 0 ... | |
| enterNext_state | |
| File: jkff_udp.v , 16 | |
| Text: 1 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 16 | |
| Text: 1 ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 17 | |
| Text: r 11 : 1 : 0 ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 17 | |
| Text: r 11 ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 17 | |
| Text: r 11 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 17 | |
| Text: r ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 17 | |
| Text: 11 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 17 | |
| Text: 1 ... | |
| enterNext_state | |
| File: jkff_udp.v , 17 | |
| Text: 0 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 17 | |
| Text: 0 ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 18 | |
| Text: f ? ? : ? : - ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 18 | |
| Text: f ? ? ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 18 | |
| Text: f ? ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 18 | |
| Text: f ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 18 | |
| Text: ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 18 | |
| Text: ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 18 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 18 | |
| Text: - ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 19 | |
| Text: ? * ? : ? : - ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 19 | |
| Text: ? * ? ... | |
| enterEdge_input_list | |
| File: jkff_udp.v , 19 | |
| Text: ? * ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 19 | |
| Text: ? ... | |
| enterEdge_indicator | |
| File: jkff_udp.v , 19 | |
| Text: * ... | |
| enterEdge_symbol | |
| File: jkff_udp.v , 19 | |
| Text: * ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 19 | |
| Text: ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 19 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 19 | |
| Text: - ... | |
| enterSequential_entry | |
| File: jkff_udp.v , 20 | |
| Text: ? ? * : ? : - ; ... | |
| enterSeq_input_list | |
| File: jkff_udp.v , 20 | |
| Text: ? ? * ... | |
| enterEdge_input_list | |
| File: jkff_udp.v , 20 | |
| Text: ? ? * ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 20 | |
| Text: ? ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 20 | |
| Text: ? ... | |
| enterEdge_indicator | |
| File: jkff_udp.v , 20 | |
| Text: * ... | |
| enterEdge_symbol | |
| File: jkff_udp.v , 20 | |
| Text: * ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 20 | |
| Text: ? ... | |
| enterNext_state | |
| File: jkff_udp.v , 20 | |
| Text: - ... | |
| enterEndtable | |
| File: jkff_udp.v , 21 | |
| Text: endtable ... | |
| enterEndprimitive | |
| File: jkff_udp.v , 22 | |
| Text: endprimitive ... | |
| enterDescription | |
| File: jkff_udp.v , 24 | |
| Text: primitive xor2_input ... | |
| enterUdp_declaration | |
| File: jkff_udp.v , 24 | |
| Text: primitive xor2_input ... | |
| enterUdp_nonansi_declaration | |
| File: jkff_udp.v , 24 | |
| Text: primitive xor2_input ... | |
| enterIdentifier | |
| File: jkff_udp.v , 24 | |
| Text: xor2_input ... | |
| enterUdp_port_list | |
| File: jkff_udp.v , 24 | |
| Text: c , a , b ... | |
| enterIdentifier | |
| File: jkff_udp.v , 24 | |
| Text: c ... | |
| enterIdentifier | |
| File: jkff_udp.v , 24 | |
| Text: a ... | |
| enterIdentifier | |
| File: jkff_udp.v , 24 | |
| Text: b ... | |
| enterUdp_port_declaration | |
| File: jkff_udp.v , 25 | |
| Text: output c ; ... | |
| enterUdp_output_declaration | |
| File: jkff_udp.v , 25 | |
| Text: output c ... | |
| enterIdentifier | |
| File: jkff_udp.v , 25 | |
| Text: c ... | |
| enterUdp_port_declaration | |
| File: jkff_udp.v , 26 | |
| Text: input a , b ; ... | |
| enterUdp_input_declaration | |
| File: jkff_udp.v , 26 | |
| Text: input a , b ... | |
| enterIdentifier_list | |
| File: jkff_udp.v , 26 | |
| Text: a , b ... | |
| enterIdentifier | |
| File: jkff_udp.v , 26 | |
| Text: a ... | |
| enterIdentifier | |
| File: jkff_udp.v , 26 | |
| Text: b ... | |
| enterUdp_body | |
| File: jkff_udp.v , 27 | |
| Text: table 00 : 0 ; 01 : ... | |
| enterCombinational_body | |
| File: jkff_udp.v , 27 | |
| Text: table 00 : 0 ; 01 : ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 28 | |
| Text: 00 : 0 ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 28 | |
| Text: 00 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 28 | |
| Text: 00 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 28 | |
| Text: 0 ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 29 | |
| Text: 01 : 1 ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 29 | |
| Text: 01 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 29 | |
| Text: 01 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 29 | |
| Text: 1 ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 30 | |
| Text: 10 : 1 ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 30 | |
| Text: 10 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 30 | |
| Text: 10 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 30 | |
| Text: 1 ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 31 | |
| Text: 11 : 0 ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 31 | |
| Text: 11 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 31 | |
| Text: 11 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 31 | |
| Text: 0 ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 32 | |
| Text: x 1 : x ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 32 | |
| Text: x 1 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 32 | |
| Text: x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 32 | |
| Text: 1 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 32 | |
| Text: x ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 33 | |
| Text: 1 x : x ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 33 | |
| Text: 1 x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 33 | |
| Text: 1 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 33 | |
| Text: x ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 33 | |
| Text: x ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 34 | |
| Text: x 0 : x ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 34 | |
| Text: x 0 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 34 | |
| Text: x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 34 | |
| Text: 0 ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 34 | |
| Text: x ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 35 | |
| Text: 0 x : x ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 35 | |
| Text: 0 x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 35 | |
| Text: 0 ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 35 | |
| Text: x ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 35 | |
| Text: x ... | |
| enterCombinational_entry | |
| File: jkff_udp.v , 36 | |
| Text: x x : x ; ... | |
| enterLevel_input_list | |
| File: jkff_udp.v , 36 | |
| Text: x x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 36 | |
| Text: x ... | |
| enterLevel_symbol | |
| File: jkff_udp.v , 36 | |
| Text: x ... | |
| enterOutput_symbol | |
| File: jkff_udp.v , 36 | |
| Text: x ... | |
| enterEndtable | |
| File: jkff_udp.v , 37 | |
| Text: endtable ... | |
| enterEndprimitive | |
| File: jkff_udp.v , 38 | |
| Text: endprimitive ... | |
| [INFO :PY0400] Processing source file "full_adder.v". | |
| enterTop_level_rule | |
| File: full_adder.v , 7 | |
| Text: module full_adder_ga ... | |
| enterNull_rule | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterSource_text | |
| File: full_adder.v , 7 | |
| Text: module full_adder_ga ... | |
| enterDescription | |
| File: full_adder.v , 7 | |
| Text: module full_adder_ga ... | |
| enterModule_declaration | |
| File: full_adder.v , 7 | |
| Text: module full_adder_ga ... | |
| enterModule_nonansi_header | |
| File: full_adder.v , 7 | |
| Text: module full_adder_ga ... | |
| enterModule_keyword | |
| File: full_adder.v , 7 | |
| Text: module ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: full_adder_gates ... | |
| enterList_of_ports | |
| File: full_adder.v , 7 | |
| Text: ( x , y , z , sum , ... | |
| enterPort | |
| File: full_adder.v , 7 | |
| Text: x ... | |
| enterPort_expression | |
| File: full_adder.v , 7 | |
| Text: x ... | |
| enterPort_reference | |
| File: full_adder.v , 7 | |
| Text: x ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: x ... | |
| enterConstant_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterPort | |
| File: full_adder.v , 7 | |
| Text: y ... | |
| enterPort_expression | |
| File: full_adder.v , 7 | |
| Text: y ... | |
| enterPort_reference | |
| File: full_adder.v , 7 | |
| Text: y ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: y ... | |
| enterConstant_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterPort | |
| File: full_adder.v , 7 | |
| Text: z ... | |
| enterPort_expression | |
| File: full_adder.v , 7 | |
| Text: z ... | |
| enterPort_reference | |
| File: full_adder.v , 7 | |
| Text: z ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: z ... | |
| enterConstant_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterPort | |
| File: full_adder.v , 7 | |
| Text: sum ... | |
| enterPort_expression | |
| File: full_adder.v , 7 | |
| Text: sum ... | |
| enterPort_reference | |
| File: full_adder.v , 7 | |
| Text: sum ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: sum ... | |
| enterConstant_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterPort | |
| File: full_adder.v , 7 | |
| Text: carry ... | |
| enterPort_expression | |
| File: full_adder.v , 7 | |
| Text: carry ... | |
| enterPort_reference | |
| File: full_adder.v , 7 | |
| Text: carry ... | |
| enterIdentifier | |
| File: full_adder.v , 7 | |
| Text: carry ... | |
| enterConstant_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 7 | |
| Text: ... | |
| enterModule_item | |
| File: full_adder.v , 8 | |
| Text: input x , y , z ; ... | |
| enterPort_declaration | |
| File: full_adder.v , 8 | |
| Text: input x , y , z ... | |
| enterInput_declaration | |
| File: full_adder.v , 8 | |
| Text: input x , y , z ... | |
| enterNet_port_type | |
| File: full_adder.v , 8 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: full_adder.v , 8 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: full_adder.v , 8 | |
| Text: x , y , z ... | |
| enterIdentifier | |
| File: full_adder.v , 8 | |
| Text: x ... | |
| enterIdentifier | |
| File: full_adder.v , 8 | |
| Text: y ... | |
| enterIdentifier | |
| File: full_adder.v , 8 | |
| Text: z ... | |
| enterModule_item | |
| File: full_adder.v , 9 | |
| Text: output sum , carry ; ... | |
| enterPort_declaration | |
| File: full_adder.v , 9 | |
| Text: output sum , carry ... | |
| enterOutput_declaration | |
| File: full_adder.v , 9 | |
| Text: output sum , carry ... | |
| enterNet_port_type | |
| File: full_adder.v , 9 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: full_adder.v , 9 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: full_adder.v , 9 | |
| Text: sum , carry ... | |
| enterIdentifier | |
| File: full_adder.v , 9 | |
| Text: sum ... | |
| enterIdentifier | |
| File: full_adder.v , 9 | |
| Text: carry ... | |
| enterModule_item | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterNon_port_module_item | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterModule_or_generate_item | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterModule_common_item | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterModule_or_generate_item_declaration | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterPackage_or_generate_item_declaration | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterNet_declaration | |
| File: full_adder.v , 10 | |
| Text: wire and1 , and2 , a ... | |
| enterNetType_Wire | |
| File: full_adder.v , 10 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: full_adder.v , 10 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: full_adder.v , 10 | |
| Text: and1 , and2 , and3 , ... | |
| enterNet_decl_assignment | |
| File: full_adder.v , 10 | |
| Text: and1 ... | |
| enterIdentifier | |
| File: full_adder.v , 10 | |
| Text: and1 ... | |
| enterNet_decl_assignment | |
| File: full_adder.v , 10 | |
| Text: and2 ... | |
| enterIdentifier | |
| File: full_adder.v , 10 | |
| Text: and2 ... | |
| enterNet_decl_assignment | |
| File: full_adder.v , 10 | |
| Text: and3 ... | |
| enterIdentifier | |
| File: full_adder.v , 10 | |
| Text: and3 ... | |
| enterNet_decl_assignment | |
| File: full_adder.v , 10 | |
| Text: sum1 ... | |
| enterIdentifier | |
| File: full_adder.v , 10 | |
| Text: sum1 ... | |
| enterModule_item | |
| File: full_adder.v , 12 | |
| Text: and U_and1 ( and1 , ... | |
| enterNon_port_module_item | |
| File: full_adder.v , 12 | |
| Text: and U_and1 ( and1 , ... | |
| enterModule_or_generate_item | |
| File: full_adder.v , 12 | |
| Text: and U_and1 ( and1 , ... | |
| enterGate_instantiation | |
| File: full_adder.v , 12 | |
| Text: and U_and1 ( and1 , ... | |
| enterNInpGate_And | |
| File: full_adder.v , 12 | |
| Text: and ... | |
| enterN_input_gate_instance | |
| File: full_adder.v , 12 | |
| Text: U_and1 ( and1 , x , ... | |
| enterName_of_instance | |
| File: full_adder.v , 12 | |
| Text: U_and1 ... | |
| enterIdentifier | |
| File: full_adder.v , 12 | |
| Text: U_and1 ... | |
| enterNet_lvalue | |
| File: full_adder.v , 12 | |
| Text: and1 ... | |
| enterPs_or_hierarchical_identifier | |
| File: full_adder.v , 12 | |
| Text: and1 ... | |
| enterIdentifier | |
| File: full_adder.v , 12 | |
| Text: and1 ... | |
| enterConstant_select | |
| File: full_adder.v , 12 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 12 | |
| Text: ... | |
| enterExpression | |
| File: full_adder.v , 12 | |
| Text: x ... | |
| enterPrimary | |
| File: full_adder.v , 12 | |
| Text: x ... | |
| enterPrimary_literal | |
| File: full_adder.v , 12 | |
| Text: x ... | |
| enterIdentifier | |
| File: full_adder.v , 12 | |
| Text: x ... | |
| enterExpression | |
| File: full_adder.v , 12 | |
| Text: y ... | |
| enterPrimary | |
| File: full_adder.v , 12 | |
| Text: y ... | |
| enterPrimary_literal | |
| File: full_adder.v , 12 | |
| Text: y ... | |
| enterIdentifier | |
| File: full_adder.v , 12 | |
| Text: y ... | |
| enterN_input_gate_instance | |
| File: full_adder.v , 13 | |
| Text: U_and2 ( and2 , x , ... | |
| enterName_of_instance | |
| File: full_adder.v , 13 | |
| Text: U_and2 ... | |
| enterIdentifier | |
| File: full_adder.v , 13 | |
| Text: U_and2 ... | |
| enterNet_lvalue | |
| File: full_adder.v , 13 | |
| Text: and2 ... | |
| enterPs_or_hierarchical_identifier | |
| File: full_adder.v , 13 | |
| Text: and2 ... | |
| enterIdentifier | |
| File: full_adder.v , 13 | |
| Text: and2 ... | |
| enterConstant_select | |
| File: full_adder.v , 13 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 13 | |
| Text: ... | |
| enterExpression | |
| File: full_adder.v , 13 | |
| Text: x ... | |
| enterPrimary | |
| File: full_adder.v , 13 | |
| Text: x ... | |
| enterPrimary_literal | |
| File: full_adder.v , 13 | |
| Text: x ... | |
| enterIdentifier | |
| File: full_adder.v , 13 | |
| Text: x ... | |
| enterExpression | |
| File: full_adder.v , 13 | |
| Text: z ... | |
| enterPrimary | |
| File: full_adder.v , 13 | |
| Text: z ... | |
| enterPrimary_literal | |
| File: full_adder.v , 13 | |
| Text: z ... | |
| enterIdentifier | |
| File: full_adder.v , 13 | |
| Text: z ... | |
| enterN_input_gate_instance | |
| File: full_adder.v , 14 | |
| Text: U_and3 ( and3 , y , ... | |
| enterName_of_instance | |
| File: full_adder.v , 14 | |
| Text: U_and3 ... | |
| enterIdentifier | |
| File: full_adder.v , 14 | |
| Text: U_and3 ... | |
| enterNet_lvalue | |
| File: full_adder.v , 14 | |
| Text: and3 ... | |
| enterPs_or_hierarchical_identifier | |
| File: full_adder.v , 14 | |
| Text: and3 ... | |
| enterIdentifier | |
| File: full_adder.v , 14 | |
| Text: and3 ... | |
| enterConstant_select | |
| File: full_adder.v , 14 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 14 | |
| Text: ... | |
| enterExpression | |
| File: full_adder.v , 14 | |
| Text: y ... | |
| enterPrimary | |
| File: full_adder.v , 14 | |
| Text: y ... | |
| enterPrimary_literal | |
| File: full_adder.v , 14 | |
| Text: y ... | |
| enterIdentifier | |
| File: full_adder.v , 14 | |
| Text: y ... | |
| enterExpression | |
| File: full_adder.v , 14 | |
| Text: z ... | |
| enterPrimary | |
| File: full_adder.v , 14 | |
| Text: z ... | |
| enterPrimary_literal | |
| File: full_adder.v , 14 | |
| Text: z ... | |
| enterIdentifier | |
| File: full_adder.v , 14 | |
| Text: z ... | |
| enterModule_item | |
| File: full_adder.v , 15 | |
| Text: or U_or ( carry , an ... | |
| enterNon_port_module_item | |
| File: full_adder.v , 15 | |
| Text: or U_or ( carry , an ... | |
| enterModule_or_generate_item | |
| File: full_adder.v , 15 | |
| Text: or U_or ( carry , an ... | |
| enterGate_instantiation | |
| File: full_adder.v , 15 | |
| Text: or U_or ( carry , an ... | |
| enterNInpGate_Or | |
| File: full_adder.v , 15 | |
| Text: or ... | |
| enterN_input_gate_instance | |
| File: full_adder.v , 15 | |
| Text: U_or ( carry , and1 ... | |
| enterName_of_instance | |
| File: full_adder.v , 15 | |
| Text: U_or ... | |
| enterIdentifier | |
| File: full_adder.v , 15 | |
| Text: U_or ... | |
| enterNet_lvalue | |
| File: full_adder.v , 15 | |
| Text: carry ... | |
| enterPs_or_hierarchical_identifier | |
| File: full_adder.v , 15 | |
| Text: carry ... | |
| enterIdentifier | |
| File: full_adder.v , 15 | |
| Text: carry ... | |
| enterConstant_select | |
| File: full_adder.v , 15 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 15 | |
| Text: ... | |
| enterExpression | |
| File: full_adder.v , 15 | |
| Text: and1 ... | |
| enterPrimary | |
| File: full_adder.v , 15 | |
| Text: and1 ... | |
| enterPrimary_literal | |
| File: full_adder.v , 15 | |
| Text: and1 ... | |
| enterIdentifier | |
| File: full_adder.v , 15 | |
| Text: and1 ... | |
| enterExpression | |
| File: full_adder.v , 15 | |
| Text: and2 ... | |
| enterPrimary | |
| File: full_adder.v , 15 | |
| Text: and2 ... | |
| enterPrimary_literal | |
| File: full_adder.v , 15 | |
| Text: and2 ... | |
| enterIdentifier | |
| File: full_adder.v , 15 | |
| Text: and2 ... | |
| enterExpression | |
| File: full_adder.v , 15 | |
| Text: and3 ... | |
| enterPrimary | |
| File: full_adder.v , 15 | |
| Text: and3 ... | |
| enterPrimary_literal | |
| File: full_adder.v , 15 | |
| Text: and3 ... | |
| enterIdentifier | |
| File: full_adder.v , 15 | |
| Text: and3 ... | |
| enterModule_item | |
| File: full_adder.v , 16 | |
| Text: xor U_sum ( sum , x ... | |
| enterNon_port_module_item | |
| File: full_adder.v , 16 | |
| Text: xor U_sum ( sum , x ... | |
| enterModule_or_generate_item | |
| File: full_adder.v , 16 | |
| Text: xor U_sum ( sum , x ... | |
| enterGate_instantiation | |
| File: full_adder.v , 16 | |
| Text: xor U_sum ( sum , x ... | |
| enterNInpGate_Xor | |
| File: full_adder.v , 16 | |
| Text: xor ... | |
| enterN_input_gate_instance | |
| File: full_adder.v , 16 | |
| Text: U_sum ( sum , x , y ... | |
| enterName_of_instance | |
| File: full_adder.v , 16 | |
| Text: U_sum ... | |
| enterIdentifier | |
| File: full_adder.v , 16 | |
| Text: U_sum ... | |
| enterNet_lvalue | |
| File: full_adder.v , 16 | |
| Text: sum ... | |
| enterPs_or_hierarchical_identifier | |
| File: full_adder.v , 16 | |
| Text: sum ... | |
| enterIdentifier | |
| File: full_adder.v , 16 | |
| Text: sum ... | |
| enterConstant_select | |
| File: full_adder.v , 16 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: full_adder.v , 16 | |
| Text: ... | |
| enterExpression | |
| File: full_adder.v , 16 | |
| Text: x ... | |
| enterPrimary | |
| File: full_adder.v , 16 | |
| Text: x ... | |
| enterPrimary_literal | |
| File: full_adder.v , 16 | |
| Text: x ... | |
| enterIdentifier | |
| File: full_adder.v , 16 | |
| Text: x ... | |
| enterExpression | |
| File: full_adder.v , 16 | |
| Text: y ... | |
| enterPrimary | |
| File: full_adder.v , 16 | |
| Text: y ... | |
| enterPrimary_literal | |
| File: full_adder.v , 16 | |
| Text: y ... | |
| enterIdentifier | |
| File: full_adder.v , 16 | |
| Text: y ... | |
| enterExpression | |
| File: full_adder.v , 16 | |
| Text: z ... | |
| enterPrimary | |
| File: full_adder.v , 16 | |
| Text: z ... | |
| enterPrimary_literal | |
| File: full_adder.v , 16 | |
| Text: z ... | |
| enterIdentifier | |
| File: full_adder.v , 16 | |
| Text: z ... | |
| enterEndmodule | |
| File: full_adder.v , 18 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "m_input_mult.v". | |
| [INFO :PY0400] Processing source file "lfsr_task.v". | |
| enterTop_level_rule | |
| File: lfsr_task.v , 2 | |
| Text: module LFSR_TASK ( c ... | |
| enterNull_rule | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterSource_text | |
| File: lfsr_task.v , 2 | |
| Text: module LFSR_TASK ( c ... | |
| enterDescription | |
| File: lfsr_task.v , 2 | |
| Text: module LFSR_TASK ( c ... | |
| enterModule_declaration | |
| File: lfsr_task.v , 2 | |
| Text: module LFSR_TASK ( c ... | |
| enterModule_nonansi_header | |
| File: lfsr_task.v , 2 | |
| Text: module LFSR_TASK ( c ... | |
| enterModule_keyword | |
| File: lfsr_task.v , 2 | |
| Text: module ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: LFSR_TASK ... | |
| enterList_of_ports | |
| File: lfsr_task.v , 2 | |
| Text: ( clock , Reset , se ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: clock ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: clock ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: clock ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: clock ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: Reset ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: Reset ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: Reset ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: Reset ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: seed1 ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: seed1 ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: seed1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: seed1 ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: seed2 ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: seed2 ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: seed2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: seed2 ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: random1 ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: random1 ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: random1 ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterPort | |
| File: lfsr_task.v , 2 | |
| Text: random2 ... | |
| enterPort_expression | |
| File: lfsr_task.v , 2 | |
| Text: random2 ... | |
| enterPort_reference | |
| File: lfsr_task.v , 2 | |
| Text: random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 2 | |
| Text: random2 ... | |
| enterConstant_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: lfsr_task.v , 2 | |
| Text: ... | |
| enterModule_item | |
| File: lfsr_task.v , 3 | |
| Text: input clock ; ... | |
| enterPort_declaration | |
| File: lfsr_task.v , 3 | |
| Text: input clock ... | |
| enterInput_declaration | |
| File: lfsr_task.v , 3 | |
| Text: input clock ... | |
| enterNet_port_type | |
| File: lfsr_task.v , 3 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 3 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: lfsr_task.v , 3 | |
| Text: clock ... | |
| enterIdentifier | |
| File: lfsr_task.v , 3 | |
| Text: clock ... | |
| enterModule_item | |
| File: lfsr_task.v , 4 | |
| Text: input [ 7 : 0 ] seed ... | |
| enterPort_declaration | |
| File: lfsr_task.v , 4 | |
| Text: input [ 7 : 0 ] seed ... | |
| enterInput_declaration | |
| File: lfsr_task.v , 4 | |
| Text: input [ 7 : 0 ] seed ... | |
| enterNet_port_type | |
| File: lfsr_task.v , 4 | |
| Text: [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 4 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 4 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 4 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 4 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 4 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 4 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 4 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 4 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 4 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 4 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 4 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: lfsr_task.v , 4 | |
| Text: seed1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 4 | |
| Text: seed1 ... | |
| enterModule_item | |
| File: lfsr_task.v , 5 | |
| Text: output [ 7 : 0 ] ran ... | |
| enterPort_declaration | |
| File: lfsr_task.v , 5 | |
| Text: output [ 7 : 0 ] ran ... | |
| enterOutput_declaration | |
| File: lfsr_task.v , 5 | |
| Text: output [ 7 : 0 ] ran ... | |
| enterNet_port_type | |
| File: lfsr_task.v , 5 | |
| Text: [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 5 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 5 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 5 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 5 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 5 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 5 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 5 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 5 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 5 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 5 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 5 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: lfsr_task.v , 5 | |
| Text: random1 , random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 5 | |
| Text: random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 5 | |
| Text: random2 ... | |
| enterModule_item | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterModule_or_generate_item_declaration | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterPackage_or_generate_item_declaration | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterData_declaration | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterVariable_declaration | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] random ... | |
| enterData_type | |
| File: lfsr_task.v , 6 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: lfsr_task.v , 6 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 6 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 6 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 6 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 6 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 6 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 6 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 6 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 6 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 6 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 6 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: lfsr_task.v , 6 | |
| Text: random1 , random2 ... | |
| enterVariable_decl_assignment | |
| File: lfsr_task.v , 6 | |
| Text: random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 6 | |
| Text: random1 ... | |
| enterVariable_decl_assignment | |
| File: lfsr_task.v , 6 | |
| Text: random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 6 | |
| Text: random2 ... | |
| enterModule_item | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_or_generate_item_declaration | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterPackage_or_generate_item_declaration | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterParameter_declaration | |
| File: lfsr_task.v , 7 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 7 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 7 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.venterTop_level_rule | |
| File: m_input_mult.v , 2 | |
| Text: module case1 ( in1 , ... | |
| enterNull_rule | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterSource_text | |
| File: m_input_mult.v , 2 | |
| Text: module case1 ( in1 , ... | |
| enterDescription | |
| File: m_input_mult.v , 2 | |
| Text: module case1 ( in1 , ... | |
| enterModule_declaration | |
| File: m_input_mult.v , 2 | |
| Text: module case1 ( in1 , ... | |
| enterModule_nonansi_header | |
| File: m_input_mult.v , 2 | |
| Text: module case1 ( in1 , ... | |
| enterModule_keyword | |
| File: m_input_mult.v , 2 | |
| Text: module ... | |
| enterIdentifier | |
| File: m_input_mult.v , 2 | |
| Text: case1 ... | |
| enterList_of_ports | |
| File: m_input_mult.v , 2 | |
| Text: ( in1 , in2 , out2 ) ... | |
| enterPort | |
| File: m_input_mult.v , 2 | |
| Text: in1 ... | |
| enterPort_expression | |
| File: m_input_mult.v , 2 | |
| Text: in1 ... | |
| enterPort_reference | |
| File: m_input_mult.v , 2 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 2 | |
| Text: in1 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 2 | |
| Text: in2 ... | |
| enterPort_expression | |
| File: m_input_mult.v , 2 | |
| Text: in2 ... | |
| enterPort_reference | |
| File: m_input_mult.v , 2 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 2 | |
| Text: in2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 2 | |
| Text: out2 ... | |
| enterPort_expression | |
| File: m_input_mult.v , 2 | |
| Text: out2 ... | |
| enterPort_reference | |
| File: m_input_mult.v , 2 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 2 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 2 | |
| Text: ... | |
| enterModule_item | |
| File: m_input_mult.v , 3 | |
| Text: input [ 7 : 0 ] in1 ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 3 | |
| Text: input [ 7 : 0 ] in1 ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 3 | |
| Text: input [ 7 : 0 ] in1 ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 3 | |
| Text: [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 3 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 3 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 3 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 3 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 3 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 3 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 3 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 3 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 3 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 3 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 3 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 3 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 3 | |
| Text: in1 ... | |
| enterModule_item | |
| File: m_input_mult.v , 4 | |
| Text: input [ 2 : 0 ] in2 ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 4 | |
| Text: input [ 2 : 0 ] in2 ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 4 | |
| Text: input [ 2 : 0 ] in2 ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 4 | |
| Text: [ 2 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 4 | |
| Text: [ 2 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 4 | |
| Text: [ 2 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 4 | |
| Text: 2 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 4 | |
| Text: 2 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 4 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 4 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 4 | |
| Text: 2 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 4 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 4 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 4 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 4 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 4 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 4 | |
| Text: in2 ... | |
| enterModule_item | |
| File: m_input_mult.v , 5 | |
| Text: output out2 ; ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 5 | |
| Text: output out2 ... | |
| enterOutput_declaration | |
| File: m_input_mult.v , 5 | |
| Text: output out2 ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 5 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 5 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 5 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 5 | |
| Text: out2 ... | |
| enterModule_item | |
| File: m_input_mult.v , 6 | |
| Text: always @ ( in1 or in ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 6 | |
| Text: always @ ( in1 or in ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 6 | |
| Text: always @ ( in1 or in ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 6 | |
| Text: always @ ( in1 or in ... | |
| enterAlways_construct | |
| File: m_input_mult.v , 6 | |
| Text: always @ ( in1 or in ... | |
| enterAlwaysKeywd_Always | |
| File: m_input_mult.v , 6 | |
| Text: always ... | |
| enterStatement | |
| File: m_input_mult.v , 6 | |
| Text: @ ( in1 or in2 ) cas ... | |
| enterStatement_item | |
| File: m_input_mult.v , 6 | |
| Text: @ ( in1 or in2 ) cas ... | |
| enterProcedural_timing_control_statement | |
| File: m_input_mult.v , 6 | |
| Text: @ ( in1 or in2 ) cas ... | |
| enterProcedural_timing_control | |
| File: m_input_mult.v , 6 | |
| Text: @ ( in1 or in2 ) ... | |
| enterEvent_control | |
| File: m_input_mult.v , 6 | |
| Text: @ ( in1 or in2 ) ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 6 | |
| Text: in1 or in2 ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 6 | |
| Text: in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 6 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 6 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 6 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 6 | |
| Text: in1 ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 6 | |
| Text: in2 ... | |
| enterExpression | |
| File: m_input_mult.v , 6 | |
| Text: in2 ... | |
| enterPrimary | |
| File: m_input_mult.v , 6 | |
| Text: in2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 6 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 6 | |
| Text: in2 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 7 | |
| Text: case ( in2 ) 2'b000 ... | |
| enterStatement | |
| File: m_input_mult.v , 7 | |
| Text: case ( in2 ) 2'b000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 7 | |
| Text: case ( in2 ) 2'b000 ... | |
| enterCase_statement | |
| File: m_input_mult.v , 7 | |
| Text: case ( in2 ) 2'b000 ... | |
| enterCaseKeyword_Case | |
| File: m_input_mult.v , 7 | |
| Text: case ... | |
| enterExpression | |
| File: m_input_mult.v , 7 | |
| Text: in2 ... | |
| enterPrimary | |
| File: m_input_mult.v , 7 | |
| Text: in2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 7 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 7 | |
| Text: in2 ... | |
| enterCase_item | |
| File: m_input_mult.v , 8 | |
| Text: 2'b000 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 8 | |
| Text: 2'b000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 8 | |
| Text: 2'b000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 8 | |
| Text: 2'b000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 8 | |
| Text: 2'b000 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 8 | |
| Text: out2 = in1 [ 0 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 8 | |
| Text: out2 = in1 [ 0 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 8 | |
| Text: out2 = in1 [ 0 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 8 | |
| Text: out2 = in1 [ 0 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 8 | |
| Text: out2 = in1 [ 0 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 8 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 8 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 8 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 8 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 8 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 8 | |
| Text: in1 [ 0 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 8 | |
| Text: in1 [ 0 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 8 | |
| Text: in1 [ 0 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 8 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 8 | |
| Text: [ 0 ] , 7 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 7 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 7 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 7 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 7 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 7 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 7 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 7 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 7 | |
| Text: 0 ... | |
| enterList_of_param_assignments | |
| File: lfsr_task.v , 7 | |
| Text: Chain1 = 8'b10001110 ... | |
| enterParam_assignment | |
| File: lfsr_task.v , 7 | |
| Text: Chain1 = 8'b10001110 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 7 | |
| Text: Chain1 ... | |
| enterConstant_param_expression | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterConstant_mintypmax_expression | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 7 | |
| Text: 8'b10001110 ... | |
| enterModule_item | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterModule_or_generate_item_declaration | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterPackage_or_generate_item_declaration | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterParameter_declaration | |
| File: lfsr_task.v , 8 | |
| Text: parameter [ 7 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 8 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 8 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 8 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 8 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 8 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 8 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 8 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 8 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 8 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 8 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 8 | |
| Text: 0 ... | |
| enterList_of_param_assignments | |
| File: lfsr_task.v , 8 | |
| Text: Chain2 = 8'b10101110 ... | |
| enterParam_assignment | |
| File: lfsr_task.v , 8 | |
| Text: Chain2 = 8'b10101110 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 8 | |
| Text: Chain2 ... | |
| enterConstant_param_expression | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterConstant_mintypmax_expression | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 8 | |
| Text: 8'b10101110 ... | |
| enterModule_item | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterModule_or_generate_item_declaration | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterPackage_or_generate_item_declaration | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterTask_declaration | |
| File: lfsr_task.v , 9 | |
| Text: task LFSR_TAPS8_TASK ... | |
| enterTask_body_declaration | |
| File: lfsr_task.v , 9 | |
| Text: LFSR_TAPS8_TASK ; in ... | |
| enterIdentifier | |
| File: lfsr_task.v , 9 | |
| Text: LFSR_TAPS8_TASK ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 10 | |
| Text: input [ 7 : 0 ] A ; ... | |
| enterTf_port_declaration | |
| File: lfsr_task.v , 10 | |
| Text: input [ 7 : 0 ] A ; ... | |
| enterTfPortDir_Inp | |
| File: lfsr_task.v , 10 | |
| Text: input ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 10 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 10 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 10 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 10 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 10 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 10 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 10 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 10 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 10 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 10 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 10 | |
| Text: 0 ... | |
| enterList_of_tf_variable_identifiers | |
| File: lfsr_task.v , 10 | |
| Text: A ... | |
| enterIdentifier | |
| File: lfsr_task.v , 10 | |
| Text: A ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 11 | |
| Text: input [ 7 : 0 ] Chai ... | |
| enterTf_port_declaration | |
| File: lfsr_task.v , 11 | |
| Text: input [ 7 : 0 ] Chai ... | |
| enterTfPortDir_Inp | |
| File: lfsr_task.v , 11 | |
| Text: input ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 11 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 11 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 11 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 11 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 11 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 11 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 11 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 11 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 11 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 11 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 11 | |
| Text: 0 ... | |
| enterList_of_tf_variable_identifiers | |
| File: lfsr_task.v , 11 | |
| Text: Chain ... | |
| enterIdentifier | |
| File: lfsr_task.v , 11 | |
| Text: Chain ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 12 | |
| Text: output [ 7 : 0 ] Nex ... | |
| enterTf_port_declaration | |
| File: lfsr_task.v , 12 | |
| Text: output [ 7 : 0 ] Nex ... | |
| enterTfPortDir_Out | |
| File: lfsr_task.v , 12 | |
| Text: output ... | |
| enterData_type_or_implicit | |
| File: lfsr_task.v , 12 | |
| Text: [ 7 : 0 ] ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 12 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 12 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 12 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 12 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 12 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 12 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 12 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 12 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 12 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 12 | |
| Text: 0 ... | |
| enterList_of_tf_variable_identifiers | |
| File: lfsr_task.v , 12 | |
| Text: Next_LFSR_Reg ... | |
| enterIdentifier | |
| File: lfsr_task.v , 12 | |
| Text: Next_LFSR_Reg ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 13 | |
| Text: integer i ; ... | |
| enterBlock_item_declaration | |
| File: lfsr_task.v , 13 | |
| Text: integer i ; ... | |
| enterData_declaration | |
| File: lfsr_task.v , 13 | |
| Text: integer i ; ... | |
| enterVariable_declaration | |
| File: lfsr_task.v , 13 | |
| Text: integer i ; ... | |
| enterData_type | |
| File: lfsr_task.v , 13 | |
| Text: integer ... | |
| enterIntegerAtomType_Int | |
| File: lfsr_task.v , 13 | |
| Text: integer ... | |
| enterList_of_variable_decl_assignments | |
| File: lfsr_task.v , 13 | |
| Text: i ... | |
| enterVariable_decl_assignment | |
| File: lfsr_task.v , 13 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 13 | |
| Text: i ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 14 | |
| Text: reg XorNor ; ... | |
| enterBlock_item_declaration | |
| File: lfsr_task.v , 14 | |
| Text: reg XorNor ; ... | |
| enterData_declaration | |
| File: lfsr_task.v , 14 | |
| Text: reg XorNor ; ... | |
| enterVariable_declaration | |
| File: lfsr_task.v , 14 | |
| Text: reg XorNor ; ... | |
| enterData_type | |
| File: lfsr_task.v , 14 | |
| Text: reg ... | |
| enterIntVec_TypeReg | |
| File: lfsr_task.v , 14 | |
| Text: reg ... | |
| enterList_of_variable_decl_assignments | |
| File: lfsr_task.v , 14 | |
| Text: XorNor ... | |
| enterVariable_decl_assignment | |
| File: lfsr_task.v , 14 | |
| Text: XorNor ... | |
| enterIdentifier | |
| File: lfsr_task.v , 14 | |
| Text: XorNor ... | |
| enterTf_item_declaration | |
| File: lfsr_task.v , 15 | |
| Text: reg [ 7 : 0 ] Next_L ... | |
| enterBlock_item_declaration | |
| File: lfsr_task.v , 15 | |
| Text: reg [ 7 : 0 ] Next_L ... | |
| enterData_declaration | |
| File: lfsr_task.v , 15 | |
| Text: reg [ 7 : 0 ] Next_L ... | |
| enterVariable_declaration | |
| File: lfsr_task.v , 15 | |
| Text: reg [ 7 : 0 ] Next_L ... | |
| enterData_type | |
| File: lfsr_task.v , 15 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: lfsr_task.v , 15 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: lfsr_task.v , 15 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: lfsr_task.v , 15 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 15 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 15 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 15 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 15 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 15 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 15 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 15 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 15 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: lfsr_task.v , 15 | |
| Text: Next_LFSR_Reg ... | |
| enterVariable_decl_assignment | |
| File: lfsr_task.v , 15 | |
| Text: Next_LFSR_Reg ... | |
| enterIdentifier | |
| File: lfsr_task.v , 15 | |
| Text: Next_LFSR_Reg ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 16 | |
| Text: begin XorNor = A [ 7 ... | |
| enterStatement | |
| File: lfsr_task.v , 16 | |
| Text: begin XorNor = A [ 7 ... | |
| enterStatement_item | |
| File: lfsr_task.v , 16 | |
| Text: begin XorNor = A [ 7 ... | |
| enterSeq_block | |
| File: lfsr_task.v , 16 | |
| Text: begin XorNor = A [ 7 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 17 | |
| Text: XorNor = A [ 7 ] ^ ~ ... | |
| enterStatement | |
| File: lfsr_task.v , 17 | |
| Text: XorNor = A [ 7 ] ^ ~ ... | |
| enterStatement_item | |
| File: lfsr_task.v , 17 | |
| Text: XorNor = A [ 7 ] ^ ~ ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 17 | |
| Text: XorNor = A [ 7 ] ^ ~ ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 17 | |
| Text: XorNor = A [ 7 ] ^ ~ ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 17 | |
| Text: XorNor ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 17 | |
| Text: XorNor ... | |
| enterSelect | |
| File: lfsr_task.v , 17 | |
| Text: ... | |
| enterBit_select | |
| File: lfsr_task.v , 17 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 17 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 17 | |
| Text: A [ 7 ] ^ ~| A [ 6 : ... | |
| enterExpression | |
| File: lfsr_task.v , 17 | |
| Text: A [ 7 ] ... | |
| enterPrimary | |
| File: lfsr_task.v , 17 | |
| Text: A [ 7 ] ... | |
| enterComplex_func_call | |
| File: lfsr_task.v , 17 | |
| Text: A [ 7 ] ... | |
| enterIdentifier | |
| File: lfsr_task.v , 17 | |
| Text: A ... | |
| enterSelect | |
| File: lfsr_task.v , 17 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 17 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: lfsr_task.v , 17 | |
| Text: 7 ... | |
| enterPrimary | |
| File: lfsr_task.v , 17 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 17 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 17 | |
| Text: 7 ... | |
| enterBinOp_BitwXor | |
| File: lfsr_task.v , 17 | |
| Text: ^ ... | |
| enterExpression | |
| File: lfsr_task.v , 17 | |
| Text: ~| A [ 6 : 0 ] ... | |
| enterUnary_ReductNor | |
| File: lfsr_task.v , 17 | |
| Text: ~| ... | |
| enterPrimary | |
| File: lfsr_task.v , 17 | |
| Text: A [ 6 : 0 ] ... | |
| enterComplex_func_call | |
| File: lfsr_task.v , 17 | |
| Text: A [ 6 : 0 ] ... | |
| enterIdentifier | |
| File: lfsr_task.v , 17 | |
| Text: A ... | |
| enterSelect | |
| File: lfsr_task.v , 17 | |
| Text: [ 6 : 0 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 17 | |
| Text: ... | |
| enterPart_select_range | |
| File: lfsr_task.v , 17 | |
| Text: 6 : 0 ... | |
| enterConstant_range | |
| File: lfsr_task.v , 17 | |
| Text: 6 : 0 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 17 | |
| Text: 6 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 17 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 17 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 17 | |
| Text: 6 ... | |
| enterConstant_expression | |
| File: lfsr_task.v , 17 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: lfsr_task.v , 17 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 17 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 17 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 18 | |
| Text: for ( i = 1 ; I <= 7 ... | |
| enterStatement | |
| File: lfsr_task.v , 18 | |
| Text: for ( i = 1 ; I <= 7 ... | |
| enterStatement_item | |
| File: lfsr_task.v , 18 | |
| Text: for ( i = 1 ; I <= 7 ... | |
| enterLoop_statement | |
| File: lfsr_task.v , 18 | |
| Text: for ( i = 1 ; I <= 7 ... | |
| enterFor_initialization | |
| File: lfsr_task.v , 18 | |
| Text: i = 1 ... | |
| enterList_of_variable_assignments | |
| File: lfsr_task.v , 18 | |
| Text: i = 1 ... | |
| enterVariable_assignment | |
| File: lfsr_task.v , 18 | |
| Text: i = 1 ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 18 | |
| Text: i ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 18 | |
| Text: i ... | |
| enterSelect | |
| File: lfsr_task.v , 18 | |
| Text: ... | |
| enterBit_select | |
| File: lfsr_task.v , 18 | |
| Text: ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: I <= 7 ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterPrimary | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterIdentifier | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterBinOp_LessEqual | |
| File: lfsr_task.v , 18 | |
| Text: <= ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: 7 ... | |
| enterPrimary | |
| File: lfsr_task.v , 18 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 18 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 18 | |
| Text: 7 ... | |
| enterFor_step | |
| File: lfsr_task.v , 18 | |
| Text: i = I + 1 ... | |
| enterFor_step_assignment | |
| File: lfsr_task.v , 18 | |
| Text: i = I + 1 ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 18 | |
| Text: i = I + 1 ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 18 | |
| Text: i ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 18 | |
| Text: i ... | |
| enterSelect | |
| File: lfsr_task.v , 18 | |
| Text: ... | |
| enterBit_select | |
| File: lfsr_task.v , 18 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 18 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: I + 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterPrimary | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterIdentifier | |
| File: lfsr_task.v , 18 | |
| Text: I ... | |
| enterBinOp_Plus | |
| File: lfsr_task.v , 18 | |
| Text: + ... | |
| enterExpression | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 18 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 19 | |
| Text: if ( Chain [ i - 1 ] ... | |
| enterStatement | |
| File: lfsr_task.v , 19 | |
| Text: if ( Chain [ i - 1 ] ... | |
| enterStatement_item | |
| File: lfsr_task.v , 19 | |
| Text: if ( Chain [ i - 1 ] ... | |
| enterConditional_statement | |
| File: lfsr_task.v , 19 | |
| Text: if ( Chain [ i - 1 ] ... | |
| enterCond_predicate | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] == 1 ... | |
| enterExpression_or_cond_pattern | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] == 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] == 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] ... | |
| enterPrimary | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] ... | |
| enterComplex_func_call | |
| File: lfsr_task.v , 19 | |
| Text: Chain [ i - 1 ] ... | |
| enterIdentifier | |
| File: lfsr_task.v , 19 | |
| Text: Chain ... | |
| enterSelect | |
| File: lfsr_task.v , 19 | |
| Text: [ i - 1 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 19 | |
| Text: [ i - 1 ] ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: i - 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: i ... | |
| enterPrimary | |
| File: lfsr_task.v , 19 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 19 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 19 | |
| Text: i ... | |
| enterBinOp_Minus | |
| File: lfsr_task.v , 19 | |
| Text: - ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterBinOp_Equiv | |
| File: lfsr_task.v , 19 | |
| Text: == ... | |
| enterExpression | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 19 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterStatement | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterStatement_item | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 20 | |
| Text: Next_LFSR_Reg ... | |
| enterSelect | |
| File: lfsr_task.v , 20 | |
| Text: [ i ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 20 | |
| Text: [ i ] ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterPrimary | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 20 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: A [ i - 1 ] ^ XorNor ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: A [ i - 1 ] ... | |
| enterPrimary | |
| File: lfsr_task.v , 20 | |
| Text: A [ i - 1 ] ... | |
| enterComplex_func_call | |
| File: lfsr_task.v , 20 | |
| Text: A [ i - 1 ] ... | |
| enterIdentifier | |
| File: lfsr_task.v , 20 | |
| Text: A ... | |
| enterSelect | |
| File: lfsr_task.v , 20 | |
| Text: [ i - 1 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 20 | |
| Text: [ i - 1 ] ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: i - 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterPrimary | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 20 | |
| Text: i ... | |
| enterBinOp_Minus | |
| File: lfsr_task.v , 20 | |
| Text: - ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 20 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 20 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 20 | |
| Text: 1 ... | |
| enterBinOp_BitwXor | |
| File: lfsr_task.v , 20 | |
| Text: ^ ... | |
| enterExpression | |
| File: lfsr_task.v , 20 | |
| Text: XorNor ... | |
| enterPrimary | |
| File: lfsr_task.v , 20 | |
| Text: XorNor ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 20 | |
| Text: XorNor ... | |
| enterIdentifier | |
| File: lfsr_task.v , 20 | |
| Text: XorNor ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterStatement | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterStatement_item | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg [ i ] ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 22 | |
| Text: Next_LFSR_Reg ... | |
| enterSelect | |
| File: lfsr_task.v , 22 | |
| Text: [ i ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 22 | |
| Text: [ i ] ... | |
| enterExpression | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterPrimary | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 22 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 22 | |
| Text: A [ i - 1 ] ... | |
| enterPrimary | |
| File: lfsr_task.v , 22 | |
| Text: A [ i - 1 ] ... | |
| enterComplex_func_call | |
| File: lfsr_task.v , 22 | |
| Text: A [ i - 1 ] ... | |
| enterIdentifier | |
| File: lfsr_task.v , 22 | |
| Text: A ... | |
| enterSelect | |
| File: lfsr_task.v , 22 | |
| Text: [ i - 1 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 22 | |
| Text: [ i - 1 ] ... | |
| enterExpression | |
| File: lfsr_task.v , 22 | |
| Text: i - 1 ... | |
| enterExpression | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterPrimary | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterIdentifier | |
| File: lfsr_task.v , 22 | |
| Text: i ... | |
| enterBinOp_Minus | |
| File: lfsr_task.v , 22 | |
| Text: - ... | |
| enterExpression | |
| File: lfsr_task.v , 22 | |
| Text: 1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 22 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 22 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 22 | |
| Text: 1 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterStatement | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterStatement_item | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg [ 0 ] ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 23 | |
| Text: Next_LFSR_Reg ... | |
| enterSelect | |
| File: lfsr_task.v , 23 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: lfsr_task.v , 23 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: lfsr_task.v , 23 | |
| Text: 0 ... | |
| enterPrimary | |
| File: lfsr_task.v , 23 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 23 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: lfsr_task.v , 23 | |
| Text: 0 ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 23 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 23 | |
| Text: XorNor ... | |
| enterPrimary | |
| File: lfsr_task.v , 23 | |
| Text: XorNor ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 23 | |
| Text: XorNor ... | |
| enterIdentifier | |
| File: lfsr_task.v , 23 | |
| Text: XorNor ... | |
| enterEnd | |
| File: lfsr_task.v , 24 | |
| Text: end ... | |
| enterEndtask | |
| File: lfsr_task.v , 25 | |
| Text: endtask ... | |
| enterModule_item | |
| File: lfsr_task.v , 27 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 27 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 27 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 27 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: lfsr_task.v , 27 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: lfsr_task.v , 27 | |
| Text: always ... | |
| enterStatement | |
| File: lfsr_task.v , 27 | |
| Text: @ ( posedge clock or ... | |
| enterStatement_item | |
| File: lfsr_task.v , 27 | |
| Text: @ ( posedge clock or ... | |
| enterProcedural_timing_control_statement | |
| File: lfsr_task.v , 27 | |
| Text: @ ( posedge clock or ... | |
| enterProcedural_timing_control | |
| File: lfsr_task.v , 27 | |
| Text: @ ( posedge clock or ... | |
| enterEvent_control | |
| File: lfsr_task.v , 27 | |
| Text: @ ( posedge clock or ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 27 | |
| Text: posedge clock or neg ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 27 | |
| Text: posedge clock ... | |
| enterEdge_Posedge | |
| File: lfsr_task.v , 27 | |
| Text: posedge ... | |
| enterExpression | |
| File: lfsr_task.v , 27 | |
| Text: clock ... | |
| enterPrimary | |
| File: lfsr_task.v , 27 | |
| Text: clock ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 27 | |
| Text: clock ... | |
| enterIdentifier | |
| File: lfsr_task.v , 27 | |
| Text: clock ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 27 | |
| Text: negedge Reset ... | |
| enterEdge_Negedge | |
| File: lfsr_task.v , 27 | |
| Text: negedge ... | |
| enterExpression | |
| File: lfsr_task.v , 27 | |
| Text: Reset ... | |
| enterPrimary | |
| File: lfsr_task.v , 27 | |
| Text: Reset ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 27 | |
| Text: Reset ... | |
| enterIdentifier | |
| File: lfsr_task.v , 27 | |
| Text: Reset ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 28 | |
| Text: if ( ! Reset ) rando ... | |
| enterStatement | |
| File: lfsr_task.v , 28 | |
| Text: if ( ! Reset ) rando ... | |
| enterStatement_item | |
| File: lfsr_task.v , 28 | |
| Text: if ( ! Reset ) rando ... | |
| enterConditional_statement | |
| File: lfsr_task.v ... | |
| enterBit_select | |
| File: m_input_mult.v , 8 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 8 | |
| Text: 0 ... | |
| enterPrimary | |
| File: m_input_mult.v , 8 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 8 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 8 | |
| Text: 0 ... | |
| enterCase_item | |
| File: m_input_mult.v , 9 | |
| Text: 2'b001 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 9 | |
| Text: 2'b001 ... | |
| enterPrimary | |
| File: m_input_mult.v , 9 | |
| Text: 2'b001 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 9 | |
| Text: 2'b001 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 9 | |
| Text: 2'b001 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 9 | |
| Text: out2 = in1 [ 1 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 9 | |
| Text: out2 = in1 [ 1 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 9 | |
| Text: out2 = in1 [ 1 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 9 | |
| Text: out2 = in1 [ 1 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 9 | |
| Text: out2 = in1 [ 1 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 9 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 9 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 9 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 9 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 9 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 9 | |
| Text: in1 [ 1 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 9 | |
| Text: in1 [ 1 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 9 | |
| Text: in1 [ 1 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 9 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 9 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 9 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 9 | |
| Text: 1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 9 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 9 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 9 | |
| Text: 1 ... | |
| enterCase_item | |
| File: m_input_mult.v , 10 | |
| Text: 2'b010 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 10 | |
| Text: 2'b010 ... | |
| enterPrimary | |
| File: m_input_mult.v , 10 | |
| Text: 2'b010 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 10 | |
| Text: 2'b010 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 10 | |
| Text: 2'b010 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 10 | |
| Text: out2 = in1 [ 2 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 10 | |
| Text: out2 = in1 [ 2 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 10 | |
| Text: out2 = in1 [ 2 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 10 | |
| Text: out2 = in1 [ 2 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 10 | |
| Text: out2 = in1 [ 2 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 10 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 10 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 10 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 10 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 10 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 10 | |
| Text: in1 [ 2 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 10 | |
| Text: in1 [ 2 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 10 | |
| Text: in1 [ 2 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 10 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 10 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 10 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 10 | |
| Text: 2 ... | |
| enterPrimary | |
| File: m_input_mult.v , 10 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 10 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 10 | |
| Text: 2 ... | |
| enterCase_item | |
| File: m_input_mult.v , 11 | |
| Text: 2'b011 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 11 | |
| Text: 2'b011 ... | |
| enterPrimary | |
| File: m_input_mult.v , 11 | |
| Text: 2'b011 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 11 | |
| Text: 2'b011 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 11 | |
| Text: 2'b011 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 11 | |
| Text: out2 = in1 [ 3 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 11 | |
| Text: out2 = in1 [ 3 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 11 | |
| Text: out2 = in1 [ 3 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 11 | |
| Text: out2 = in1 [ 3 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 11 | |
| Text: out2 = in1 [ 3 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 11 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 11 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 11 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 11 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 11 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 11 | |
| Text: in1 [ 3 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 11 | |
| Text: in1 [ 3 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 11 | |
| Text: in1 [ 3 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 11 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 11 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 11 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 11 | |
| Text: 3 ... | |
| enterPrimary | |
| File: m_input_mult.v , 11 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 11 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 11 | |
| Text: 3 ... | |
| enterCase_item | |
| File: m_input_mult.v , 12 | |
| Text: 2'b100 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 12 | |
| Text: 2'b100 ... | |
| enterPrimary | |
| File: m_input_mult.v , 12 | |
| Text: 2'b100 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 12 | |
| Text: 2'b100 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 12 | |
| Text: 2'b100 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 12 | |
| Text: out2 = in1 [ 4 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 12 | |
| Text: out2 = in1 [ 4 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 12 | |
| Text: out2 = in1 [ 4 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 12 | |
| Text: out2 = in1 [ 4 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 12 | |
| Text: out2 = in1 [ 4 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 12 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 12 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 12 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 12 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 12 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 12 | |
| Text: in1 [ 4 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 12 | |
| Text: in1 [ 4 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 12 | |
| Text: in1 [ 4 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 12 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 12 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 12 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 12 | |
| Text: 4 ... | |
| enterPrimary | |
| File: m_input_mult.v , 12 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 12 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 12 | |
| Text: 4 ... | |
| enterCase_item | |
| File: m_input_mult.v , 13 | |
| Text: 2'b101 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 13 | |
| Text: 2'b101 ... | |
| enterPrimary | |
| File: m_input_mult.v , 13 | |
| Text: 2'b101 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 13 | |
| Text: 2'b101 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 13 | |
| Text: 2'b101 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 13 | |
| Text: out2 = in1 [ 5 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 13 | |
| Text: out2 = in1 [ 5 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 13 | |
| Text: out2 = in1 [ 5 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 13 | |
| Text: out2 = in1 [ 5 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 13 | |
| Text: out2 = in1 [ 5 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 13 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 13 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 13 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 13 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 13 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 13 | |
| Text: in1 [ 5 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 28 | |
| Text: if ( ! Reset ) rando ... | |
| enterCond_predicate | |
| File: lfsr_task.v , 28 | |
| Text: ! Reset ... | |
| enterExpression_or_cond_pattern | |
| File: lfsr_task.v , 28 | |
| Text: ! Reset ... | |
| enterExpression | |
| File: lfsr_task.v , 28 | |
| Text: ! Reset ... | |
| enterUnary_Not | |
| File: lfsr_task.v , 28 | |
| Text: ! ... | |
| enterPrimary | |
| File: lfsr_task.v , 28 | |
| Text: Reset ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 28 | |
| Text: Reset ... | |
| enterIdentifier | |
| File: lfsr_task.v , 28 | |
| Text: Reset ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 29 | |
| Text: random1 = seed1 ; ... | |
| enterStatement | |
| File: lfsr_task.v , 29 | |
| Text: random1 = seed1 ; ... | |
| enterStatement_item | |
| File: lfsr_task.v , 29 | |
| Text: random1 = seed1 ; ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 29 | |
| Text: random1 = seed1 ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 29 | |
| Text: random1 = seed1 ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 29 | |
| Text: random1 ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 29 | |
| Text: random1 ... | |
| enterSelect | |
| File: lfsr_task.v , 29 | |
| Text: ... | |
| enterBit_select | |
| File: lfsr_task.v , 29 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 29 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 29 | |
| Text: seed1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 29 | |
| Text: seed1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 29 | |
| Text: seed1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 29 | |
| Text: seed1 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ( random1 ... | |
| enterStatement | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ( random1 ... | |
| enterStatement_item | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ( random1 ... | |
| enterSubroutine_call_statement | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ( random1 ... | |
| enterSubroutine_call | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ( random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 31 | |
| Text: LFSR_TASK ... | |
| enterList_of_arguments | |
| File: lfsr_task.v , 31 | |
| Text: random1 , Chain1 , r ... | |
| enterExpression | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterExpression | |
| File: lfsr_task.v , 31 | |
| Text: Chain1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 31 | |
| Text: Chain1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 31 | |
| Text: Chain1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 31 | |
| Text: Chain1 ... | |
| enterExpression | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterPrimary | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 31 | |
| Text: random1 ... | |
| enterModule_item | |
| File: lfsr_task.v , 32 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: lfsr_task.v , 32 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: lfsr_task.v , 32 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: lfsr_task.v , 32 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: lfsr_task.v , 32 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: lfsr_task.v , 32 | |
| Text: always ... | |
| enterStatement | |
| File: lfsr_task.v , 32 | |
| Text: @ ( posedge clock or ... | |
| enterStatement_item | |
| File: lfsr_task.v , 32 | |
| Text: @ ( posedge clock or ... | |
| enterProcedural_timing_control_statement | |
| File: lfsr_task.v , 32 | |
| Text: @ ( posedge clock or ... | |
| enterProcedural_timing_control | |
| File: lfsr_task.v , 32 | |
| Text: @ ( posedge clock or ... | |
| enterEvent_control | |
| File: lfsr_task.v , 32 | |
| Text: @ ( posedge clock or ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 32 | |
| Text: posedge clock or neg ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 32 | |
| Text: posedge clock ... | |
| enterEdge_Posedge | |
| File: lfsr_task.v , 32 | |
| Text: posedge ... | |
| enterExpression | |
| File: lfsr_task.v , 32 | |
| Text: clock ... | |
| enterPrimary | |
| File: lfsr_task.v , 32 | |
| Text: clock ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 32 | |
| Text: clock ... | |
| enterIdentifier | |
| File: lfsr_task.v , 32 | |
| Text: clock ... | |
| enterEvent_expression | |
| File: lfsr_task.v , 32 | |
| Text: negedge Reset ... | |
| enterEdge_Negedge | |
| File: lfsr_task.v , 32 | |
| Text: negedge ... | |
| enterExpression | |
| File: lfsr_task.v , 32 | |
| Text: Reset ... | |
| enterPrimary | |
| File: lfsr_task.v , 32 | |
| Text: Reset ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 32 | |
| Text: Reset ... | |
| enterIdentifier | |
| File: lfsr_task.v , 32 | |
| Text: Reset ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 33 | |
| Text: if ( ! Reset ) rando ... | |
| enterStatement | |
| File: lfsr_task.v , 33 | |
| Text: if ( ! Reset ) rando ... | |
| enterStatement_item | |
| File: lfsr_task.v , 33 | |
| Text: if ( ! Reset ) rando ... | |
| enterConditional_statement | |
| File: lfsr_task.v , 33 | |
| Text: if ( ! Reset ) rando ... | |
| enterCond_predicate | |
| File: lfsr_task.v , 33 | |
| Text: ! Reset ... | |
| enterExpression_or_cond_pattern | |
| File: lfsr_task.v , 33 | |
| Text: ! Reset ... | |
| enterExpression | |
| File: lfsr_task.v , 33 | |
| Text: ! Reset ... | |
| enterUnary_Not | |
| File: lfsr_task.v , 33 | |
| Text: ! ... | |
| enterPrimary | |
| File: lfsr_task.v , 33 | |
| Text: Reset ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 33 | |
| Text: Reset ... | |
| enterIdentifier | |
| File: lfsr_task.v , 33 | |
| Text: Reset ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 34 | |
| Text: random2 = seed2 ; ... | |
| enterStatement | |
| File: lfsr_task.v , 34 | |
| Text: random2 = seed2 ; ... | |
| enterStatement_item | |
| File: lfsr_task.v , 34 | |
| Text: random2 = seed2 ; ... | |
| enterBlocking_assignment | |
| File: lfsr_task.v , 34 | |
| Text: random2 = seed2 ... | |
| enterOperator_assignment | |
| File: lfsr_task.v , 34 | |
| Text: random2 = seed2 ... | |
| enterVariable_lvalue | |
| File: lfsr_task.v , 34 | |
| Text: random2 ... | |
| enterHierarchical_identifier | |
| File: lfsr_task.v , 34 | |
| Text: random2 ... | |
| enterSelect | |
| File: lfsr_task.v , 34 | |
| Text: ... | |
| enterBit_select | |
| File: lfsr_task.v , 34 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: lfsr_task.v , 34 | |
| Text: = ... | |
| enterExpression | |
| File: lfsr_task.v , 34 | |
| Text: seed2 ... | |
| enterPrimary | |
| File: lfsr_task.v , 34 | |
| Text: seed2 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 34 | |
| Text: seed2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 34 | |
| Text: seed2 ... | |
| enterStatement_or_null | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ( random2 ... | |
| enterStatement | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ( random2 ... | |
| enterStatement_item | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ( random2 ... | |
| enterSubroutine_call_statement | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ( random2 ... | |
| enterSubroutine_call | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ( random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 36 | |
| Text: LFSR_TASK ... | |
| enterList_of_arguments | |
| File: lfsr_task.v , 36 | |
| Text: random2 , Chain2 , r ... | |
| enterExpression | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterPrimary | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterExpression | |
| File: lfsr_task.v , 36 | |
| Text: Chain2 ... | |
| enterPrimary | |
| File: lfsr_task.v , 36 | |
| Text: Chain2 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 36 | |
| Text: Chain2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 36 | |
| Text: Chain2 ... | |
| enterExpression | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterPrimary | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterPrimary_literal | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterIdentifier | |
| File: lfsr_task.v , 36 | |
| Text: random2 ... | |
| enterEndmodule | |
| File: lfsr_task.v , 37 | |
| Text: endmodule ... | |
| , 13 | |
| Text: in1 [ 5 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 13 | |
| Text: in1 [ 5 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 13 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 13 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 13 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 13 | |
| Text: 5 ... | |
| enterPrimary | |
| File: m_input_mult.v , 13 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 13 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 13 | |
| Text: 5 ... | |
| enterCase_item | |
| File: m_input_mult.v , 14 | |
| Text: 2'b110 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 14 | |
| Text: 2'b110 ... | |
| enterPrimary | |
| File: m_input_mult.v , 14 | |
| Text: 2'b110 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 14 | |
| Text: 2'b110 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 14 | |
| Text: 2'b110 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 14 | |
| Text: out2 = in1 [ 6 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 14 | |
| Text: out2 = in1 [ 6 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 14 | |
| Text: out2 = in1 [ 6 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 14 | |
| Text: out2 = in1 [ 6 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 14 | |
| Text: out2 = in1 [ 6 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 14 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 14 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 14 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 14 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 14 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 14 | |
| Text: in1 [ 6 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 14 | |
| Text: in1 [ 6 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 14 | |
| Text: in1 [ 6 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 14 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 14 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 14 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 14 | |
| Text: 6 ... | |
| enterPrimary | |
| File: m_input_mult.v , 14 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 14 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 14 | |
| Text: 6 ... | |
| enterCase_item | |
| File: m_input_mult.v , 15 | |
| Text: 2'b111 : out2 = in1 ... | |
| enterExpression | |
| File: m_input_mult.v , 15 | |
| Text: 2'b111 ... | |
| enterPrimary | |
| File: m_input_mult.v , 15 | |
| Text: 2'b111 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 15 | |
| Text: 2'b111 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 15 | |
| Text: 2'b111 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 15 | |
| Text: out2 = in1 [ 7 ] ; ... | |
| enterStatement | |
| File: m_input_mult.v , 15 | |
| Text: out2 = in1 [ 7 ] ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 15 | |
| Text: out2 = in1 [ 7 ] ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 15 | |
| Text: out2 = in1 [ 7 ] ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 15 | |
| Text: out2 = in1 [ 7 ] ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 15 | |
| Text: out2 ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 15 | |
| Text: out2 ... | |
| enterSelect | |
| File: m_input_mult.v , 15 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 15 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 15 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 15 | |
| Text: in1 [ 7 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 15 | |
| Text: in1 [ 7 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 15 | |
| Text: in1 [ 7 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 15 | |
| Text: in1 ... | |
| enterSelect | |
| File: m_input_mult.v , 15 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 15 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 15 | |
| Text: 7 ... | |
| enterPrimary | |
| File: m_input_mult.v , 15 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 15 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 15 | |
| Text: 7 ... | |
| enterEndcase | |
| File: m_input_mult.v , 16 | |
| Text: endcase ... | |
| enterEndmodule | |
| File: m_input_mult.v , 18 | |
| Text: endmodule ... | |
| enterDescription | |
| File: m_input_mult.v , 21 | |
| Text: module case2 ( in1 , ... | |
| enterModule_declaration | |
| File: m_input_mult.v , 21 | |
| Text: module case2 ( in1 , ... | |
| enterModule_nonansi_header | |
| File: m_input_mult.v , 21 | |
| Text: module case2 ( in1 , ... | |
| enterModule_keyword | |
| File: m_input_mult.v , 21 | |
| Text: module ... | |
| enterIdentifier | |
| File: m_input_mult.v , 21 | |
| Text: case2 ... | |
| enterList_of_ports | |
| File: m_input_mult.v , 21 | |
| Text: ( in1 , sel , out2 ) ... | |
| enterPort | |
| File: m_input_mult.v , 21 | |
| Text: in1 ... | |
| enterPort_expression | |
| File: m_input_mult.v , 21 | |
| Text: in1 ... | |
| enterPort_reference | |
| File: m_input_mult.v , 21 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 21 | |
| Text: in1 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 21 | |
| Text: sel ... | |
| enterPort_expression | |
| File: m_input_mult.v , 21 | |
| Text: sel ... | |
| enterPort_reference | |
| File: m_input_mult.v , 21 | |
| Text: sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 21 | |
| Text: sel ... | |
| enterConstant_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 21 | |
| Text: out2 ... | |
| enterPort_expression | |
| File: m_input_mult.v , 21 | |
| Text: out2 ... | |
| enterPort_reference | |
| File: m_input_mult.v , 21 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 21 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 21 | |
| Text: ... | |
| enterModule_item | |
| File: m_input_mult.v , 22 | |
| Text: input [ 1 : 0 ] in1 ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 22 | |
| Text: input [ 1 : 0 ] in1 ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 22 | |
| Text: input [ 1 : 0 ] in1 ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 22 | |
| Text: [ 1 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 22 | |
| Text: [ 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 22 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 22 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 22 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 22 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 22 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 22 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 22 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 22 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 22 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 22 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 22 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 22 | |
| Text: in1 ... | |
| enterModule_item | |
| File: m_input_mult.v , 23 | |
| Text: input [ 2 : 0 ] sel ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 23 | |
| Text: input [ 2 : 0 ] sel ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 23 | |
| Text: input [ 2 : 0 ] sel ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 23 | |
| Text: [ 2 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 23 | |
| Text: [ 2 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 23 | |
| Text: [ 2 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 23 | |
| Text: 2 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 23 | |
| Text: 2 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 23 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 23 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 23 | |
| Text: 2 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 23 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 23 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 23 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 23 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 23 | |
| Text: sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 23 | |
| Text: sel ... | |
| enterModule_item | |
| File: m_input_mult.v , 24 | |
| Text: output [ 15 : 0 ] ou ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 24 | |
| Text: output [ 15 : 0 ] ou ... | |
| enterOutput_declaration | |
| File: m_input_mult.v , 24 | |
| Text: output [ 15 : 0 ] ou ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 24 | |
| Text: [ 15 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 24 | |
| Text: [ 15 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 24 | |
| Text: [ 15 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 24 | |
| Text: 15 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 24 | |
| Text: 15 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 24 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 24 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 24 | |
| Text: 15 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 24 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 24 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 24 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 24 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 24 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 24 | |
| Text: out2 ... | |
| enterModule_item | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterModule_or_generate_item_declaration | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterPackage_or_generate_item_declaration | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterData_declaration | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterVariable_declaration | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] select ... | |
| enterData_type | |
| File: m_input_mult.v , 25 | |
| Text: reg [ 7 : 0 ] ... | |
| enterIntVec_TypeReg | |
| File: m_input_mult.v , 25 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 25 | |
| Text: [ 7 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 25 | |
| Text: 7 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 25 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 25 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 25 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 25 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 25 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 25 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 25 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 25 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: m_input_mult.v , 25 | |
| Text: select ... | |
| enterVariable_decl_assignment | |
| File: m_input_mult.v , 25 | |
| Text: select ... | |
| enterIdentifier | |
| File: m_input_mult.v , 25 | |
| Text: select ... | |
| enterModule_item | |
| File: m_input_mult.v , 27 | |
| Text: always @ ( sel ) cas ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 27 | |
| Text: always @ ( sel ) cas ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 27 | |
| Text: always @ ( sel ) cas ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 27 | |
| Text: always @ ( sel ) cas ... | |
| enterAlways_construct | |
| File: m_input_mult.v , 27 | |
| Text: always @ ( sel ) cas ... | |
| enterAlwaysKeywd_Always | |
| File: m_input_mult.v , 27 | |
| Text: always ... | |
| enterStatement | |
| File: m_input_mult.v , 27 | |
| Text: @ ( sel ) case ( sel ... | |
| enterStatement_item | |
| File: m_input_mult.v , 27 | |
| Text: @ ( sel ) case ( sel ... | |
| enterProcedural_timing_control_statement | |
| File: m_input_mult.v , 27 | |
| Text: @ ( sel ) case ( sel ... | |
| enterProcedural_timing_control | |
| File: m_input_mult.v , 27 | |
| Text: @ ( sel ) ... | |
| enterEvent_control | |
| File: m_input_mult.v , 27 | |
| Text: @ ( sel ) ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 27 | |
| Text: sel ... | |
| enterExpression | |
| File: m_input_mult.v , 27 | |
| Text: sel ... | |
| enterPrimary | |
| File: m_input_mult.v , 27 | |
| Text: sel ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 27 | |
| Text: sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 27 | |
| Text: sel ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 28 | |
| Text: case ( sel ) 3'b000 ... | |
| enterStatement | |
| File: m_input_mult.v , 28 | |
| Text: case ( sel ) 3'b000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 28 | |
| Text: case ( sel ) 3'b000 ... | |
| enterCase_statement | |
| File: m_input_mult.v , 28 | |
| Text: case ( sel ) 3'b000 ... | |
| enterCaseKeyword_Case | |
| File: m_input_mult.v , 28 | |
| Text: case ... | |
| enterExpression | |
| File: m_input_mult.v , 28 | |
| Text: sel ... | |
| enterPrimary | |
| File: m_input_mult.v , 28 | |
| Text: sel ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 28 | |
| Text: sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 28 | |
| Text: sel ... | |
| enterCase_item | |
| File: m_input_mult.v , 29 | |
| Text: 3'b000 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 29 | |
| Text: 3'b000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 29 | |
| Text: 3'b000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 29 | |
| Text: 3'b000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 29 | |
| Text: 3'b000 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 29 | |
| Text: select = 8'b00000001 ... | |
| enterStatement | |
| File: m_input_mult.v , 29 | |
| Text: select = 8'b00000001 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 29 | |
| Text: select = 8'b00000001 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 29 | |
| Text: select = 8'b00000001 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 29 | |
| Text: select = 8'b00000001 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 29 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 29 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 29 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 29 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 29 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 29 | |
| Text: 8'b00000001 ... | |
| enterPrimary | |
| File: m_input_mult.v , 29 | |
| Text: 8'b00000001 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 29 | |
| Text: 8'b00000001 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 29 | |
| Text: 8'b00000001 ... | |
| enterCase_item | |
| File: m_input_mult.v , 30 | |
| Text: 3'b001 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 30 | |
| Text: 3'b001 ... | |
| enterPrimary | |
| File: m_input_mult.v , 30 | |
| Text: 3'b001 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 30 | |
| Text: 3'b001 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 30 | |
| Text: 3'b001 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 30 | |
| Text: select = 8'b00000010 ... | |
| enterStatement | |
| File: m_input_mult.v , 30 | |
| Text: select = 8'b00000010 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 30 | |
| Text: select = 8'b00000010 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 30 | |
| Text: select = 8'b00000010 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 30 | |
| Text: select = 8'b00000010 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 30 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 30 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 30 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 30 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 30 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 30 | |
| Text: 8'b00000010 ... | |
| enterPrimary | |
| File: m_input_mult.v , 30 | |
| Text: 8'b00000010 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 30 | |
| Text: 8'b00000010 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 30 | |
| Text: 8'b00000010 ... | |
| enterCase_item | |
| File: m_input_mult.v , 31 | |
| Text: 3'b010 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 31 | |
| Text: 3'b010 ... | |
| enterPrimary | |
| File: m_input_mult.v , 31 | |
| Text: 3'b010 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 31 | |
| Text: 3'b010 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 31 | |
| Text: 3'b010 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 31 | |
| Text: select = 8'b00000100 ... | |
| enterStatement | |
| File: m_input_mult.v , 31 | |
| Text: select = 8'b00000100 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 31 | |
| Text: select = 8'b00000100 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 31 | |
| Text: select = 8'b00000100 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 31 | |
| Text: select = 8'b00000100 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 31 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 31 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 31 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 31 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 31 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 31 | |
| Text: 8'b00000100 ... | |
| enterPrimary | |
| File: m_input_mult.v , 31 | |
| Text: 8'b00000100 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 31 | |
| Text: 8'b00000100 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 31 | |
| Text: 8'b00000100 ... | |
| enterCase_item | |
| File: m_input_mult.v , 32 | |
| Text: 3'b011 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 32 | |
| Text: 3'b011 ... | |
| enterPrimary | |
| File: m_input_mult.v , 32 | |
| Text: 3'b011 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 32 | |
| Text: 3'b011 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 32 | |
| Text: 3'b011 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 32 | |
| Text: select = 8'b00001000 ... | |
| enterStatement | |
| File: m_input_mult.v , 32 | |
| Text: select = 8'b00001000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 32 | |
| Text: select = 8'b00001000 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 32 | |
| Text: select = 8'b00001000 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 32 | |
| Text: select = 8'b00001000 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 32 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 32 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 32 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 32 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 32 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 32 | |
| Text: 8'b00001000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 32 | |
| Text: 8'b00001000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 32 | |
| Text: 8'b00001000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 32 | |
| Text: 8'b00001000 ... | |
| enterCase_item | |
| File: m_input_mult.v , 33 | |
| Text: 3'b100 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 33 | |
| Text: 3'b100 ... | |
| enterPrimary | |
| File: m_input_mult.v , 33 | |
| Text: 3'b100 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 33 | |
| Text: 3'b100 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 33 | |
| Text: 3'b100 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 33 | |
| Text: select = 8'b00010000 ... | |
| enterStatement | |
| File: m_input_mult.v , 33 | |
| Text: select = 8'b00010000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 33 | |
| Text: select = 8'b00010000 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 33 | |
| Text: select = 8'b00010000 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 33 | |
| Text: select = 8'b00010000 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 33 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 33 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 33 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 33 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 33 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 33 | |
| Text: 8'b00010000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 33 | |
| Text: 8'b00010000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 33 | |
| Text: 8'b00010000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 33 | |
| Text: 8'b00010000 ... | |
| enterCase_item | |
| File: m_input_mult.v , 34 | |
| Text: 3'b101 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 34 | |
| Text: 3'b101 ... | |
| enterPrimary | |
| File: m_input_mult.v , 34 | |
| Text: 3'b101 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 34 | |
| Text: 3'b101 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 34 | |
| Text: 3'b101 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 34 | |
| Text: select = 8'b00100000 ... | |
| enterStatement | |
| File: m_input_mult.v , 34 | |
| Text: select = 8'b00100000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 34 | |
| Text: select = 8'b00100000 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 34 | |
| Text: select = 8'b00100000 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 34 | |
| Text: select = 8'b00100000 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 34 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 34 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 34 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 34 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 34 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 34 | |
| Text: 8'b00100000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 34 | |
| Text: 8'b00100000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 34 | |
| Text: 8'b00100000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 34 | |
| Text: 8'b00100000 ... | |
| enterCase_item | |
| File: m_input_mult.v , 35 | |
| Text: 3'b110 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 35 | |
| Text: 3'b110 ... | |
| enterPrimary | |
| File: m_input_mult.v , 35 | |
| Text: 3'b110 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 35 | |
| Text: 3'b110 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 35 | |
| Text: 3'b110 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 35 | |
| Text: select = 8'b01000000 ... | |
| enterStatement | |
| File: m_input_mult.v , 35 | |
| Text: select = 8'b01000000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 35 | |
| Text: select = 8'b01000000 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 35 | |
| Text: select = 8'b01000000 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 35 | |
| Text: select = 8'b01000000 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 35 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 35 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 35 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 35 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 35 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 35 | |
| Text: 8'b01000000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 35 | |
| Text: 8'b01000000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 35 | |
| Text: 8'b01000000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 35 | |
| Text: 8'b01000000 ... | |
| enterCase_item | |
| File: m_input_mult.v , 36 | |
| Text: 3'b111 : select = 8' ... | |
| enterExpression | |
| File: m_input_mult.v , 36 | |
| Text: 3'b111 ... | |
| enterPrimary | |
| File: m_input_mult.v , 36 | |
| Text: 3'b111 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 36 | |
| Text: 3'b111 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 36 | |
| Text: 3'b111 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 36 | |
| Text: select = 8'b10000000 ... | |
| enterStatement | |
| File: m_input_mult.v , 36 | |
| Text: select = 8'b10000000 ... | |
| enterStatement_item | |
| File: m_input_mult.v , 36 | |
| Text: select = 8'b10000000 ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 36 | |
| Text: select = 8'b10000000 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 36 | |
| Text: select = 8'b10000000 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 36 | |
| Text: select ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 36 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 36 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 36 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 36 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 36 | |
| Text: 8'b10000000 ... | |
| enterPrimary | |
| File: m_input_mult.v , 36 | |
| Text: 8'b10000000 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 36 | |
| Text: 8'b10000000 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 36 | |
| Text: 8'b10000000 ... | |
| enterEndcase | |
| File: m_input_mult.v , 37 | |
| Text: endcase ... | |
| enterModule_item | |
| File: m_input_mult.v , 38 | |
| Text: assign out2 [ 1 : 0 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 38 | |
| Text: assign out2 [ 1 : 0 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 38 | |
| Text: assign out2 [ 1 : 0 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 38 | |
| Text: assign out2 [ 1 : 0 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 38 | |
| Text: assign out2 [ 1 : 0 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 38 | |
| Text: out2 [ 1 : 0 ] = in1 ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 38 | |
| Text: out2 [ 1 : 0 ] = in1 ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 38 | |
| Text: out2 [ 1 : 0 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 38 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 38 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 38 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 38 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 38 | |
| Text: 1 : 0 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 38 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 38 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 38 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 38 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 38 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterExpression | |
| File: m_input_mult.v , 38 | |
| Text: in1 & select [ 0 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 38 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 38 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 38 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 38 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 38 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 38 | |
| Text: select [ 0 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 38 | |
| Text: select [ 0 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 38 | |
| Text: select [ 0 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 38 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 38 | |
| Text: [ 0 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 38 | |
| Text: [ 0 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterPrimary | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 38 | |
| Text: 0 ... | |
| enterModule_item | |
| File: m_input_mult.v , 39 | |
| Text: assign out2 [ 3 : 2 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 39 | |
| Text: assign out2 [ 3 : 2 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 39 | |
| Text: assign out2 [ 3 : 2 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 39 | |
| Text: assign out2 [ 3 : 2 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 39 | |
| Text: assign out2 [ 3 : 2 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 39 | |
| Text: out2 [ 3 : 2 ] = in1 ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 39 | |
| Text: out2 [ 3 : 2 ] = in1 ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 39 | |
| Text: out2 [ 3 : 2 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 39 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 39 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 39 | |
| Text: [ 3 : 2 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 39 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 39 | |
| Text: 3 : 2 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 39 | |
| Text: 3 : 2 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 39 | |
| Text: 3 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 39 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 39 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 39 | |
| Text: 3 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 39 | |
| Text: 2 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 39 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 39 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 39 | |
| Text: 2 ... | |
| enterExpression | |
| File: m_input_mult.v , 39 | |
| Text: in1 & select [ 1 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 39 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 39 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 39 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 39 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 39 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 39 | |
| Text: select [ 1 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 39 | |
| Text: select [ 1 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 39 | |
| Text: select [ 1 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 39 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 39 | |
| Text: [ 1 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 39 | |
| Text: [ 1 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 39 | |
| Text: 1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 39 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 39 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 39 | |
| Text: 1 ... | |
| enterModule_item | |
| File: m_input_mult.v , 40 | |
| Text: assign out2 [ 5 : 4 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 40 | |
| Text: assign out2 [ 5 : 4 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 40 | |
| Text: assign out2 [ 5 : 4 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 40 | |
| Text: assign out2 [ 5 : 4 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 40 | |
| Text: assign out2 [ 5 : 4 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 40 | |
| Text: out2 [ 5 : 4 ] = in1 ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 40 | |
| Text: out2 [ 5 : 4 ] = in1 ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 40 | |
| Text: out2 [ 5 : 4 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 40 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 40 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 40 | |
| Text: [ 5 : 4 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 40 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 40 | |
| Text: 5 : 4 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 40 | |
| Text: 5 : 4 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 40 | |
| Text: 5 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 40 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 40 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 40 | |
| Text: 5 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 40 | |
| Text: 4 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 40 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 40 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 40 | |
| Text: 4 ... | |
| enterExpression | |
| File: m_input_mult.v , 40 | |
| Text: in1 & select [ 2 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 40 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 40 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 40 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 40 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 40 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 40 | |
| Text: select [ 2 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 40 | |
| Text: select [ 2 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 40 | |
| Text: select [ 2 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 40 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 40 | |
| Text: [ 2 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 40 | |
| Text: [ 2 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 40 | |
| Text: 2 ... | |
| enterPrimary | |
| File: m_input_mult.v , 40 | |
| Text: 2 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 40 | |
| Text: 2 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 40 | |
| Text: 2 ... | |
| enterModule_item | |
| File: m_input_mult.v , 41 | |
| Text: assign out2 [ 7 : 6 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 41 | |
| Text: assign out2 [ 7 : 6 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 41 | |
| Text: assign out2 [ 7 : 6 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 41 | |
| Text: assign out2 [ 7 : 6 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 41 | |
| Text: assign out2 [ 7 : 6 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 41 | |
| Text: out2 [ 7 : 6 ] = in1 ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 41 | |
| Text: out2 [ 7 : 6 ] = in1 ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 41 | |
| Text: out2 [ 7 : 6 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 41 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 41 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 41 | |
| Text: [ 7 : 6 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 41 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 41 | |
| Text: 7 : 6 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 41 | |
| Text: 7 : 6 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 41 | |
| Text: 7 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 41 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 41 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 41 | |
| Text: 7 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 41 | |
| Text: 6 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 41 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 41 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 41 | |
| Text: 6 ... | |
| enterExpression | |
| File: m_input_mult.v , 41 | |
| Text: in1 & select [ 3 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 41 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 41 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 41 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 41 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 41 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 41 | |
| Text: select [ 3 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 41 | |
| Text: select [ 3 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 41 | |
| Text: select [ 3 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 41 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 41 | |
| Text: [ 3 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 41 | |
| Text: [ 3 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 41 | |
| Text: 3 ... | |
| enterPrimary | |
| File: m_input_mult.v , 41 | |
| Text: 3 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 41 | |
| Text: 3 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 41 | |
| Text: 3 ... | |
| enterModule_item | |
| File: m_input_mult.v , 42 | |
| Text: assign out2 [ 9 : 8 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 42 | |
| Text: assign out2 [ 9 : 8 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 42 | |
| Text: assign out2 [ 9 : 8 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 42 | |
| Text: assign out2 [ 9 : 8 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 42 | |
| Text: assign out2 [ 9 : 8 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 42 | |
| Text: out2 [ 9 : 8 ] = in1 ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 42 | |
| Text: out2 [ 9 : 8 ] = in1 ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 42 | |
| Text: out2 [ 9 : 8 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 42 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 42 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 42 | |
| Text: [ 9 : 8 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 42 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 42 | |
| Text: 9 : 8 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 42 | |
| Text: 9 : 8 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 42 | |
| Text: 9 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 42 | |
| Text: 9 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 42 | |
| Text: 9 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 42 | |
| Text: 9 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 42 | |
| Text: 8 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 42 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 42 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 42 | |
| Text: 8 ... | |
| enterExpression | |
| File: m_input_mult.v , 42 | |
| Text: in1 & select [ 4 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 42 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 42 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 42 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 42 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 42 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 42 | |
| Text: select [ 4 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 42 | |
| Text: select [ 4 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 42 | |
| Text: select [ 4 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 42 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 42 | |
| Text: [ 4 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 42 | |
| Text: [ 4 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 42 | |
| Text: 4 ... | |
| enterPrimary | |
| File: m_input_mult.v , 42 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 42 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 42 | |
| Text: 4 ... | |
| enterModule_item | |
| File: m_input_mult.v , 43 | |
| Text: assign out2 [ 11 : 1 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 43 | |
| Text: assign out2 [ 11 : 1 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 43 | |
| Text: assign out2 [ 11 : 1 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 43 | |
| Text: assign out2 [ 11 : 1 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 43 | |
| Text: assign out2 [ 11 : 1 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 43 | |
| Text: out2 [ 11 : 10 ] = i ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 43 | |
| Text: out2 [ 11 : 10 ] = i ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 43 | |
| Text: out2 [ 11 : 10 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 43 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 43 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 43 | |
| Text: [ 11 : 10 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 43 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 43 | |
| Text: 11 : 10 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 43 | |
| Text: 11 : 10 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 43 | |
| Text: 11 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 43 | |
| Text: 11 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 43 | |
| Text: 11 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 43 | |
| Text: 11 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 43 | |
| Text: 10 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 43 | |
| Text: 10 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 43 | |
| Text: 10 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 43 | |
| Text: 10 ... | |
| enterExpression | |
| File: m_input_mult.v , 43 | |
| Text: in1 & select [ 5 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 43 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 43 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 43 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 43 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 43 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 43 | |
| Text: select [ 5 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 43 | |
| Text: select [ 5 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 43 | |
| Text: select [ 5 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 43 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 43 | |
| Text: [ 5 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 43 | |
| Text: [ 5 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 43 | |
| Text: 5 ... | |
| enterPrimary | |
| File: m_input_mult.v , 43 | |
| Text: 5 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 43 | |
| Text: 5 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 43 | |
| Text: 5 ... | |
| enterModule_item | |
| File: m_input_mult.v , 44 | |
| Text: assign out2 [ 13 : 1 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 44 | |
| Text: assign out2 [ 13 : 1 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 44 | |
| Text: assign out2 [ 13 : 1 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 44 | |
| Text: assign out2 [ 13 : 1 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 44 | |
| Text: assign out2 [ 13 : 1 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 44 | |
| Text: out2 [ 13 : 12 ] = i ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 44 | |
| Text: out2 [ 13 : 12 ] = i ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 44 | |
| Text: out2 [ 13 : 12 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 44 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 44 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 44 | |
| Text: [ 13 : 12 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 44 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 44 | |
| Text: 13 : 12 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 44 | |
| Text: 13 : 12 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 44 | |
| Text: 13 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 44 | |
| Text: 13 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 44 | |
| Text: 13 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 44 | |
| Text: 13 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 44 | |
| Text: 12 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 44 | |
| Text: 12 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 44 | |
| Text: 12 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 44 | |
| Text: 12 ... | |
| enterExpression | |
| File: m_input_mult.v , 44 | |
| Text: in1 & select [ 6 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 44 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 44 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 44 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 44 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 44 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 44 | |
| Text: select [ 6 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 44 | |
| Text: select [ 6 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 44 | |
| Text: select [ 6 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 44 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 44 | |
| Text: [ 6 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 44 | |
| Text: [ 6 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 44 | |
| Text: 6 ... | |
| enterPrimary | |
| File: m_input_mult.v , 44 | |
| Text: 6 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 44 | |
| Text: 6 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 44 | |
| Text: 6 ... | |
| enterModule_item | |
| File: m_input_mult.v , 45 | |
| Text: assign out2 [ 15 : 1 ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 45 | |
| Text: assign out2 [ 15 : 1 ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 45 | |
| Text: assign out2 [ 15 : 1 ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 45 | |
| Text: assign out2 [ 15 : 1 ... | |
| enterContinuous_assign | |
| File: m_input_mult.v , 45 | |
| Text: assign out2 [ 15 : 1 ... | |
| enterList_of_net_assignments | |
| File: m_input_mult.v , 45 | |
| Text: out2 [ 15 : 14 ] = i ... | |
| enterNet_assignment | |
| File: m_input_mult.v , 45 | |
| Text: out2 [ 15 : 14 ] = i ... | |
| enterNet_lvalue | |
| File: m_input_mult.v , 45 | |
| Text: out2 [ 15 : 14 ] ... | |
| enterPs_or_hierarchical_identifier | |
| File: m_input_mult.v , 45 | |
| Text: out2 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 45 | |
| Text: out2 ... | |
| enterConstant_select | |
| File: m_input_mult.v , 45 | |
| Text: [ 15 : 14 ] ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 45 | |
| Text: ... | |
| enterConstant_part_select_range | |
| File: m_input_mult.v , 45 | |
| Text: 15 : 14 ... | |
| enterConstant_range | |
| File: m_input_mult.v , 45 | |
| Text: 15 : 14 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 45 | |
| Text: 15 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 45 | |
| Text: 15 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 45 | |
| Text: 15 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 45 | |
| Text: 15 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 45 | |
| Text: 14 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 45 | |
| Text: 14 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 45 | |
| Text: 14 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 45 | |
| Text: 14 ... | |
| enterExpression | |
| File: m_input_mult.v , 45 | |
| Text: in1 & select [ 7 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 45 | |
| Text: in1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 45 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 45 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: m_input_mult.v , 45 | |
| Text: in1 ... | |
| enterBinOp_BitwAnd | |
| File: m_input_mult.v , 45 | |
| Text: & ... | |
| enterExpression | |
| File: m_input_mult.v , 45 | |
| Text: select [ 7 ] ... | |
| enterPrimary | |
| File: m_input_mult.v , 45 | |
| Text: select [ 7 ] ... | |
| enterComplex_func_call | |
| File: m_input_mult.v , 45 | |
| Text: select [ 7 ] ... | |
| enterIdentifier | |
| File: m_input_mult.v , 45 | |
| Text: select ... | |
| enterSelect | |
| File: m_input_mult.v , 45 | |
| Text: [ 7 ] ... | |
| enterBit_select | |
| File: m_input_mult.v , 45 | |
| Text: [ 7 ] ... | |
| enterExpression | |
| File: m_input_mult.v , 45 | |
| Text: 7 ... | |
| enterPrimary | |
| File: m_input_mult.v , 45 | |
| Text: 7 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 45 | |
| Text: 7 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 45 | |
| Text: 7 ... | |
| enterEndmodule | |
| File: m_input_mult.v , 46 | |
| Text: endmodule ... | |
| enterDescription | |
| File: m_input_mult.v , 49 | |
| Text: module pri_encooder ... | |
| enterModule_declaration | |
| File: m_input_mult.v , 49 | |
| Text: module pri_encooder ... | |
| enterModule_nonansi_header | |
| File: m_input_mult.v , 49 | |
| Text: module pri_encooder ... | |
| enterModule_keyword | |
| File: m_input_mult.v , 49 | |
| Text: module ... | |
| enterIdentifier | |
| File: m_input_mult.v , 49 | |
| Text: pri_encooder ... | |
| enterList_of_ports | |
| File: m_input_mult.v , 49 | |
| Text: ( Op , Funct , Sel , ... | |
| enterPort | |
| File: m_input_mult.v , 49 | |
| Text: Op ... | |
| enterPort_expression | |
| File: m_input_mult.v , 49 | |
| Text: Op ... | |
| enterPort_reference | |
| File: m_input_mult.v , 49 | |
| Text: Op ... | |
| enterIdentifier | |
| File: m_input_mult.v , 49 | |
| Text: Op ... | |
| enterConstant_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 49 | |
| Text: Funct ... | |
| enterPort_expression | |
| File: m_input_mult.v , 49 | |
| Text: Funct ... | |
| enterPort_reference | |
| File: m_input_mult.v , 49 | |
| Text: Funct ... | |
| enterIdentifier | |
| File: m_input_mult.v , 49 | |
| Text: Funct ... | |
| enterConstant_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 49 | |
| Text: Sel ... | |
| enterPort_expression | |
| File: m_input_mult.v , 49 | |
| Text: Sel ... | |
| enterPort_reference | |
| File: m_input_mult.v , 49 | |
| Text: Sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 49 | |
| Text: Sel ... | |
| enterConstant_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterPort | |
| File: m_input_mult.v , 49 | |
| Text: B ... | |
| enterPort_expression | |
| File: m_input_mult.v , 49 | |
| Text: B ... | |
| enterPort_reference | |
| File: m_input_mult.v , 49 | |
| Text: B ... | |
| enterIdentifier | |
| File: m_input_mult.v , 49 | |
| Text: B ... | |
| enterConstant_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: m_input_mult.v , 49 | |
| Text: ... | |
| enterModule_item | |
| File: m_input_mult.v , 50 | |
| Text: input [ 1 : 0 ] Op ; ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 50 | |
| Text: input [ 1 : 0 ] Op ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 50 | |
| Text: input [ 1 : 0 ] Op ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 50 | |
| Text: [ 1 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 50 | |
| Text: [ 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 50 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 50 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 50 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 50 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 50 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 50 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 50 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 50 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 50 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 50 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 50 | |
| Text: Op ... | |
| enterIdentifier | |
| File: m_input_mult.v , 50 | |
| Text: Op ... | |
| enterModule_item | |
| File: m_input_mult.v , 51 | |
| Text: input [ 4 : 0 ] Func ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 51 | |
| Text: input [ 4 : 0 ] Func ... | |
| enterInput_declaration | |
| File: m_input_mult.v , 51 | |
| Text: input [ 4 : 0 ] Func ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 51 | |
| Text: [ 4 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 51 | |
| Text: [ 4 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 51 | |
| Text: [ 4 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 51 | |
| Text: 4 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 51 | |
| Text: 4 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 51 | |
| Text: 4 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 51 | |
| Text: 4 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 51 | |
| Text: 4 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 51 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 51 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 51 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 51 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 51 | |
| Text: Funct ... | |
| enterIdentifier | |
| File: m_input_mult.v , 51 | |
| Text: Funct ... | |
| enterModule_item | |
| File: m_input_mult.v , 52 | |
| Text: output [ 1 : 0 ] Sel ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 52 | |
| Text: output [ 1 : 0 ] Sel ... | |
| enterOutput_declaration | |
| File: m_input_mult.v , 52 | |
| Text: output [ 1 : 0 ] Sel ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 52 | |
| Text: [ 1 : 0 ] ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 52 | |
| Text: [ 1 : 0 ] ... | |
| enterPacked_dimension | |
| File: m_input_mult.v , 52 | |
| Text: [ 1 : 0 ] ... | |
| enterConstant_range | |
| File: m_input_mult.v , 52 | |
| Text: 1 : 0 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 52 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 52 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 52 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 52 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: m_input_mult.v , 52 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: m_input_mult.v , 52 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 52 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 52 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 52 | |
| Text: Sel ... | |
| enterIdentifier | |
| File: m_input_mult.v , 52 | |
| Text: Sel ... | |
| enterModule_item | |
| File: m_input_mult.v , 53 | |
| Text: output B ; ... | |
| enterPort_declaration | |
| File: m_input_mult.v , 53 | |
| Text: output B ... | |
| enterOutput_declaration | |
| File: m_input_mult.v , 53 | |
| Text: output B ... | |
| enterNet_port_type | |
| File: m_input_mult.v , 53 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: m_input_mult.v , 53 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: m_input_mult.v , 53 | |
| Text: B ... | |
| enterIdentifier | |
| File: m_input_mult.v , 53 | |
| Text: B ... | |
| enterModule_item | |
| File: m_input_mult.v , 54 | |
| Text: always @ ( Op or Fun ... | |
| enterNon_port_module_item | |
| File: m_input_mult.v , 54 | |
| Text: always @ ( Op or Fun ... | |
| enterModule_or_generate_item | |
| File: m_input_mult.v , 54 | |
| Text: always @ ( Op or Fun ... | |
| enterModule_common_item | |
| File: m_input_mult.v , 54 | |
| Text: always @ ( Op or Fun ... | |
| enterAlways_construct | |
| File: m_input_mult.v , 54 | |
| Text: always @ ( Op or Fun ... | |
| enterAlwaysKeywd_Always | |
| File: m_input_mult.v , 54 | |
| Text: always ... | |
| enterStatement | |
| File: m_input_mult.v , 54 | |
| Text: @ ( Op or Funct ) ca ... | |
| enterStatement_item | |
| File: m_input_mult.v , 54 | |
| Text: @ ( Op or Funct ) ca ... | |
| enterProcedural_timing_control_statement | |
| File: m_input_mult.v , 54 | |
| Text: @ ( Op or Funct ) ca ... | |
| enterProcedural_timing_control | |
| File: m_input_mult.v , 54 | |
| Text: @ ( Op or Funct ) ... | |
| enterEvent_control | |
| File: m_input_mult.v , 54 | |
| Text: @ ( Op or Funct ) ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 54 | |
| Text: Op or Funct ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 54 | |
| Text: Op ... | |
| enterExpression | |
| File: m_input_mult.v , 54 | |
| Text: Op ... | |
| enterPrimary | |
| File: m_input_mult.v , 54 | |
| Text: Op ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 54 | |
| Text: Op ... | |
| enterIdentifier | |
| File: m_input_mult.v , 54 | |
| Text: Op ... | |
| enterEvent_expression | |
| File: m_input_mult.v , 54 | |
| Text: Funct ... | |
| enterExpression | |
| File: m_input_mult.v , 54 | |
| Text: Funct ... | |
| enterPrimary | |
| File: m_input_mult.v , 54 | |
| Text: Funct ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 54 | |
| Text: Funct ... | |
| enterIdentifier | |
| File: m_input_mult.v , 54 | |
| Text: Funct ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 55 | |
| Text: casex ( { Op , Funct ... | |
| enterStatement | |
| File: m_input_mult.v , 55 | |
| Text: casex ( { Op , Funct ... | |
| enterStatement_item | |
| File: m_input_mult.v , 55 | |
| Text: casex ( { Op , Funct ... | |
| enterCase_statement | |
| File: m_input_mult.v , 55 | |
| Text: casex ( { Op , Funct ... | |
| enterCaseKeyword_CaseX | |
| File: m_input_mult.v , 55 | |
| Text: casex ... | |
| enterExpression | |
| File: m_input_mult.v , 55 | |
| Text: { Op , Funct } ... | |
| enterPrimary | |
| File: m_input_mult.v , 55 | |
| Text: { Op , Funct } ... | |
| enterConcatenation | |
| File: m_input_mult.v , 55 | |
| Text: { Op , Funct } ... | |
| enterExpression | |
| File: m_input_mult.v , 55 | |
| Text: Op ... | |
| enterPrimary | |
| File: m_input_mult.v , 55 | |
| Text: Op ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 55 | |
| Text: Op ... | |
| enterIdentifier | |
| File: m_input_mult.v , 55 | |
| Text: Op ... | |
| enterExpression | |
| File: m_input_mult.v , 55 | |
| Text: Funct ... | |
| enterPrimary | |
| File: m_input_mult.v , 55 | |
| Text: Funct ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 55 | |
| Text: Funct ... | |
| enterIdentifier | |
| File: m_input_mult.v , 55 | |
| Text: Funct ... | |
| enterCase_item | |
| File: m_input_mult.v , 56 | |
| Text: { 2'b01 , 5'bx } : b ... | |
| enterExpression | |
| File: m_input_mult.v , 56 | |
| Text: { 2'b01 , 5'bx } ... | |
| enterPrimary | |
| File: m_input_mult.v , 56 | |
| Text: { 2'b01 , 5'bx } ... | |
| enterConcatenation | |
| File: m_input_mult.v , 56 | |
| Text: { 2'b01 , 5'bx } ... | |
| enterExpression | |
| File: m_input_mult.v , 56 | |
| Text: 2'b01 ... | |
| enterPrimary | |
| File: m_input_mult.v , 56 | |
| Text: 2'b01 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 56 | |
| Text: 2'b01 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 56 | |
| Text: 2'b01 ... | |
| enterExpression | |
| File: m_input_mult.v , 56 | |
| Text: 5'bx ... | |
| enterPrimary | |
| File: m_input_mult.v , 56 | |
| Text: 5'bx ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 56 | |
| Text: 5'bx ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 56 | |
| Text: 5'bx ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 56 | |
| Text: begin Sel = 2'b11 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 56 | |
| Text: begin Sel = 2'b11 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 56 | |
| Text: begin Sel = 2'b11 ; ... | |
| enterSeq_block | |
| File: m_input_mult.v , 56 | |
| Text: begin Sel = 2'b11 ; ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 57 | |
| Text: Sel = 2'b11 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 57 | |
| Text: Sel = 2'b11 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 57 | |
| Text: Sel = 2'b11 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 57 | |
| Text: Sel = 2'b11 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 57 | |
| Text: Sel = 2'b11 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 57 | |
| Text: Sel ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 57 | |
| Text: Sel ... | |
| enterSelect | |
| File: m_input_mult.v , 57 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 57 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 57 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 57 | |
| Text: 2'b11 ... | |
| enterPrimary | |
| File: m_input_mult.v , 57 | |
| Text: 2'b11 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 57 | |
| Text: 2'b11 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 57 | |
| Text: 2'b11 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 58 | |
| Text: B = 1'b1 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 58 | |
| Text: B = 1'b1 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 58 | |
| Text: B = 1'b1 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 58 | |
| Text: B = 1'b1 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 58 | |
| Text: B = 1'b1 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 58 | |
| Text: B ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 58 | |
| Text: B ... | |
| enterSelect | |
| File: m_input_mult.v , 58 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 58 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 58 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 58 | |
| Text: 1'b1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 58 | |
| Text: 1'b1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 58 | |
| Text: 1'b1 ... | |
| enterNumber_1Tickb1 | |
| File: m_input_mult.v , 58 | |
| Text: 1'b1 ... | |
| enterEnd | |
| File: m_input_mult.v , 59 | |
| Text: end ... | |
| enterCase_item | |
| File: m_input_mult.v , 60 | |
| Text: { 2'b11 , 5'b00011 } ... | |
| enterExpression | |
| File: m_input_mult.v , 60 | |
| Text: { 2'b11 , 5'b00011 } ... | |
| enterPrimary | |
| File: m_input_mult.v , 60 | |
| Text: { 2'b11 , 5'b00011 } ... | |
| enterConcatenation | |
| File: m_input_mult.v , 60 | |
| Text: { 2'b11 , 5'b00011 } ... | |
| enterExpression | |
| File: m_input_mult.v , 60 | |
| Text: 2'b11 ... | |
| enterPrimary | |
| File: m_input_mult.v , 60 | |
| Text: 2'b11 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 60 | |
| Text: 2'b11 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 60 | |
| Text: 2'b11 ... | |
| enterExpression | |
| File: m_input_mult.v , 60 | |
| Text: 5'b00011 ... | |
| enterPrimary | |
| File: m_input_mult.v , 60 | |
| Text: 5'b00011 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 60 | |
| Text: 5'b00011 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 60 | |
| Text: 5'b00011 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 60 | |
| Text: begin Sel = 2'b01 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 60 | |
| Text: begin Sel = 2'b01 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 60 | |
| Text: begin Sel = 2'b01 ; ... | |
| enterSeq_block | |
| File: m_input_mult.v , 60 | |
| Text: begin Sel = 2'b01 ; ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 61 | |
| Text: Sel = 2'b01 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 61 | |
| Text: Sel = 2'b01 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 61 | |
| Text: Sel = 2'b01 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 61 | |
| Text: Sel = 2'b01 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 61 | |
| Text: Sel = 2'b01 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 61 | |
| Text: Sel ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 61 | |
| Text: Sel ... | |
| enterSelect | |
| File: m_input_mult.v , 61 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 61 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 61 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 61 | |
| Text: 2'b01 ... | |
| enterPrimary | |
| File: m_input_mult.v , 61 | |
| Text: 2'b01 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 61 | |
| Text: 2'b01 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 61 | |
| Text: 2'b01 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 62 | |
| Text: B = 1'b1 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 62 | |
| Text: B = 1'b1 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 62 | |
| Text: B = 1'b1 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 62 | |
| Text: B = 1'b1 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 62 | |
| Text: B = 1'b1 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 62 | |
| Text: B ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 62 | |
| Text: B ... | |
| enterSelect | |
| File: m_input_mult.v , 62 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 62 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 62 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 62 | |
| Text: 1'b1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 62 | |
| Text: 1'b1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 62 | |
| Text: 1'b1 ... | |
| enterNumber_1Tickb1 | |
| File: m_input_mult.v , 62 | |
| Text: 1'b1 ... | |
| enterEnd | |
| File: m_input_mult.v , 63 | |
| Text: end ... | |
| enterCase_item | |
| File: m_input_mult.v , 64 | |
| Text: { 2'b11 , 5'b00001 } ... | |
| enterExpression | |
| File: m_input_mult.v , 64 | |
| Text: { 2'b11 , 5'b00001 } ... | |
| enterPrimary | |
| File: m_input_mult.v , 64 | |
| Text: { 2'b11 , 5'b00001 } ... | |
| enterConcatenation | |
| File: m_input_mult.v , 64 | |
| Text: { 2'b11 , 5'b00001 } ... | |
| enterExpression | |
| File: m_input_mult.v , 64 | |
| Text: 2'b11 ... | |
| enterPrimary | |
| File: m_input_mult.v , 64 | |
| Text: 2'b11 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 64 | |
| Text: 2'b11 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 64 | |
| Text: 2'b11 ... | |
| enterExpression | |
| File: m_input_mult.v , 64 | |
| Text: 5'b00001 ... | |
| enterPrimary | |
| File: m_input_mult.v , 64 | |
| Text: 5'b00001 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 64 | |
| Text: 5'b00001 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 64 | |
| Text: 5'b00001 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 64 | |
| Text: begin Sel = 2'b10 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 64 | |
| Text: begin Sel = 2'b10 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 64 | |
| Text: begin Sel = 2'b10 ; ... | |
| enterSeq_block | |
| File: m_input_mult.v , 64 | |
| Text: begin Sel = 2'b10 ; ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 65 | |
| Text: Sel = 2'b10 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 65 | |
| Text: Sel = 2'b10 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 65 | |
| Text: Sel = 2'b10 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 65 | |
| Text: Sel = 2'b10 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 65 | |
| Text: Sel = 2'b10 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 65 | |
| Text: Sel ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 65 | |
| Text: Sel ... | |
| enterSelect | |
| File: m_input_mult.v , 65 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 65 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 65 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 65 | |
| Text: 2'b10 ... | |
| enterPrimary | |
| File: m_input_mult.v , 65 | |
| Text: 2'b10 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 65 | |
| Text: 2'b10 ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 65 | |
| Text: 2'b10 ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 66 | |
| Text: B = 1'b1 ; ... | |
| enterStatement | |
| File: m_input_mult.v , 66 | |
| Text: B = 1'b1 ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 66 | |
| Text: B = 1'b1 ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 66 | |
| Text: B = 1'b1 ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 66 | |
| Text: B = 1'b1 ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 66 | |
| Text: B ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 66 | |
| Text: B ... | |
| enterSelect | |
| File: m_input_mult.v , 66 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 66 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 66 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 66 | |
| Text: 1'b1 ... | |
| enterPrimary | |
| File: m_input_mult.v , 66 | |
| Text: 1'b1 ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 66 | |
| Text: 1'b1 ... | |
| enterNumber_1Tickb1 | |
| File: m_input_mult.v , 66 | |
| Text: 1'b1 ... | |
| enterEnd | |
| File: m_input_mult.v , 67 | |
| Text: end ... | |
| enterCase_item | |
| File: m_input_mult.v , 68 | |
| Text: default : begin Sel ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 68 | |
| Text: begin Sel = 2'bxx ; ... | |
| enterStatement | |
| File: m_input_mult.v , 68 | |
| Text: begin Sel = 2'bxx ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 68 | |
| Text: begin Sel = 2'bxx ; ... | |
| enterSeq_block | |
| File: m_input_mult.v , 68 | |
| Text: begin Sel = 2'bxx ; ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 69 | |
| Text: Sel = 2'bxx ; ... | |
| enterStatement | |
| File: m_input_mult.v , 69 | |
| Text: Sel = 2'bxx ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 69 | |
| Text: Sel = 2'bxx ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 69 | |
| Text: Sel = 2'bxx ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 69 | |
| Text: Sel = 2'bxx ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 69 | |
| Text: Sel ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 69 | |
| Text: Sel ... | |
| enterSelect | |
| File: m_input_mult.v , 69 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 69 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 69 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 69 | |
| Text: 2'bxx ... | |
| enterPrimary | |
| File: m_input_mult.v , 69 | |
| Text: 2'bxx ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 69 | |
| Text: 2'bxx ... | |
| enterNumber_Integral | |
| File: m_input_mult.v , 69 | |
| Text: 2'bxx ... | |
| enterStatement_or_null | |
| File: m_input_mult.v , 70 | |
| Text: B = 1'bx ; ... | |
| enterStatement | |
| File: m_input_mult.v , 70 | |
| Text: B = 1'bx ; ... | |
| enterStatement_item | |
| File: m_input_mult.v , 70 | |
| Text: B = 1'bx ; ... | |
| enterBlocking_assignment | |
| File: m_input_mult.v , 70 | |
| Text: B = 1'bx ... | |
| enterOperator_assignment | |
| File: m_input_mult.v , 70 | |
| Text: B = 1'bx ... | |
| enterVariable_lvalue | |
| File: m_input_mult.v , 70 | |
| Text: B ... | |
| enterHierarchical_identifier | |
| File: m_input_mult.v , 70 | |
| Text: B ... | |
| enterSelect | |
| File: m_input_mult.v , 70 | |
| Text: ... | |
| enterBit_select | |
| File: m_input_mult.v , 70 | |
| Text: ... | |
| enterAssignOp_Assign | |
| File: m_input_mult.v , 70 | |
| Text: = ... | |
| enterExpression | |
| File: m_input_mult.v , 70 | |
| Text: 1'bx ... | |
| enterPrimary | |
| File: m_input_mult.v , 70 | |
| Text: 1'bx ... | |
| enterPrimary_literal | |
| File: m_input_mult.v , 70 | |
| Text: 1'bx ... | |
| enterNumber_1Tickbx | |
| File: m_input_mult.v , 70 | |
| Text: 1'bx ... | |
| enterEnd | |
| File: m_input_mult.v , 71 | |
| Text: end ... | |
| enterEndcase | |
| File: m_input_mult.v , 72 | |
| Text: endcase ... | |
| enterEndmodule | |
| File: m_input_mult.v , 73 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "/home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv". | |
| enterTop_level_rule | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module libmodule ; e ... | |
| enterNull_rule | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: ... | |
| enterSource_text | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module libmodule ; e ... | |
| enterDescription | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module libmodule ; e ... | |
| enterModule_declaration | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module libmodule ; e ... | |
| enterModule_ansi_header | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module libmodule ; ... | |
| enterModule_keyword | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: module ... | |
| enterIdentifier | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 1 | |
| Text: libmodule ... | |
| enterEndmodule | |
| File: /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv , 2 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "mux21.v". | |
| enterTop_level_rule | |
| File: mux21.v , 7 | |
| Text: module mux21_switch ... | |
| enterNull_rule | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterSource_text | |
| File: mux21.v , 7 | |
| Text: module mux21_switch ... | |
| enterDescription | |
| File: mux21.v , 7 | |
| Text: module mux21_switch ... | |
| enterModule_declaration | |
| File: mux21.v , 7 | |
| Text: module mux21_switch ... | |
| enterModule_nonansi_header | |
| File: mux21.v , 7 | |
| Text: module mux21_switch ... | |
| enterModule_keyword | |
| File: mux21.v , 7 | |
| Text: module ... | |
| enterIdentifier | |
| File: mux21.v , 7 | |
| Text: mux21_switch ... | |
| enterList_of_ports | |
| File: mux21.v , 7 | |
| Text: ( out , ctrl , in1 , ... | |
| enterPort | |
| File: mux21.v , 7 | |
| Text: out ... | |
| enterPort_expression | |
| File: mux21.v , 7 | |
| Text: out ... | |
| enterPort_reference | |
| File: mux21.v , 7 | |
| Text: out ... | |
| enterIdentifier | |
| File: mux21.v , 7 | |
| Text: out ... | |
| enterConstant_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterPort | |
| File: mux21.v , 7 | |
| Text: ctrl ... | |
| enterPort_expression | |
| File: mux21.v , 7 | |
| Text: ctrl ... | |
| enterPort_reference | |
| File: mux21.v , 7 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 7 | |
| Text: ctrl ... | |
| enterConstant_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterPort | |
| File: mux21.v , 7 | |
| Text: in1 ... | |
| enterPort_expression | |
| File: mux21.v , 7 | |
| Text: in1 ... | |
| enterPort_reference | |
| File: mux21.v , 7 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: mux21.v , 7 | |
| Text: in1 ... | |
| enterConstant_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterPort | |
| File: mux21.v , 7 | |
| Text: in2 ... | |
| enterPort_expression | |
| File: mux21.v , 7 | |
| Text: in2 ... | |
| enterPort_reference | |
| File: mux21.v , 7 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: mux21.v , 7 | |
| Text: in2 ... | |
| enterConstant_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 7 | |
| Text: ... | |
| enterModule_item | |
| File: mux21.v , 9 | |
| Text: output out ; ... | |
| enterPort_declaration | |
| File: mux21.v , 9 | |
| Text: output out ... | |
| enterOutput_declaration | |
| File: mux21.v , 9 | |
| Text: output out ... | |
| enterNet_port_type | |
| File: mux21.v , 9 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: mux21.v , 9 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: mux21.v , 9 | |
| Text: out ... | |
| enterIdentifier | |
| File: mux21.v , 9 | |
| Text: out ... | |
| enterModule_item | |
| File: mux21.v , 10 | |
| Text: input ctrl , in1 , i ... | |
| enterPort_declaration | |
| File: mux21.v , 10 | |
| Text: input ctrl , in1 , i ... | |
| enterInput_declaration | |
| File: mux21.v , 10 | |
| Text: input ctrl , in1 , i ... | |
| enterNet_port_type | |
| File: mux21.v , 10 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: mux21.v , 10 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: mux21.v , 10 | |
| Text: ctrl , in1 , in2 ... | |
| enterIdentifier | |
| File: mux21.v , 10 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 10 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: mux21.v , 10 | |
| Text: in2 ... | |
| enterModule_item | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterNon_port_module_item | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterModule_common_item | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterModule_or_generate_item_declaration | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterNet_declaration | |
| File: mux21.v , 11 | |
| Text: wire e ; ... | |
| enterNetType_Wire | |
| File: mux21.v , 11 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: mux21.v , 11 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: mux21.v , 11 | |
| Text: e ... | |
| enterNet_decl_assignment | |
| File: mux21.v , 11 | |
| Text: e ... | |
| enterIdentifier | |
| File: mux21.v , 11 | |
| Text: e ... | |
| enterModule_item | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterNon_port_module_item | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterModule_common_item | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterModule_or_generate_item_declaration | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterNet_declaration | |
| File: mux21.v , 13 | |
| Text: supply1 power ; ... | |
| enterNetType_Supply1 | |
| File: mux21.v , 13 | |
| Text: supply1 ... | |
| enterData_type_or_implicit | |
| File: mux21.v , 13 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: mux21.v , 13 | |
| Text: power ... | |
| enterNet_decl_assignment | |
| File: mux21.v , 13 | |
| Text: power ... | |
| enterIdentifier | |
| File: mux21.v , 13 | |
| Text: power ... | |
| enterModule_item | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterNon_port_module_item | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterModule_common_item | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterModule_or_generate_item_declaration | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterPackage_or_generate_item_declaration | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterNet_declaration | |
| File: mux21.v , 14 | |
| Text: supply0 ground ; ... | |
| enterNetType_Supply0 | |
| File: mux21.v , 14 | |
| Text: supply0 ... | |
| enterData_type_or_implicit | |
| File: mux21.v , 14 | |
| Text: ... | |
| enterList_of_net_decl_assignments | |
| File: mux21.v , 14 | |
| Text: ground ... | |
| enterNet_decl_assignment | |
| File: mux21.v , 14 | |
| Text: ground ... | |
| enterIdentifier | |
| File: mux21.v , 14 | |
| Text: ground ... | |
| enterModule_item | |
| File: mux21.v , 16 | |
| Text: pmos N1 ( e , power ... | |
| enterNon_port_module_item | |
| File: mux21.v , 16 | |
| Text: pmos N1 ( e , power ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 16 | |
| Text: pmos N1 ( e , power ... | |
| enterGate_instantiation | |
| File: mux21.v , 16 | |
| Text: pmos N1 ( e , power ... | |
| enterMosSwitchType_PMos | |
| File: mux21.v , 16 | |
| Text: pmos ... | |
| enterMos_switch_instance | |
| File: mux21.v , 16 | |
| Text: N1 ( e , power , ctr ... | |
| enterName_of_instance | |
| File: mux21.v , 16 | |
| Text: N1 ... | |
| enterIdentifier | |
| File: mux21.v , 16 | |
| Text: N1 ... | |
| enterNet_lvalue | |
| File: mux21.v , 16 | |
| Text: e ... | |
| enterPs_or_hierarchical_identifier | |
| File: mux21.v , 16 | |
| Text: e ... | |
| enterIdentifier | |
| File: mux21.v , 16 | |
| Text: e ... | |
| enterConstant_select | |
| File: mux21.v , 16 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 16 | |
| Text: ... | |
| enterExpression | |
| File: mux21.v , 16 | |
| Text: power ... | |
| enterPrimary | |
| File: mux21.v , 16 | |
| Text: power ... | |
| enterPrimary_literal | |
| File: mux21.v , 16 | |
| Text: power ... | |
| enterIdentifier | |
| File: mux21.v , 16 | |
| Text: power ... | |
| enterExpression | |
| File: mux21.v , 16 | |
| Text: ctrl ... | |
| enterPrimary | |
| File: mux21.v , 16 | |
| Text: ctrl ... | |
| enterPrimary_literal | |
| File: mux21.v , 16 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 16 | |
| Text: ctrl ... | |
| enterModule_item | |
| File: mux21.v , 17 | |
| Text: nmos N2 ( e , ground ... | |
| enterNon_port_module_item | |
| File: mux21.v , 17 | |
| Text: nmos N2 ( e , ground ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 17 | |
| Text: nmos N2 ( e , ground ... | |
| enterGate_instantiation | |
| File: mux21.v , 17 | |
| Text: nmos N2 ( e , ground ... | |
| enterMosSwitchType_NMos | |
| File: mux21.v , 17 | |
| Text: nmos ... | |
| enterMos_switch_instance | |
| File: mux21.v , 17 | |
| Text: N2 ( e , ground , ct ... | |
| enterName_of_instance | |
| File: mux21.v , 17 | |
| Text: N2 ... | |
| enterIdentifier | |
| File: mux21.v , 17 | |
| Text: N2 ... | |
| enterNet_lvalue | |
| File: mux21.v , 17 | |
| Text: e ... | |
| enterPs_or_hierarchical_identifier | |
| File: mux21.v , 17 | |
| Text: e ... | |
| enterIdentifier | |
| File: mux21.v , 17 | |
| Text: e ... | |
| enterConstant_select | |
| File: mux21.v , 17 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 17 | |
| Text: ... | |
| enterExpression | |
| File: mux21.v , 17 | |
| Text: ground ... | |
| enterPrimary | |
| File: mux21.v , 17 | |
| Text: ground ... | |
| enterPrimary_literal | |
| File: mux21.v , 17 | |
| Text: ground ... | |
| enterIdentifier | |
| File: mux21.v , 17 | |
| Text: ground ... | |
| enterExpression | |
| File: mux21.v , 17 | |
| Text: ctrl ... | |
| enterPrimary | |
| File: mux21.v , 17 | |
| Text: ctrl ... | |
| enterPrimary_literal | |
| File: mux21.v , 17 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 17 | |
| Text: ctrl ... | |
| enterModule_item | |
| File: mux21.v , 19 | |
| Text: cmos C1 ( out , in1 ... | |
| enterNon_port_module_item | |
| File: mux21.v , 19 | |
| Text: cmos C1 ( out , in1 ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 19 | |
| Text: cmos C1 ( out , in1 ... | |
| enterGate_instantiation | |
| File: mux21.v , 19 | |
| Text: cmos C1 ( out , in1 ... | |
| enterCmosSwitchType_Cmos | |
| File: mux21.v , 19 | |
| Text: cmos ... | |
| enterCmos_switch_instance | |
| File: mux21.v , 19 | |
| Text: C1 ( out , in1 , w , ... | |
| enterName_of_instance | |
| File: mux21.v , 19 | |
| Text: C1 ... | |
| enterIdentifier | |
| File: mux21.v , 19 | |
| Text: C1 ... | |
| enterNet_lvalue | |
| File: mux21.v , 19 | |
| Text: out ... | |
| enterPs_or_hierarchical_identifier | |
| File: mux21.v , 19 | |
| Text: out ... | |
| enterIdentifier | |
| File: mux21.v , 19 | |
| Text: out ... | |
| enterConstant_select | |
| File: mux21.v , 19 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 19 | |
| Text: ... | |
| enterExpression | |
| File: mux21.v , 19 | |
| Text: in1 ... | |
| enterPrimary | |
| File: mux21.v , 19 | |
| Text: in1 ... | |
| enterPrimary_literal | |
| File: mux21.v , 19 | |
| Text: in1 ... | |
| enterIdentifier | |
| File: mux21.v , 19 | |
| Text: in1 ... | |
| enterExpression | |
| File: mux21.v , 19 | |
| Text: w ... | |
| enterPrimary | |
| File: mux21.v , 19 | |
| Text: w ... | |
| enterPrimary_literal | |
| File: mux21.v , 19 | |
| Text: w ... | |
| enterIdentifier | |
| File: mux21.v , 19 | |
| Text: w ... | |
| enterExpression | |
| File: mux21.v , 19 | |
| Text: ctrl ... | |
| enterPrimary | |
| File: mux21.v , 19 | |
| Text: ctrl ... | |
| enterPrimary_literal | |
| File: mux21.v , 19 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 19 | |
| Text: ctrl ... | |
| enterModule_item | |
| File: mux21.v , 20 | |
| Text: cmos C2 ( out , in2 ... | |
| enterNon_port_module_item | |
| File: mux21.v , 20 | |
| Text: cmos C2 ( out , in2 ... | |
| enterModule_or_generate_item | |
| File: mux21.v , 20 | |
| Text: cmos C2 ( out , in2 ... | |
| enterGate_instantiation | |
| File: mux21.v , 20 | |
| Text: cmos C2 ( out , in2 ... | |
| enterCmosSwitchType_Cmos | |
| File: mux21.v , 20 | |
| Text: cmos ... | |
| enterCmos_switch_instance | |
| File: mux21.v , 20 | |
| Text: C2 ( out , in2 , ctr ... | |
| enterName_of_instance | |
| File: mux21.v , 20 | |
| Text: C2 ... | |
| enterIdentifier | |
| File: mux21.v , 20 | |
| Text: C2 ... | |
| enterNet_lvalue | |
| File: mux21.v , 20 | |
| Text: out ... | |
| enterPs_or_hierarchical_identifier | |
| File: mux21.v , 20 | |
| Text: out ... | |
| enterIdentifier | |
| File: mux21.v , 20 | |
| Text: out ... | |
| enterConstant_select | |
| File: mux21.v , 20 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: mux21.v , 20 | |
| Text: ... | |
| enterExpression | |
| File: mux21.v , 20 | |
| Text: in2 ... | |
| enterPrimary | |
| File: mux21.v , 20 | |
| Text: in2 ... | |
| enterPrimary_literal | |
| File: mux21.v , 20 | |
| Text: in2 ... | |
| enterIdentifier | |
| File: mux21.v , 20 | |
| Text: in2 ... | |
| enterExpression | |
| File: mux21.v , 20 | |
| Text: ctrl ... | |
| enterPrimary | |
| File: mux21.v , 20 | |
| Text: ctrl ... | |
| enterPrimary_literal | |
| File: mux21.v , 20 | |
| Text: ctrl ... | |
| enterIdentifier | |
| File: mux21.v , 20 | |
| Text: ctrl ... | |
| enterExpression | |
| File: mux21.v , 20 | |
| Text: w ... | |
| enterPrimary | |
| File: mux21.v , 20 | |
| Text: w ... | |
| enterPrimary_literal | |
| File: mux21.v , 20 | |
| Text: w ... | |
| enterIdentifier | |
| File: mux21.v , 20 | |
| Text: w ... | |
| enterEndmodule | |
| File: mux21.v , 22 | |
| Text: endmodule ... | |
| [INFO :PY0400] Processing source file "synfifo.v". | |
| enterTop_level_rule | |
| File: synfifo.v , 8 | |
| Text: module syn_fifo ( cl ... | |
| enterNull_rule | |
| File: synfifo.v , 8 | |
| Text: ... | |
| enterSource_text | |
| File: synfifo.v , 8 | |
| Text: module syn_fifo ( cl ... | |
| enterDescription | |
| File: synfifo.v , 8 | |
| Text: module syn_fifo ( cl ... | |
| enterModule_declaration | |
| File: synfifo.v , 8 | |
| Text: module syn_fifo ( cl ... | |
| enterModule_nonansi_header | |
| File: synfifo.v , 8 | |
| Text: module syn_fifo ( cl ... | |
| enterModule_keyword | |
| File: synfifo.v , 8 | |
| Text: module ... | |
| enterIdentifier | |
| File: synfifo.v , 8 | |
| Text: syn_fifo ... | |
| enterList_of_ports | |
| File: synfifo.v , 8 | |
| Text: ( clk , rst , wr_cs ... | |
| enterPort | |
| File: synfifo.v , 9 | |
| Text: clk ... | |
| enterPort_expression | |
| File: synfifo.v , 9 | |
| Text: clk ... | |
| enterPort_reference | |
| File: synfifo.v , 9 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 9 | |
| Text: clk ... | |
| enterConstant_select | |
| File: synfifo.v , 9 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 9 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 10 | |
| Text: rst ... | |
| enterPort_expression | |
| File: synfifo.v , 10 | |
| Text: rst ... | |
| enterPort_reference | |
| File: synfifo.v , 10 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 10 | |
| Text: rst ... | |
| enterConstant_select | |
| File: synfifo.v , 10 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 10 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 11 | |
| Text: wr_cs ... | |
| enterPort_expression | |
| File: synfifo.v , 11 | |
| Text: wr_cs ... | |
| enterPort_reference | |
| File: synfifo.v , 11 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 11 | |
| Text: wr_cs ... | |
| enterConstant_select | |
| File: synfifo.v , 11 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 11 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 12 | |
| Text: rd_cs ... | |
| enterPort_expression | |
| File: synfifo.v , 12 | |
| Text: rd_cs ... | |
| enterPort_reference | |
| File: synfifo.v , 12 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 12 | |
| Text: rd_cs ... | |
| enterConstant_select | |
| File: synfifo.v , 12 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 12 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 13 | |
| Text: data_in ... | |
| enterPort_expression | |
| File: synfifo.v , 13 | |
| Text: data_in ... | |
| enterPort_reference | |
| File: synfifo.v , 13 | |
| Text: data_in ... | |
| enterIdentifier | |
| File: synfifo.v , 13 | |
| Text: data_in ... | |
| enterConstant_select | |
| File: synfifo.v , 13 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 13 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 14 | |
| Text: rd_en ... | |
| enterPort_expression | |
| File: synfifo.v , 14 | |
| Text: rd_en ... | |
| enterPort_reference | |
| File: synfifo.v , 14 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 14 | |
| Text: rd_en ... | |
| enterConstant_select | |
| File: synfifo.v , 14 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 14 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 15 | |
| Text: wr_en ... | |
| enterPort_expression | |
| File: synfifo.v , 15 | |
| Text: wr_en ... | |
| enterPort_reference | |
| File: synfifo.v , 15 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 15 | |
| Text: wr_en ... | |
| enterConstant_select | |
| File: synfifo.v , 15 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 15 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 16 | |
| Text: data_out ... | |
| enterPort_expression | |
| File: synfifo.v , 16 | |
| Text: data_out ... | |
| enterPort_reference | |
| File: synfifo.v , 16 | |
| Text: data_out ... | |
| enterIdentifier | |
| File: synfifo.v , 16 | |
| Text: data_out ... | |
| enterConstant_select | |
| File: synfifo.v , 16 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 16 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 17 | |
| Text: empty ... | |
| enterPort_expression | |
| File: synfifo.v , 17 | |
| Text: empty ... | |
| enterPort_reference | |
| File: synfifo.v , 17 | |
| Text: empty ... | |
| enterIdentifier | |
| File: synfifo.v , 17 | |
| Text: empty ... | |
| enterConstant_select | |
| File: synfifo.v , 17 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 17 | |
| Text: ... | |
| enterPort | |
| File: synfifo.v , 18 | |
| Text: full ... | |
| enterPort_expression | |
| File: synfifo.v , 18 | |
| Text: full ... | |
| enterPort_reference | |
| File: synfifo.v , 18 | |
| Text: full ... | |
| enterIdentifier | |
| File: synfifo.v , 18 | |
| Text: full ... | |
| enterConstant_select | |
| File: synfifo.v , 19 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 19 | |
| Text: ... | |
| enterModule_item | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterModule_common_item | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterParameter_declaration | |
| File: synfifo.v , 22 | |
| Text: parameter DATA_WIDTH ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 22 | |
| Text: ... | |
| enterList_of_param_assignments | |
| File: synfifo.v , 22 | |
| Text: DATA_WIDTH = 8 ... | |
| enterParam_assignment | |
| File: synfifo.v , 22 | |
| Text: DATA_WIDTH = 8 ... | |
| enterIdentifier | |
| File: synfifo.v , 22 | |
| Text: DATA_WIDTH ... | |
| enterConstant_param_expression | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterConstant_mintypmax_expression | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterConstant_expression | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterConstant_primary | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 22 | |
| Text: 8 ... | |
| enterModule_item | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterModule_common_item | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterParameter_declaration | |
| File: synfifo.v , 23 | |
| Text: parameter ADDR_WIDTH ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 23 | |
| Text: ... | |
| enterList_of_param_assignments | |
| File: synfifo.v , 23 | |
| Text: ADDR_WIDTH = 8 ... | |
| enterParam_assignment | |
| File: synfifo.v , 23 | |
| Text: ADDR_WIDTH = 8 ... | |
| enterIdentifier | |
| File: synfifo.v , 23 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_param_expression | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterConstant_mintypmax_expression | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterConstant_expression | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterConstant_primary | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 23 | |
| Text: 8 ... | |
| enterModule_item | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterModule_common_item | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterParameter_declaration | |
| File: synfifo.v , 24 | |
| Text: parameter RAM_DEPTH ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 24 | |
| Text: ... | |
| enterList_of_param_assignments | |
| File: synfifo.v , 24 | |
| Text: RAM_DEPTH = ( 1 << A ... | |
| enterParam_assignment | |
| File: synfifo.v , 24 | |
| Text: RAM_DEPTH = ( 1 << A ... | |
| enterIdentifier | |
| File: synfifo.v , 24 | |
| Text: RAM_DEPTH ... | |
| enterConstant_param_expression | |
| File: synfifo.v , 24 | |
| Text: ( 1 << ADDR_WIDTH ) ... | |
| enterConstant_mintypmax_expression | |
| File: synfifo.v , 24 | |
| Text: ( 1 << ADDR_WIDTH ) ... | |
| enterConstant_expression | |
| File: synfifo.v , 24 | |
| Text: ( 1 << ADDR_WIDTH ) ... | |
| enterConstant_primary | |
| File: synfifo.v , 24 | |
| Text: ( 1 << ADDR_WIDTH ) ... | |
| enterConstant_mintypmax_expression | |
| File: synfifo.v , 24 | |
| Text: 1 << ADDR_WIDTH ... | |
| enterConstant_expression | |
| File: synfifo.v , 24 | |
| Text: 1 << ADDR_WIDTH ... | |
| enterConstant_expression | |
| File: synfifo.v , 24 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 24 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 24 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 24 | |
| Text: 1 ... | |
| enterBinOp_ShiftLeft | |
| File: synfifo.v , 24 | |
| Text: << ... | |
| enterConstant_expression | |
| File: synfifo.v , 24 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 24 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 24 | |
| Text: ADDR_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 24 | |
| Text: ADDR_WIDTH ... | |
| enterModule_item | |
| File: synfifo.v , 26 | |
| Text: input clk ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 26 | |
| Text: input clk ... | |
| enterInput_declaration | |
| File: synfifo.v , 26 | |
| Text: input clk ... | |
| enterNet_port_type | |
| File: synfifo.v , 26 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 26 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 26 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 26 | |
| Text: clk ... | |
| enterModule_item | |
| File: synfifo.v , 27 | |
| Text: input rst ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 27 | |
| Text: input rst ... | |
| enterInput_declaration | |
| File: synfifo.v , 27 | |
| Text: input rst ... | |
| enterNet_port_type | |
| File: synfifo.v , 27 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 27 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 27 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 27 | |
| Text: rst ... | |
| enterModule_item | |
| File: synfifo.v , 28 | |
| Text: input wr_cs ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 28 | |
| Text: input wr_cs ... | |
| enterInput_declaration | |
| File: synfifo.v , 28 | |
| Text: input wr_cs ... | |
| enterNet_port_type | |
| File: synfifo.v , 28 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 28 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 28 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 28 | |
| Text: wr_cs ... | |
| enterModule_item | |
| File: synfifo.v , 29 | |
| Text: input rd_cs ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 29 | |
| Text: input rd_cs ... | |
| enterInput_declaration | |
| File: synfifo.v , 29 | |
| Text: input rd_cs ... | |
| enterNet_port_type | |
| File: synfifo.v , 29 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 29 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 29 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 29 | |
| Text: rd_cs ... | |
| enterModule_item | |
| File: synfifo.v , 30 | |
| Text: input rd_en ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 30 | |
| Text: input rd_en ... | |
| enterInput_declaration | |
| File: synfifo.v , 30 | |
| Text: input rd_en ... | |
| enterNet_port_type | |
| File: synfifo.v , 30 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 30 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 30 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 30 | |
| Text: rd_en ... | |
| enterModule_item | |
| File: synfifo.v , 31 | |
| Text: input wr_en ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 31 | |
| Text: input wr_en ... | |
| enterInput_declaration | |
| File: synfifo.v , 31 | |
| Text: input wr_en ... | |
| enterNet_port_type | |
| File: synfifo.v , 31 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 31 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 31 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 31 | |
| Text: wr_en ... | |
| enterModule_item | |
| File: synfifo.v , 32 | |
| Text: input [ DATA_WIDTH - ... | |
| enterPort_declaration | |
| File: synfifo.v , 32 | |
| Text: input [ DATA_WIDTH - ... | |
| enterInput_declaration | |
| File: synfifo.v , 32 | |
| Text: input [ DATA_WIDTH - ... | |
| enterNet_port_type | |
| File: synfifo.v , 32 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 32 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterPacked_dimension | |
| File: synfifo.v , 32 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 32 | |
| Text: DATA_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 32 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 32 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 32 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 32 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 32 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 32 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 32 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 32 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 32 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 32 | |
| Text: data_in ... | |
| enterIdentifier | |
| File: synfifo.v , 32 | |
| Text: data_in ... | |
| enterModule_item | |
| File: synfifo.v , 33 | |
| Text: output full ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 33 | |
| Text: output full ... | |
| enterOutput_declaration | |
| File: synfifo.v , 33 | |
| Text: output full ... | |
| enterNet_port_type | |
| File: synfifo.v , 33 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 33 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 33 | |
| Text: full ... | |
| enterIdentifier | |
| File: synfifo.v , 33 | |
| Text: full ... | |
| enterModule_item | |
| File: synfifo.v , 34 | |
| Text: output empty ; ... | |
| enterPort_declaration | |
| File: synfifo.v , 34 | |
| Text: output empty ... | |
| enterOutput_declaration | |
| File: synfifo.v , 34 | |
| Text: output empty ... | |
| enterNet_port_type | |
| File: synfifo.v , 34 | |
| Text: ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 34 | |
| Text: ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 34 | |
| Text: empty ... | |
| enterIdentifier | |
| File: synfifo.v , 34 | |
| Text: empty ... | |
| enterModule_item | |
| File: synfifo.v , 35 | |
| Text: output [ DATA_WIDTH ... | |
| enterPort_declaration | |
| File: synfifo.v , 35 | |
| Text: output [ DATA_WIDTH ... | |
| enterOutput_declaration | |
| File: synfifo.v , 35 | |
| Text: output [ DATA_WIDTH ... | |
| enterNet_port_type | |
| File: synfifo.v , 35 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 35 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterPacked_dimension | |
| File: synfifo.v , 35 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 35 | |
| Text: DATA_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 35 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 35 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 35 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 35 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 35 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 35 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 35 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 35 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 35 | |
| Text: 0 ... | |
| enterList_of_port_identifiers | |
| File: synfifo.v , 35 | |
| Text: data_out ... | |
| enterIdentifier | |
| File: synfifo.v , 35 | |
| Text: data_out ... | |
| enterModule_item | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_common_item | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterData_declaration | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterVariable_declaration | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterData_type | |
| File: synfifo.v , 38 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterIntVec_TypeReg | |
| File: synfifo.v , 38 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: synfifo.v , 38 | |
| Text: [ ADDR_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 38 | |
| Text: ADDR_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 38 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 38 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 38 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 38 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 38 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 38 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 38 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 38 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 38 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: synfifo.v , 38 | |
| Text: wr_pointer ... | |
| enterVariable_decl_assignment | |
| File: synfifo.v , 38 | |
| Text: wr_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 38 | |
| Text: wr_pointer ... | |
| enterModule_item | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_common_item | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterData_declaration | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterVariable_declaration | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterData_type | |
| File: synfifo.v , 39 | |
| Text: reg [ ADDR_WIDTH - 1 ... | |
| enterIntVec_TypeReg | |
| File: synfifo.v , 39 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: synfifo.v , 39 | |
| Text: [ ADDR_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 39 | |
| Text: ADDR_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 39 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 39 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 39 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 39 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 39 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 39 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 39 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 39 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 39 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: synfifo.v , 39 | |
| Text: rd_pointer ... | |
| enterVariable_decl_assignment | |
| File: synfifo.v , 39 | |
| Text: rd_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 39 | |
| Text: rd_pointer ... | |
| enterModule_item | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterModule_common_item | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterData_declaration | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterVariable_declaration | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterData_type | |
| File: synfifo.v , 40 | |
| Text: reg [ ADDR_WIDTH : 0 ... | |
| enterIntVec_TypeReg | |
| File: synfifo.v , 40 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: synfifo.v , 40 | |
| Text: [ ADDR_WIDTH : 0 ] ... | |
| enterConstant_range | |
| File: synfifo.v , 40 | |
| Text: ADDR_WIDTH : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 40 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 40 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 40 | |
| Text: ADDR_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 40 | |
| Text: ADDR_WIDTH ... | |
| enterConstant_expression | |
| File: synfifo.v , 40 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 40 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 40 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 40 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: synfifo.v , 40 | |
| Text: status_cnt ... | |
| enterVariable_decl_assignment | |
| File: synfifo.v , 40 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 40 | |
| Text: status_cnt ... | |
| enterModule_item | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterModule_common_item | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterData_declaration | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterVariable_declaration | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterData_type | |
| File: synfifo.v , 41 | |
| Text: reg [ DATA_WIDTH - 1 ... | |
| enterIntVec_TypeReg | |
| File: synfifo.v , 41 | |
| Text: reg ... | |
| enterPacked_dimension | |
| File: synfifo.v , 41 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 41 | |
| Text: DATA_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 41 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 41 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 41 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 41 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 41 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 41 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 41 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 41 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 41 | |
| Text: 0 ... | |
| enterList_of_variable_decl_assignments | |
| File: synfifo.v , 41 | |
| Text: data_out ... | |
| enterVariable_decl_assignment | |
| File: synfifo.v , 41 | |
| Text: data_out ... | |
| enterIdentifier | |
| File: synfifo.v , 41 | |
| Text: data_out ... | |
| enterModule_item | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterModule_common_item | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterModule_or_generate_item_declaration | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterPackage_or_generate_item_declaration | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterNet_declaration | |
| File: synfifo.v , 42 | |
| Text: wire [ DATA_WIDTH - ... | |
| enterNetType_Wire | |
| File: synfifo.v , 42 | |
| Text: wire ... | |
| enterData_type_or_implicit | |
| File: synfifo.v , 42 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterPacked_dimension | |
| File: synfifo.v , 42 | |
| Text: [ DATA_WIDTH - 1 : 0 ... | |
| enterConstant_range | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH - 1 : 0 ... | |
| enterConstant_expression | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH - 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH ... | |
| enterConstant_primary | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 42 | |
| Text: DATA_WIDTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 42 | |
| Text: - ... | |
| enterConstant_expression | |
| File: synfifo.v , 42 | |
| Text: 1 ... | |
| enterConstant_primary | |
| File: synfifo.v , 42 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 42 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 42 | |
| Text: 1 ... | |
| enterConstant_expression | |
| File: synfifo.v , 42 | |
| Text: 0 ... | |
| enterConstant_primary | |
| File: synfifo.v , 42 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 42 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 42 | |
| Text: 0 ... | |
| enterList_of_net_decl_assignments | |
| File: synfifo.v , 42 | |
| Text: data_ram ... | |
| enterNet_decl_assignment | |
| File: synfifo.v , 42 | |
| Text: data_ram ... | |
| enterIdentifier | |
| File: synfifo.v , 42 | |
| Text: data_ram ... | |
| enterModule_item | |
| File: synfifo.v , 45 | |
| Text: assign full = ( stat ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 45 | |
| Text: assign full = ( stat ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 45 | |
| Text: assign full = ( stat ... | |
| enterModule_common_item | |
| File: synfifo.v , 45 | |
| Text: assign full = ( stat ... | |
| enterContinuous_assign | |
| File: synfifo.v , 45 | |
| Text: assign full = ( stat ... | |
| enterList_of_net_assignments | |
| File: synfifo.v , 45 | |
| Text: full = ( status_cnt ... | |
| enterNet_assignment | |
| File: synfifo.v , 45 | |
| Text: full = ( status_cnt ... | |
| enterNet_lvalue | |
| File: synfifo.v , 45 | |
| Text: full ... | |
| enterPs_or_hierarchical_identifier | |
| File: synfifo.v , 45 | |
| Text: full ... | |
| enterIdentifier | |
| File: synfifo.v , 45 | |
| Text: full ... | |
| enterConstant_select | |
| File: synfifo.v , 45 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 45 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: ( status_cnt == ( RA ... | |
| enterPrimary | |
| File: synfifo.v , 45 | |
| Text: ( status_cnt == ( RA ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 45 | |
| Text: status_cnt == ( RAM_ ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: status_cnt == ( RAM_ ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 45 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 45 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 45 | |
| Text: status_cnt ... | |
| enterBinOp_Equiv | |
| File: synfifo.v , 45 | |
| Text: == ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: ( RAM_DEPTH - 1 ) ... | |
| enterPrimary | |
| File: synfifo.v , 45 | |
| Text: ( RAM_DEPTH - 1 ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH - 1 ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH - 1 ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH ... | |
| enterPrimary | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH ... | |
| enterIdentifier | |
| File: synfifo.v , 45 | |
| Text: RAM_DEPTH ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 45 | |
| Text: - ... | |
| enterExpression | |
| File: synfifo.v , 45 | |
| Text: 1 ... | |
| enterPrimary | |
| File: synfifo.v , 45 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 45 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 45 | |
| Text: 1 ... | |
| enterModule_item | |
| File: synfifo.v , 46 | |
| Text: assign empty = ( sta ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 46 | |
| Text: assign empty = ( sta ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 46 | |
| Text: assign empty = ( sta ... | |
| enterModule_common_item | |
| File: synfifo.v , 46 | |
| Text: assign empty = ( sta ... | |
| enterContinuous_assign | |
| File: synfifo.v , 46 | |
| Text: assign empty = ( sta ... | |
| enterList_of_net_assignments | |
| File: synfifo.v , 46 | |
| Text: empty = ( status_cnt ... | |
| enterNet_assignment | |
| File: synfifo.v , 46 | |
| Text: empty = ( status_cnt ... | |
| enterNet_lvalue | |
| File: synfifo.v , 46 | |
| Text: empty ... | |
| enterPs_or_hierarchical_identifier | |
| File: synfifo.v , 46 | |
| Text: empty ... | |
| enterIdentifier | |
| File: synfifo.v , 46 | |
| Text: empty ... | |
| enterConstant_select | |
| File: synfifo.v , 46 | |
| Text: ... | |
| enterConstant_bit_select | |
| File: synfifo.v , 46 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 46 | |
| Text: ( status_cnt == 0 ) ... | |
| enterPrimary | |
| File: synfifo.v , 46 | |
| Text: ( status_cnt == 0 ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 46 | |
| Text: status_cnt == 0 ... | |
| enterExpression | |
| File: synfifo.v , 46 | |
| Text: status_cnt == 0 ... | |
| enterExpression | |
| File: synfifo.v , 46 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 46 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 46 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 46 | |
| Text: status_cnt ... | |
| enterBinOp_Equiv | |
| File: synfifo.v , 46 | |
| Text: == ... | |
| enterExpression | |
| File: synfifo.v , 46 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 46 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 46 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 46 | |
| Text: 0 ... | |
| enterModule_item | |
| File: synfifo.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: synfifo.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: synfifo.v , 49 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: synfifo.v , 49 | |
| Text: always ... | |
| enterStatement | |
| File: synfifo.v , 49 | |
| Text: @ ( posedge clk or p ... | |
| enterStatement_item | |
| File: synfifo.v , 49 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control_statement | |
| File: synfifo.v , 49 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control | |
| File: synfifo.v , 49 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_control | |
| File: synfifo.v , 49 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_expression | |
| File: synfifo.v , 49 | |
| Text: posedge clk or posed ... | |
| enterEvent_expression | |
| File: synfifo.v , 49 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 49 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 49 | |
| Text: clk ... | |
| enterPrimary | |
| File: synfifo.v , 49 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: synfifo.v , 49 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 49 | |
| Text: clk ... | |
| enterEvent_expression | |
| File: synfifo.v , 49 | |
| Text: posedge rst ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 49 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 49 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 49 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 49 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 49 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 50 | |
| Text: begin : WRITE_POINTE ... | |
| enterStatement | |
| File: synfifo.v , 50 | |
| Text: begin : WRITE_POINTE ... | |
| enterStatement_item | |
| File: synfifo.v , 50 | |
| Text: begin : WRITE_POINTE ... | |
| enterSeq_block | |
| File: synfifo.v , 50 | |
| Text: begin : WRITE_POINTE ... | |
| enterIdentifier | |
| File: synfifo.v , 50 | |
| Text: WRITE_POINTER ... | |
| enterStatement_or_null | |
| File: synfifo.v , 51 | |
| Text: if ( rst ) begin wr_ ... | |
| enterStatement | |
| File: synfifo.v , 51 | |
| Text: if ( rst ) begin wr_ ... | |
| enterStatement_item | |
| File: synfifo.v , 51 | |
| Text: if ( rst ) begin wr_ ... | |
| enterConditional_statement | |
| File: synfifo.v , 51 | |
| Text: if ( rst ) begin wr_ ... | |
| enterCond_predicate | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterExpression | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 51 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 51 | |
| Text: begin wr_pointer <= ... | |
| enterStatement | |
| File: synfifo.v , 51 | |
| Text: begin wr_pointer <= ... | |
| enterStatement_item | |
| File: synfifo.v , 51 | |
| Text: begin wr_pointer <= ... | |
| enterSeq_block | |
| File: synfifo.v , 51 | |
| Text: begin wr_pointer <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 52 | |
| Text: wr_pointer <= 0 ; ... | |
| enterStatement | |
| File: synfifo.v , 52 | |
| Text: wr_pointer <= 0 ; ... | |
| enterStatement_item | |
| File: synfifo.v , 52 | |
| Text: wr_pointer <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 52 | |
| Text: wr_pointer <= 0 ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 52 | |
| Text: wr_pointer ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 52 | |
| Text: wr_pointer ... | |
| enterSelect | |
| File: synfifo.v , 52 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 52 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 52 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 52 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 52 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 52 | |
| Text: 0 ... | |
| enterEnd | |
| File: synfifo.v , 53 | |
| Text: end ... | |
| enterCond_predicate | |
| File: synfifo.v , 53 | |
| Text: wr_cs && wr_en ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 53 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 53 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 53 | |
| Text: wr_cs ... | |
| enterPrimary | |
| File: synfifo.v , 53 | |
| Text: wr_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 53 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 53 | |
| Text: wr_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 53 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 53 | |
| Text: wr_en ... | |
| enterPrimary | |
| File: synfifo.v , 53 | |
| Text: wr_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 53 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 53 | |
| Text: wr_en ... | |
| enterStatement_or_null | |
| File: synfifo.v , 53 | |
| Text: begin wr_pointer <= ... | |
| enterStatement | |
| File: synfifo.v , 53 | |
| Text: begin wr_pointer <= ... | |
| enterStatement_item | |
| File: synfifo.v , 53 | |
| Text: begin wr_pointer <= ... | |
| enterSeq_block | |
| File: synfifo.v , 53 | |
| Text: begin wr_pointer <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 54 | |
| Text: wr_pointer <= wr_poi ... | |
| enterStatement | |
| File: synfifo.v , 54 | |
| Text: wr_pointer <= wr_poi ... | |
| enterStatement_item | |
| File: synfifo.v , 54 | |
| Text: wr_pointer <= wr_poi ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 54 | |
| Text: wr_pointer <= wr_poi ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterSelect | |
| File: synfifo.v , 54 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 54 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 54 | |
| Text: wr_pointer + 1 ... | |
| enterExpression | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterPrimary | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterPrimary_literal | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 54 | |
| Text: wr_pointer ... | |
| enterBinOp_Plus | |
| File: synfifo.v , 54 | |
| Text: + ... | |
| enterExpression | |
| File: synfifo.v , 54 | |
| Text: 1 ... | |
| enterPrimary | |
| File: synfifo.v , 54 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 54 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 54 | |
| Text: 1 ... | |
| enterEnd | |
| File: synfifo.v , 55 | |
| Text: end ... | |
| enterEnd | |
| File: synfifo.v , 56 | |
| Text: end ... | |
| enterModule_item | |
| File: synfifo.v , 58 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 58 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 58 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: synfifo.v , 58 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: synfifo.v , 58 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: synfifo.v , 58 | |
| Text: always ... | |
| enterStatement | |
| File: synfifo.v , 58 | |
| Text: @ ( posedge clk or p ... | |
| enterStatement_item | |
| File: synfifo.v , 58 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control_statement | |
| File: synfifo.v , 58 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control | |
| File: synfifo.v , 58 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_control | |
| File: synfifo.v , 58 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_expression | |
| File: synfifo.v , 58 | |
| Text: posedge clk or posed ... | |
| enterEvent_expression | |
| File: synfifo.v , 58 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 58 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 58 | |
| Text: clk ... | |
| enterPrimary | |
| File: synfifo.v , 58 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: synfifo.v , 58 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 58 | |
| Text: clk ... | |
| enterEvent_expression | |
| File: synfifo.v , 58 | |
| Text: posedge rst ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 58 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 58 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 58 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 58 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 58 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 59 | |
| Text: begin : READ_POINTER ... | |
| enterStatement | |
| File: synfifo.v , 59 | |
| Text: begin : READ_POINTER ... | |
| enterStatement_item | |
| File: synfifo.v , 59 | |
| Text: begin : READ_POINTER ... | |
| enterSeq_block | |
| File: synfifo.v , 59 | |
| Text: begin : READ_POINTER ... | |
| enterIdentifier | |
| File: synfifo.v , 59 | |
| Text: READ_POINTER ... | |
| enterStatement_or_null | |
| File: synfifo.v , 60 | |
| Text: if ( rst ) begin rd_ ... | |
| enterStatement | |
| File: synfifo.v , 60 | |
| Text: if ( rst ) begin rd_ ... | |
| enterStatement_item | |
| File: synfifo.v , 60 | |
| Text: if ( rst ) begin rd_ ... | |
| enterConditional_statement | |
| File: synfifo.v , 60 | |
| Text: if ( rst ) begin rd_ ... | |
| enterCond_predicate | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterExpression | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 60 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 60 | |
| Text: begin rd_pointer <= ... | |
| enterStatement | |
| File: synfifo.v , 60 | |
| Text: begin rd_pointer <= ... | |
| enterStatement_item | |
| File: synfifo.v , 60 | |
| Text: begin rd_pointer <= ... | |
| enterSeq_block | |
| File: synfifo.v , 60 | |
| Text: begin rd_pointer <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 61 | |
| Text: rd_pointer <= 0 ; ... | |
| enterStatement | |
| File: synfifo.v , 61 | |
| Text: rd_pointer <= 0 ; ... | |
| enterStatement_item | |
| File: synfifo.v , 61 | |
| Text: rd_pointer <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 61 | |
| Text: rd_pointer <= 0 ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 61 | |
| Text: rd_pointer ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 61 | |
| Text: rd_pointer ... | |
| enterSelect | |
| File: synfifo.v , 61 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 61 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 61 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 61 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 61 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 61 | |
| Text: 0 ... | |
| enterEnd | |
| File: synfifo.v , 62 | |
| Text: end ... | |
| enterCond_predicate | |
| File: synfifo.v , 62 | |
| Text: rd_cs && rd_en ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 62 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 62 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 62 | |
| Text: rd_cs ... | |
| enterPrimary | |
| File: synfifo.v , 62 | |
| Text: rd_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 62 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 62 | |
| Text: rd_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 62 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 62 | |
| Text: rd_en ... | |
| enterPrimary | |
| File: synfifo.v , 62 | |
| Text: rd_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 62 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 62 | |
| Text: rd_en ... | |
| enterStatement_or_null | |
| File: synfifo.v , 62 | |
| Text: begin rd_pointer <= ... | |
| enterStatement | |
| File: synfifo.v , 62 | |
| Text: begin rd_pointer <= ... | |
| enterStatement_item | |
| File: synfifo.v , 62 | |
| Text: begin rd_pointer <= ... | |
| enterSeq_block | |
| File: synfifo.v , 62 | |
| Text: begin rd_pointer <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 63 | |
| Text: rd_pointer <= rd_poi ... | |
| enterStatement | |
| File: synfifo.v , 63 | |
| Text: rd_pointer <= rd_poi ... | |
| enterStatement_item | |
| File: synfifo.v , 63 | |
| Text: rd_pointer <= rd_poi ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 63 | |
| Text: rd_pointer <= rd_poi ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterSelect | |
| File: synfifo.v , 63 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 63 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 63 | |
| Text: rd_pointer + 1 ... | |
| enterExpression | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterPrimary | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterPrimary_literal | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 63 | |
| Text: rd_pointer ... | |
| enterBinOp_Plus | |
| File: synfifo.v , 63 | |
| Text: + ... | |
| enterExpression | |
| File: synfifo.v , 63 | |
| Text: 1 ... | |
| enterPrimary | |
| File: synfifo.v , 63 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 63 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 63 | |
| Text: 1 ... | |
| enterEnd | |
| File: synfifo.v , 64 | |
| Text: end ... | |
| enterEnd | |
| File: synfifo.v , 65 | |
| Text: end ... | |
| enterModule_item | |
| File: synfifo.v , 67 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 67 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 67 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: synfifo.v , 67 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: synfifo.v , 67 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: synfifo.v , 67 | |
| Text: always ... | |
| enterStatement | |
| File: synfifo.v , 67 | |
| Text: @ ( posedge clk or p ... | |
| enterStatement_item | |
| File: synfifo.v , 67 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control_statement | |
| File: synfifo.v , 67 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control | |
| File: synfifo.v , 67 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_control | |
| File: synfifo.v , 67 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_expression | |
| File: synfifo.v , 67 | |
| Text: posedge clk or posed ... | |
| enterEvent_expression | |
| File: synfifo.v , 67 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 67 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 67 | |
| Text: clk ... | |
| enterPrimary | |
| File: synfifo.v , 67 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: synfifo.v , 67 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 67 | |
| Text: clk ... | |
| enterEvent_expression | |
| File: synfifo.v , 67 | |
| Text: posedge rst ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 67 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 67 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 67 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 67 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 67 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 68 | |
| Text: begin : READ_DATA if ... | |
| enterStatement | |
| File: synfifo.v , 68 | |
| Text: begin : READ_DATA if ... | |
| enterStatement_item | |
| File: synfifo.v , 68 | |
| Text: begin : READ_DATA if ... | |
| enterSeq_block | |
| File: synfifo.v , 68 | |
| Text: begin : READ_DATA if ... | |
| enterIdentifier | |
| File: synfifo.v , 68 | |
| Text: READ_DATA ... | |
| enterStatement_or_null | |
| File: synfifo.v , 69 | |
| Text: if ( rst ) begin dat ... | |
| enterStatement | |
| File: synfifo.v , 69 | |
| Text: if ( rst ) begin dat ... | |
| enterStatement_item | |
| File: synfifo.v , 69 | |
| Text: if ( rst ) begin dat ... | |
| enterConditional_statement | |
| File: synfifo.v , 69 | |
| Text: if ( rst ) begin dat ... | |
| enterCond_predicate | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterExpression | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 69 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 69 | |
| Text: begin data_out <= 0 ... | |
| enterStatement | |
| File: synfifo.v , 69 | |
| Text: begin data_out <= 0 ... | |
| enterStatement_item | |
| File: synfifo.v , 69 | |
| Text: begin data_out <= 0 ... | |
| enterSeq_block | |
| File: synfifo.v , 69 | |
| Text: begin data_out <= 0 ... | |
| enterStatement_or_null | |
| File: synfifo.v , 70 | |
| Text: data_out <= 0 ; ... | |
| enterStatement | |
| File: synfifo.v , 70 | |
| Text: data_out <= 0 ; ... | |
| enterStatement_item | |
| File: synfifo.v , 70 | |
| Text: data_out <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 70 | |
| Text: data_out <= 0 ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 70 | |
| Text: data_out ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 70 | |
| Text: data_out ... | |
| enterSelect | |
| File: synfifo.v , 70 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 70 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 70 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 70 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 70 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 70 | |
| Text: 0 ... | |
| enterEnd | |
| File: synfifo.v , 71 | |
| Text: end ... | |
| enterCond_predicate | |
| File: synfifo.v , 71 | |
| Text: rd_cs && rd_en ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 71 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 71 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 71 | |
| Text: rd_cs ... | |
| enterPrimary | |
| File: synfifo.v , 71 | |
| Text: rd_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 71 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 71 | |
| Text: rd_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 71 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 71 | |
| Text: rd_en ... | |
| enterPrimary | |
| File: synfifo.v , 71 | |
| Text: rd_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 71 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 71 | |
| Text: rd_en ... | |
| enterStatement_or_null | |
| File: synfifo.v , 71 | |
| Text: begin data_out <= da ... | |
| enterStatement | |
| File: synfifo.v , 71 | |
| Text: begin data_out <= da ... | |
| enterStatement_item | |
| File: synfifo.v , 71 | |
| Text: begin data_out <= da ... | |
| enterSeq_block | |
| File: synfifo.v , 71 | |
| Text: begin data_out <= da ... | |
| enterStatement_or_null | |
| File: synfifo.v , 72 | |
| Text: data_out <= data_ram ... | |
| enterStatement | |
| File: synfifo.v , 72 | |
| Text: data_out <= data_ram ... | |
| enterStatement_item | |
| File: synfifo.v , 72 | |
| Text: data_out <= data_ram ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 72 | |
| Text: data_out <= data_ram ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 72 | |
| Text: data_out ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 72 | |
| Text: data_out ... | |
| enterSelect | |
| File: synfifo.v , 72 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 72 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 72 | |
| Text: data_ram ... | |
| enterPrimary | |
| File: synfifo.v , 72 | |
| Text: data_ram ... | |
| enterPrimary_literal | |
| File: synfifo.v , 72 | |
| Text: data_ram ... | |
| enterIdentifier | |
| File: synfifo.v , 72 | |
| Text: data_ram ... | |
| enterEnd | |
| File: synfifo.v , 73 | |
| Text: end ... | |
| enterEnd | |
| File: synfifo.v , 74 | |
| Text: end ... | |
| enterModule_item | |
| File: synfifo.v , 76 | |
| Text: always @ ( posedge c ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 76 | |
| Text: always @ ( posedge c ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 76 | |
| Text: always @ ( posedge c ... | |
| enterModule_common_item | |
| File: synfifo.v , 76 | |
| Text: always @ ( posedge c ... | |
| enterAlways_construct | |
| File: synfifo.v , 76 | |
| Text: always @ ( posedge c ... | |
| enterAlwaysKeywd_Always | |
| File: synfifo.v , 76 | |
| Text: always ... | |
| enterStatement | |
| File: synfifo.v , 76 | |
| Text: @ ( posedge clk or p ... | |
| enterStatement_item | |
| File: synfifo.v , 76 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control_statement | |
| File: synfifo.v , 76 | |
| Text: @ ( posedge clk or p ... | |
| enterProcedural_timing_control | |
| File: synfifo.v , 76 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_control | |
| File: synfifo.v , 76 | |
| Text: @ ( posedge clk or p ... | |
| enterEvent_expression | |
| File: synfifo.v , 76 | |
| Text: posedge clk or posed ... | |
| enterEvent_expression | |
| File: synfifo.v , 76 | |
| Text: posedge clk ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 76 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 76 | |
| Text: clk ... | |
| enterPrimary | |
| File: synfifo.v , 76 | |
| Text: clk ... | |
| enterPrimary_literal | |
| File: synfifo.v , 76 | |
| Text: clk ... | |
| enterIdentifier | |
| File: synfifo.v , 76 | |
| Text: clk ... | |
| enterEvent_expression | |
| File: synfifo.v , 76 | |
| Text: posedge rst ... | |
| enterEdge_Posedge | |
| File: synfifo.v , 76 | |
| Text: posedge ... | |
| enterExpression | |
| File: synfifo.v , 76 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 76 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 76 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 76 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 77 | |
| Text: begin : STATUS_COUNT ... | |
| enterStatement | |
| File: synfifo.v , 77 | |
| Text: begin : STATUS_COUNT ... | |
| enterStatement_item | |
| File: synfifo.v , 77 | |
| Text: begin : STATUS_COUNT ... | |
| enterSeq_block | |
| File: synfifo.v , 77 | |
| Text: begin : STATUS_COUNT ... | |
| enterIdentifier | |
| File: synfifo.v , 77 | |
| Text: STATUS_COUNTER ... | |
| enterStatement_or_null | |
| File: synfifo.v , 78 | |
| Text: if ( rst ) begin sta ... | |
| enterStatement | |
| File: synfifo.v , 78 | |
| Text: if ( rst ) begin sta ... | |
| enterStatement_item | |
| File: synfifo.v , 78 | |
| Text: if ( rst ) begin sta ... | |
| enterConditional_statement | |
| File: synfifo.v , 78 | |
| Text: if ( rst ) begin sta ... | |
| enterCond_predicate | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterExpression | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterPrimary | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterPrimary_literal | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterIdentifier | |
| File: synfifo.v , 78 | |
| Text: rst ... | |
| enterStatement_or_null | |
| File: synfifo.v , 78 | |
| Text: begin status_cnt <= ... | |
| enterStatement | |
| File: synfifo.v , 78 | |
| Text: begin status_cnt <= ... | |
| enterStatement_item | |
| File: synfifo.v , 78 | |
| Text: begin status_cnt <= ... | |
| enterSeq_block | |
| File: synfifo.v , 78 | |
| Text: begin status_cnt <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 79 | |
| Text: status_cnt <= 0 ; ... | |
| enterStatement | |
| File: synfifo.v , 79 | |
| Text: status_cnt <= 0 ; ... | |
| enterStatement_item | |
| File: synfifo.v , 79 | |
| Text: status_cnt <= 0 ; ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 79 | |
| Text: status_cnt <= 0 ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 79 | |
| Text: status_cnt ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 79 | |
| Text: status_cnt ... | |
| enterSelect | |
| File: synfifo.v , 79 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 79 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 79 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 79 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 79 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 79 | |
| Text: 0 ... | |
| enterEnd | |
| File: synfifo.v , 81 | |
| Text: end ... | |
| enterCond_predicate | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) & ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: ( rd_cs && rd_en ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 81 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: rd_cs ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: rd_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 81 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 81 | |
| Text: rd_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 81 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: rd_en ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: rd_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 81 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 81 | |
| Text: rd_en ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 81 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: ! ( wr_cs && wr_en ) ... | |
| enterUnary_Not | |
| File: synfifo.v , 81 | |
| Text: ! ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: ( wr_cs && wr_en ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 81 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: wr_cs ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: wr_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 81 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 81 | |
| Text: wr_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 81 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 81 | |
| Text: wr_en ... | |
| enterPrimary | |
| File: synfifo.v , 81 | |
| Text: wr_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 81 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 81 | |
| Text: wr_en ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 82 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 82 | |
| Text: ( status_cnt != 0 ) ... | |
| enterPrimary | |
| File: synfifo.v , 82 | |
| Text: ( status_cnt != 0 ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 82 | |
| Text: status_cnt != 0 ... | |
| enterExpression | |
| File: synfifo.v , 82 | |
| Text: status_cnt != 0 ... | |
| enterExpression | |
| File: synfifo.v , 82 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 82 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 82 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 82 | |
| Text: status_cnt ... | |
| enterBinOp_Not | |
| File: synfifo.v , 82 | |
| Text: != ... | |
| enterExpression | |
| File: synfifo.v , 82 | |
| Text: 0 ... | |
| enterPrimary | |
| File: synfifo.v , 82 | |
| Text: 0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 82 | |
| Text: 0 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 82 | |
| Text: 0 ... | |
| enterStatement_or_null | |
| File: synfifo.v , 82 | |
| Text: begin status_cnt <= ... | |
| enterStatement | |
| File: synfifo.v , 82 | |
| Text: begin status_cnt <= ... | |
| enterStatement_item | |
| File: synfifo.v , 82 | |
| Text: begin status_cnt <= ... | |
| enterSeq_block | |
| File: synfifo.v , 82 | |
| Text: begin status_cnt <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 83 | |
| Text: status_cnt <= status ... | |
| enterStatement | |
| File: synfifo.v , 83 | |
| Text: status_cnt <= status ... | |
| enterStatement_item | |
| File: synfifo.v , 83 | |
| Text: status_cnt <= status ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 83 | |
| Text: status_cnt <= status ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterSelect | |
| File: synfifo.v , 83 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 83 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 83 | |
| Text: status_cnt - 1 ... | |
| enterExpression | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 83 | |
| Text: status_cnt ... | |
| enterBinOp_Minus | |
| File: synfifo.v , 83 | |
| Text: - ... | |
| enterExpression | |
| File: synfifo.v , 83 | |
| Text: 1 ... | |
| enterPrimary | |
| File: synfifo.v , 83 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 83 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 83 | |
| Text: 1 ... | |
| enterEnd | |
| File: synfifo.v , 85 | |
| Text: end ... | |
| enterCond_predicate | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) & ... | |
| enterExpression_or_cond_pattern | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) & ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: ( wr_cs && wr_en ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 85 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: wr_cs && wr_en ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: wr_cs ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: wr_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 85 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 85 | |
| Text: wr_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 85 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: wr_en ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: wr_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 85 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 85 | |
| Text: wr_en ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 85 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: ! ( rd_cs && rd_en ) ... | |
| enterUnary_Not | |
| File: synfifo.v , 85 | |
| Text: ! ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: ( rd_cs && rd_en ) ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 85 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: rd_cs && rd_en ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: rd_cs ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: rd_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 85 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 85 | |
| Text: rd_cs ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 85 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 85 | |
| Text: rd_en ... | |
| enterPrimary | |
| File: synfifo.v , 85 | |
| Text: rd_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 85 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 85 | |
| Text: rd_en ... | |
| enterBinOp_LogicAnd | |
| File: synfifo.v , 86 | |
| Text: && ... | |
| enterExpression | |
| File: synfifo.v , 86 | |
| Text: ( status_cnt != RAM_ ... | |
| enterPrimary | |
| File: synfifo.v , 86 | |
| Text: ( status_cnt != RAM_ ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 86 | |
| Text: status_cnt != RAM_DE ... | |
| enterExpression | |
| File: synfifo.v , 86 | |
| Text: status_cnt != RAM_DE ... | |
| enterExpression | |
| File: synfifo.v , 86 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 86 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 86 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 86 | |
| Text: status_cnt ... | |
| enterBinOp_Not | |
| File: synfifo.v , 86 | |
| Text: != ... | |
| enterExpression | |
| File: synfifo.v , 86 | |
| Text: RAM_DEPTH ... | |
| enterPrimary | |
| File: synfifo.v , 86 | |
| Text: RAM_DEPTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 86 | |
| Text: RAM_DEPTH ... | |
| enterIdentifier | |
| File: synfifo.v , 86 | |
| Text: RAM_DEPTH ... | |
| enterStatement_or_null | |
| File: synfifo.v , 86 | |
| Text: begin status_cnt <= ... | |
| enterStatement | |
| File: synfifo.v , 86 | |
| Text: begin status_cnt <= ... | |
| enterStatement_item | |
| File: synfifo.v , 86 | |
| Text: begin status_cnt <= ... | |
| enterSeq_block | |
| File: synfifo.v , 86 | |
| Text: begin status_cnt <= ... | |
| enterStatement_or_null | |
| File: synfifo.v , 87 | |
| Text: status_cnt <= status ... | |
| enterStatement | |
| File: synfifo.v , 87 | |
| Text: status_cnt <= status ... | |
| enterStatement_item | |
| File: synfifo.v , 87 | |
| Text: status_cnt <= status ... | |
| enterNonblocking_assignment | |
| File: synfifo.v , 87 | |
| Text: status_cnt <= status ... | |
| enterVariable_lvalue | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterHierarchical_identifier | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterSelect | |
| File: synfifo.v , 87 | |
| Text: ... | |
| enterBit_select | |
| File: synfifo.v , 87 | |
| Text: ... | |
| enterExpression | |
| File: synfifo.v , 87 | |
| Text: status_cnt + 1 ... | |
| enterExpression | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterPrimary | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterPrimary_literal | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterIdentifier | |
| File: synfifo.v , 87 | |
| Text: status_cnt ... | |
| enterBinOp_Plus | |
| File: synfifo.v , 87 | |
| Text: + ... | |
| enterExpression | |
| File: synfifo.v , 87 | |
| Text: 1 ... | |
| enterPrimary | |
| File: synfifo.v , 87 | |
| Text: 1 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 87 | |
| Text: 1 ... | |
| enterNumber_Integral | |
| File: synfifo.v , 87 | |
| Text: 1 ... | |
| enterEnd | |
| File: synfifo.v , 88 | |
| Text: end ... | |
| enterEnd | |
| File: synfifo.v , 89 | |
| Text: end ... | |
| enterModule_item | |
| File: synfifo.v , 91 | |
| Text: ram_dp_ar_aw # ( DAT ... | |
| enterNon_port_module_item | |
| File: synfifo.v , 91 | |
| Text: ram_dp_ar_aw # ( DAT ... | |
| enterModule_or_generate_item | |
| File: synfifo.v , 91 | |
| Text: ram_dp_ar_aw # ( DAT ... | |
| enterModule_instantiation | |
| File: synfifo.v , 91 | |
| Text: ram_dp_ar_aw # ( DAT ... | |
| enterIdentifier | |
| File: synfifo.v , 91 | |
| Text: ram_dp_ar_aw ... | |
| enterParameter_value_assignment | |
| File: synfifo.v , 91 | |
| Text: # ( DATA_WIDTH , ADD ... | |
| enterList_of_parameter_assignments | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH , ADDR_WI ... | |
| enterOrdered_parameter_assignment | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterParam_expression | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterExpression | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterPrimary | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 91 | |
| Text: DATA_WIDTH ... | |
| enterOrdered_parameter_assignment | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterParam_expression | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterMintypmax_expression | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterExpression | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterPrimary_literal | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterIdentifier | |
| File: synfifo.v , 91 | |
| Text: ADDR_WIDTH ... | |
| enterHierarchical_instance | |
| File: synfifo.v , 91 | |
| Text: DP_RAM ( . address_0 ... | |
| enterName_of_instance | |
| File: synfifo.v , 91 | |
| Text: DP_RAM ... | |
| enterIdentifier | |
| File: synfifo.v , 91 | |
| Text: DP_RAM ... | |
| enterList_of_port_connections | |
| File: synfifo.v , 92 | |
| Text: . address_0 ( wr_poi ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 92 | |
| Text: . address_0 ( wr_poi ... | |
| enterIdentifier | |
| File: synfifo.v , 92 | |
| Text: address_0 ... | |
| enterExpression | |
| File: synfifo.v , 92 | |
| Text: wr_pointer ... | |
| enterPrimary | |
| File: synfifo.v , 92 | |
| Text: wr_pointer ... | |
| enterPrimary_literal | |
| File: synfifo.v , 92 | |
| Text: wr_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 92 | |
| Text: wr_pointer ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 93 | |
| Text: . data_0 ( data_in ) ... | |
| enterIdentifier | |
| File: synfifo.v , 93 | |
| Text: data_0 ... | |
| enterExpression | |
| File: synfifo.v , 93 | |
| Text: data_in ... | |
| enterPrimary | |
| File: synfifo.v , 93 | |
| Text: data_in ... | |
| enterPrimary_literal | |
| File: synfifo.v , 93 | |
| Text: data_in ... | |
| enterIdentifier | |
| File: synfifo.v , 93 | |
| Text: data_in ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 94 | |
| Text: . cs_0 ( wr_cs ) ... | |
| enterIdentifier | |
| File: synfifo.v , 94 | |
| Text: cs_0 ... | |
| enterExpression | |
| File: synfifo.v , 94 | |
| Text: wr_cs ... | |
| enterPrimary | |
| File: synfifo.v , 94 | |
| Text: wr_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 94 | |
| Text: wr_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 94 | |
| Text: wr_cs ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 95 | |
| Text: . we_0 ( wr_en ) ... | |
| enterIdentifier | |
| File: synfifo.v , 95 | |
| Text: we_0 ... | |
| enterExpression | |
| File: synfifo.v , 95 | |
| Text: wr_en ... | |
| enterPrimary | |
| File: synfifo.v , 95 | |
| Text: wr_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 95 | |
| Text: wr_en ... | |
| enterIdentifier | |
| File: synfifo.v , 95 | |
| Text: wr_en ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 96 | |
| Text: . oe_0 ( 1'b0 ) ... | |
| enterIdentifier | |
| File: synfifo.v , 96 | |
| Text: oe_0 ... | |
| enterExpression | |
| File: synfifo.v , 96 | |
| Text: 1'b0 ... | |
| enterPrimary | |
| File: synfifo.v , 96 | |
| Text: 1'b0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 96 | |
| Text: 1'b0 ... | |
| enterNumber_1Tickb0 | |
| File: synfifo.v , 96 | |
| Text: 1'b0 ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 97 | |
| Text: . address_1 ( rd_poi ... | |
| enterIdentifier | |
| File: synfifo.v , 97 | |
| Text: address_1 ... | |
| enterExpression | |
| File: synfifo.v , 97 | |
| Text: rd_pointer ... | |
| enterPrimary | |
| File: synfifo.v , 97 | |
| Text: rd_pointer ... | |
| enterPrimary_literal | |
| File: synfifo.v , 97 | |
| Text: rd_pointer ... | |
| enterIdentifier | |
| File: synfifo.v , 97 | |
| Text: rd_pointer ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 98 | |
| Text: . data_1 ( data_ram ... | |
| enterIdentifier | |
| File: synfifo.v , 98 | |
| Text: data_1 ... | |
| enterExpression | |
| File: synfifo.v , 98 | |
| Text: data_ram ... | |
| enterPrimary | |
| File: synfifo.v , 98 | |
| Text: data_ram ... | |
| enterPrimary_literal | |
| File: synfifo.v , 98 | |
| Text: data_ram ... | |
| enterIdentifier | |
| File: synfifo.v , 98 | |
| Text: data_ram ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 99 | |
| Text: . cs_1 ( rd_cs ) ... | |
| enterIdentifier | |
| File: synfifo.v , 99 | |
| Text: cs_1 ... | |
| enterExpression | |
| File: synfifo.v , 99 | |
| Text: rd_cs ... | |
| enterPrimary | |
| File: synfifo.v , 99 | |
| Text: rd_cs ... | |
| enterPrimary_literal | |
| File: synfifo.v , 99 | |
| Text: rd_cs ... | |
| enterIdentifier | |
| File: synfifo.v , 99 | |
| Text: rd_cs ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 100 | |
| Text: . we_1 ( 1'b0 ) ... | |
| enterIdentifier | |
| File: synfifo.v , 100 | |
| Text: we_1 ... | |
| enterExpression | |
| File: synfifo.v , 100 | |
| Text: 1'b0 ... | |
| enterPrimary | |
| File: synfifo.v , 100 | |
| Text: 1'b0 ... | |
| enterPrimary_literal | |
| File: synfifo.v , 100 | |
| Text: 1'b0 ... | |
| enterNumber_1Tickb0 | |
| File: synfifo.v , 100 | |
| Text: 1'b0 ... | |
| enterNamed_port_connection | |
| File: synfifo.v , 101 | |
| Text: . oe_1 ( rd_en ) ... | |
| enterIdentifier | |
| File: synfifo.v , 101 | |
| Text: oe_1 ... | |
| enterExpression | |
| File: synfifo.v , 101 | |
| Text: rd_en ... | |
| enterPrimary | |
| File: synfifo.v , 101 | |
| Text: rd_en ... | |
| enterPrimary_literal | |
| File: synfifo.v , 101 | |
| Text: rd_en ... | |
| enterIdentifier | |
| File: synfifo.v , 101 | |
| Text: rd_en ... | |
| enterEndmodule | |
| File: synfifo.v , 104 | |
| Text: endmodule ... | |
| [INFO :CP0300] Compilation... | |
| [INFO :CP0303] another_arbiter.v:2 Compile module "work@arbiter". | |
| [INFO :CP0303] m_input_mult.v:2 Compile module "work@case1". | |
| [INFO :CP0303] lfsr_task.v:2 Compile module "work@LFSR_TASK". | |
| [INFO :CP0303] m_input_mult.v:21 Compile module "work@case2". | |
| [INFO :CP0303] encoder_case.v:8 Compile module "work@encoder_using_case". | |
| [INFO :CP0303] full_adder.v:7 Compile module "work@full_adder_gates". | |
| [INFO :CP0303] mux21.v:7 Compile module "work@mux21_switch". | |
| [INFO :CP0303] dff.v:8 Compile module "work@dff_async_reset". | |
| [INFO :CP0305] jkff_udp.v:7 Compile udp "work@jkff_udp". | |
| [INFO :CP0303] m_input_mult.v:49 Compile module "work@pri_encooder". | |
| [INFO :CP0303] /home/alain/Surelog/SVIncCompil/Testcases/SimpleParserTest/libmodule.sv:1 Compile module "work@libmodule". | |
| [INFO :CP0303] uart.v:8 Compile module "work@uart". | |
| [INFO :CP0303] synfifo.v:8 Compile module "work@syn_fifo". | |
| [INFO :CP0305] jkff_udp.v:24 Compile udp "work@xor2_input". | |
| [INFO :CP0303] arbiter_tb.v:2 Compile module "work@top". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore". | |
| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox". | |
| [WARNI:CP0310] lfsr_task.v:2 Port "Reset" definition missing its direction (input, output, inout), | |
| there are 1 more instances of this message. | |
| [NOTE :CP0309] mux21.v:7 Implicit port type (wire) for "out". | |
| [NOTE :CP0309] m_input_mult.v:2 Implicit port type (wire) for "out2". | |
| [NOTE :CP0309] full_adder.v:7 Implicit port type (wire) for "sum", | |
| there are 1 more instances of this message. | |
| [NOTE :CP0309] m_input_mult.v:49 Implicit port type (wire) for "Sel", | |
| there are 1 more instances of this message. | |
| [NOTE :CP0309] m_input_mult.v:21 Implicit port type (wire) for "out2". | |
| [NOTE :CP0309] synfifo.v:17 Implicit port type (wire) for "empty", | |
| there are 1 more instances of this message. | |
| [INFO :EL0526] Design Elaboration... | |
| [NOTE :EL0503] dff.v:8 Top level module "work@dff_async_reset". | |
| [NOTE :EL0503] encoder_case.v:8 Top level module "work@encoder_using_case". | |
| [NOTE :EL0503] full_adder.v:7 Top level module "work@full_adder_gates". | |
| [NOTE :EL0503] arbiter_tb.v:2 Top level module "work@top". | |
| [NOTE :EL0503] m_input_mult.v:2 Top level module "work@case1". | |
| [NOTE :EL0503] m_input_mult.v:21 Top level module "work@case2". | |
| [NOTE :EL0503] m_input_mult.v:49 Top level module "work@pri_encooder". | |
| [NOTE :EL0503] lfsr_task.v:2 Top level module "work@LFSR_TASK". | |
| [NOTE :EL0503] mux21.v:7 Top level module "work@mux21_switch". | |
| [NOTE :EL0503] uart.v:8 Top level module "work@uart". | |
| [NOTE :EL0503] synfifo.v:8 Top level module "work@syn_fifo". | |
| [WARNI:EL0505] arbiter.inc:6 Multiply defined module "work@arbiter", | |
| another_arbiter.v:2 previous definition. | |
| [WARNI:EL0505] encoder.v:7 Multiply defined module "work@encoder_using_case", | |
| encoder_case.v:8 previous definition. | |
| [NOTE :EL0504] Multiple top level modules in design. | |
| [WARNI:EL0500] synfifo.v:91 Cannot find a module definition for "work@syn_fifo::ram_dp_ar_aw". | |
| [NOTE :EL0508] Nb Top level modules: 11. | |
| [NOTE :EL0509] Max instance depth: 2. | |
| [NOTE :EL0510] Nb instances: 20. | |
| [NOTE :EL0511] Nb leaf instances: 10. | |
| [WARNI:EL0512] Nb undefined modules: 1. | |
| [WARNI:EL0513] Nb undefined instances: 1. | |
| [ FATAL] : 0 | |
| [ ERROR] : 0 | |
| [WARNING] : 6 | |
| [ NOTE] : 22 | |
| ******************************************** | |
| * End SURELOG SVerilog Compiler/Linter * | |
| ******************************************** | |
| 10.43user 0.80system 0:07.58elapsed 148%CPU (0avgtext+0avgdata 121608maxresident)k | |
| 0inputs+144outputs (0major+211080minor)pagefaults 0swaps |