blob: 950a2d00f48b8da38d442b7734829de9da0d80b0 [file] [log] [blame]
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2019 by Wilson Snyder.
module t;
initial begin
$write("Intentional stop\n");
$stop;
end
endmodule