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Surelog
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3f4e38faba84ce292e5f05601b70dd598f686411
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.
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SVIncCompil
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Testcases
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Verilator
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t_stop_bad.v
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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2019 by Wilson Snyder.
module
t
;
initial
begin
$write
(
"Intentional stop\n"
);
$stop
;
end
endmodule