blob: 7f4e61807d20739ff7a17f584fbade8249510a60 [file] [log] [blame]
read_verilog ../top.v
proc
memory
dump -o file.il
write_ilang ilang.ilang
design -reset
read_ilang -nooverwrite ilang.ilang
dump -n -o file1.il
write_verilog synth.v