Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
3f4e38faba84ce292e5f05601b70dd598f686411
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
rename_hide.ys
blob: 7efc692dee06e6cc74d845a7c12e0ea9264b63cd [
file
] [
log
] [
blame
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log rename
-
hide middle mid