blob: 738f840fc2b788489e4f0f0595658217977011c2 [file] [log] [blame]
read_verilog ../top.v
equiv_make gold top_w equiv
hierarchy -top equiv
opt -purge
equiv_simple
equiv_status -assert
design -reset
read_verilog ../top.v
synth
write_verilog synth.v