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3f4e38faba84ce292e5f05601b70dd598f686411
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SVIncCompil
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Testcases
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YosysTests
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regression
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scripts
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issue_01132.ys
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read_verilog
../
top
.
v
proc
;
opt
;
wreduce
;
simplemap
;
muxcover
-
mux4
=
150
select
-
assert
-
count
1
t
:
$_MUX4_
