blob: e4d03ab2da0dce35a50c3eecaef56e0aaf11eb1d [file] [log] [blame]
read_verilog ../top.v
synth_greenpak4 -run begin:map_luts
shregmap -tech greenpak4 -enpol none
design -reset
read_verilog ../top.v
write_verilog synth.v