blob: 84c3021209a27c44cd202e528dc5e1d31c83f244 [file] [log] [blame]
********************************************
* SURELOG System Verilog Compiler/Linter *
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|-------|------------------|-------------------|
| | FILE UNIT COMP | ALL COMPILATION |
|-------|------------------|-------------------|
| FATAL | 0 | 0 |
| ERROR | 30 | 32 |
|WARNING| 19 | 11 |
| INFO | | |
| NOTE | 13 | 26 |
|-------|------------------|-------------------|
FILE UNIT LOG: ./slpp_unit/surelog.log
ALL FILES LOG: ./slpp_all/surelog.log
DIFFS:
./slpp_unit/work/top_3.v and ./slpp_all/work/top_3.v
./slpp_unit/work/top_4.v and ./slpp_all/work/top_4.v
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* End SURELOG SVerilog Compiler/Linter *
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1.36user 0.04system 0:01.22elapsed 115%CPU (0avgtext+0avgdata 49200maxresident)k
1680inputs+432outputs (2major+21791minor)pagefaults 0swaps
sh: 2: -mt: not found