Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
4a79a47b7dd03dd4b2776ee40322b0149935d234
/
.
/
src
/
Testcases
/
Google
/
chapter-10
/
10.3.3--cont-assignment-delay.sv
blob: d3cd0030306e5a00d75b48849da4742fb0d731b6 [
file
] [
log
] [
blame
]
/*
:name: cont_assignment_delay
:description: continuous assignment with delay test
:should_fail: 0
:tags: 10.3.3
*/
module
top
(
input a
,
input b
);
wire w
;
initial
w
=
#10 a & b;
endmodule