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chapter-20
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20.6--bits.sv
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/*
:name: bits_function
:description: $bits test
:should_fail: 0
:tags: 20.6
:type: simulation parsing
*/
module
top
();
initial
begin
logic
[
31
:
0
]
val
;
$display
(
":assert: (%d == 32)"
,
$bits
(
val
));
end
endmodule