Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
4a79a47b7dd03dd4b2776ee40322b0149935d234
/
.
/
src
/
Testcases
/
Icarus
/
ivltests
/
param_vec.v
blob: 51b115c0cc19af2136c9e5142a627fd3e1252ac8 [
file
] [
log
] [
blame
]
module
test
;
parameter
[
39
:
0
]
foo
=
5
;
initial
begin
if
(
$bits
(
foo
)
!=
40
)
begin
$display
(
"FAILED -- $bits(foo) == %d"
,
$bits
(
foo
));
$finish
;
end
$display
(
"PASSED"
);
end
endmodule
// test